2017-06-19 09:05:53 -07:00
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/*
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* Copyright 2017 Józef Kucia for CodeWeavers
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA
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*/
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#include "vkd3d_shader_private.h"
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2017-06-20 04:34:44 -07:00
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#include "rbtree.h"
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2017-06-19 09:05:53 -07:00
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2017-06-26 08:03:31 -07:00
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#include <stdarg.h>
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2017-06-20 04:34:44 -07:00
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#include <stdio.h>
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2018-04-16 03:16:23 -07:00
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#ifdef HAVE_SPIRV_UNIFIED1_SPIRV_H
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# include "spirv/unified1/spirv.h"
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#else
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# include "vulkan/spirv.h"
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#endif /* HAVE_SPIRV_UNIFIED1_SPIRV_H */
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#ifdef HAVE_SPIRV_UNIFIED1_GLSL_STD_450_H
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# include "spirv/unified1/GLSL.std.450.h"
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#else
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# include "vulkan/GLSL.std.450.h"
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#endif /* HAVE_SPIRV_UNIFIED1_GLSL_STD_450_H */
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2017-06-19 09:05:53 -07:00
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#ifdef HAVE_SPIRV_TOOLS
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2018-04-16 03:16:23 -07:00
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# include "spirv-tools/libspirv.h"
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2017-06-19 09:05:53 -07:00
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2018-10-11 06:33:34 -07:00
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static spv_target_env spv_target_env_from_vkd3d(enum vkd3d_shader_target target)
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{
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switch (target)
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{
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case VKD3D_SHADER_TARGET_SPIRV_OPENGL_4_5:
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return SPV_ENV_OPENGL_4_5;
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case VKD3D_SHADER_TARGET_SPIRV_VULKAN_1_0:
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return SPV_ENV_VULKAN_1_0;
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default:
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ERR("Invalid shader target %#x.\n", target);
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return SPV_ENV_VULKAN_1_0;
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}
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}
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static void vkd3d_spirv_dump(const struct vkd3d_shader_code *spirv, enum vkd3d_shader_target target)
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2017-06-19 09:05:53 -07:00
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{
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const static uint32_t options
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= SPV_BINARY_TO_TEXT_OPTION_FRIENDLY_NAMES | SPV_BINARY_TO_TEXT_OPTION_INDENT;
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spv_diagnostic diagnostic = NULL;
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spv_text text = NULL;
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spv_context context;
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spv_result_t ret;
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2018-10-11 06:33:34 -07:00
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context = spvContextCreate(spv_target_env_from_vkd3d(target));
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2017-06-19 09:05:53 -07:00
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if (!(ret = spvBinaryToText(context, spirv->code, spirv->size / sizeof(uint32_t),
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options, &text, &diagnostic)))
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{
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const char *str, *current = text->str;
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while ((str = strchr(current, '\n')))
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{
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TRACE("%.*s\n", (int)(str - current), current);
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current = str + 1;
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}
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}
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else
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{
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2017-07-11 08:23:02 -07:00
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FIXME("Failed to convert SPIR-V binary to text, ret %d.\n", ret);
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FIXME("Diagnostic message: %s.\n", debugstr_a(diagnostic->error));
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2017-06-19 09:05:53 -07:00
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}
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spvTextDestroy(text);
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spvDiagnosticDestroy(diagnostic);
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spvContextDestroy(context);
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}
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2018-10-11 06:33:34 -07:00
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static void vkd3d_spirv_validate(const struct vkd3d_shader_code *spirv, enum vkd3d_shader_target target)
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2017-06-19 09:05:53 -07:00
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{
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spv_diagnostic diagnostic = NULL;
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spv_context context;
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spv_result_t ret;
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2018-10-11 06:33:34 -07:00
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context = spvContextCreate(spv_target_env_from_vkd3d(target));
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2017-06-19 09:05:53 -07:00
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if ((ret = spvValidateBinary(context, spirv->code, spirv->size / sizeof(uint32_t),
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&diagnostic)))
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{
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2017-07-11 08:23:02 -07:00
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FIXME("Failed to validate SPIR-V binary, ret %d.\n", ret);
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FIXME("Diagnostic message: %s.\n", debugstr_a(diagnostic->error));
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2017-06-19 09:05:53 -07:00
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}
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spvDiagnosticDestroy(diagnostic);
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spvContextDestroy(context);
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}
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#else
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2017-06-19 09:05:53 -07:00
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2018-10-11 06:33:34 -07:00
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static void vkd3d_spirv_dump(const struct vkd3d_shader_code *spirv, enum vkd3d_shader_target target) {}
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static void vkd3d_spirv_validate(const struct vkd3d_shader_code *spirv, enum vkd3d_shader_target target) {}
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2017-06-19 09:05:53 -07:00
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2018-04-16 03:16:23 -07:00
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#endif /* HAVE_SPIRV_TOOLS */
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2017-06-19 09:05:53 -07:00
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2019-01-14 08:05:43 -08:00
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struct vkd3d_struct
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{
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enum vkd3d_shader_structure_type type;
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const void *next;
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};
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#define vkd3d_find_struct(c, t) vkd3d_find_struct_(c, VKD3D_SHADER_STRUCTURE_TYPE_##t)
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static const void *vkd3d_find_struct_(const struct vkd3d_struct *chain,
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enum vkd3d_shader_structure_type type)
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{
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while (chain)
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{
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if (chain->type == type)
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return chain;
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chain = chain->next;
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}
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return NULL;
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}
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2018-04-16 03:16:22 -07:00
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#define VKD3D_SPIRV_VERSION 0x00010000
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2018-02-02 06:39:22 -08:00
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#define VKD3D_SPIRV_GENERATOR_ID 18
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2018-10-02 03:02:40 -07:00
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#define VKD3D_SPIRV_GENERATOR_VERSION 1
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2018-02-02 06:39:22 -08:00
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#define VKD3D_SPIRV_GENERATOR_MAGIC ((VKD3D_SPIRV_GENERATOR_ID << 16) | VKD3D_SPIRV_GENERATOR_VERSION)
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2017-06-19 09:05:53 -07:00
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struct vkd3d_spirv_stream
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{
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uint32_t *words;
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size_t capacity;
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size_t word_count;
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2017-08-01 01:51:45 -07:00
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struct list inserted_chunks;
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2017-06-19 09:05:53 -07:00
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};
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static void vkd3d_spirv_stream_init(struct vkd3d_spirv_stream *stream)
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{
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stream->capacity = 256;
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if (!(stream->words = vkd3d_calloc(stream->capacity, sizeof(*stream->words))))
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stream->capacity = 0;
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stream->word_count = 0;
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2017-08-01 01:51:45 -07:00
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list_init(&stream->inserted_chunks);
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}
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struct vkd3d_spirv_chunk
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{
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struct list entry;
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size_t location;
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size_t word_count;
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uint32_t words[];
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};
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static void vkd3d_spirv_stream_clear(struct vkd3d_spirv_stream *stream)
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{
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struct vkd3d_spirv_chunk *c1, *c2;
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stream->word_count = 0;
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LIST_FOR_EACH_ENTRY_SAFE(c1, c2, &stream->inserted_chunks, struct vkd3d_spirv_chunk, entry)
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vkd3d_free(c1);
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list_init(&stream->inserted_chunks);
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2017-06-19 09:05:53 -07:00
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}
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static void vkd3d_spirv_stream_free(struct vkd3d_spirv_stream *stream)
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{
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vkd3d_free(stream->words);
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2017-08-01 01:51:45 -07:00
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vkd3d_spirv_stream_clear(stream);
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2017-06-19 09:05:53 -07:00
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}
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2017-08-01 01:51:45 -07:00
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static size_t vkd3d_spirv_stream_current_location(struct vkd3d_spirv_stream *stream)
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2017-06-27 13:21:43 -07:00
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{
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2017-08-01 01:51:45 -07:00
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return stream->word_count;
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}
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static void vkd3d_spirv_stream_insert(struct vkd3d_spirv_stream *stream,
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size_t location, const uint32_t *words, unsigned int word_count)
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{
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2017-08-01 04:55:49 -07:00
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struct vkd3d_spirv_chunk *chunk, *current;
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2017-08-01 01:51:45 -07:00
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if (!(chunk = vkd3d_malloc(offsetof(struct vkd3d_spirv_chunk, words[word_count]))))
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return;
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chunk->location = location;
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chunk->word_count = word_count;
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memcpy(chunk->words, words, word_count * sizeof(*words));
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2017-08-01 04:55:49 -07:00
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LIST_FOR_EACH_ENTRY(current, &stream->inserted_chunks, struct vkd3d_spirv_chunk, entry)
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{
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if (current->location > location)
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{
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list_add_before(¤t->entry, &chunk->entry);
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return;
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}
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}
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2017-08-01 01:51:45 -07:00
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list_add_tail(&stream->inserted_chunks, &chunk->entry);
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2017-06-27 13:21:43 -07:00
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}
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2017-06-19 09:05:53 -07:00
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static bool vkd3d_spirv_stream_append(struct vkd3d_spirv_stream *dst_stream,
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const struct vkd3d_spirv_stream *src_stream)
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{
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2017-08-01 01:51:45 -07:00
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size_t word_count, src_word_count = src_stream->word_count;
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struct vkd3d_spirv_chunk *chunk;
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size_t src_location = 0;
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assert(list_empty(&dst_stream->inserted_chunks));
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LIST_FOR_EACH_ENTRY(chunk, &src_stream->inserted_chunks, struct vkd3d_spirv_chunk, entry)
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src_word_count += chunk->word_count;
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2017-06-19 09:05:53 -07:00
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if (!vkd3d_array_reserve((void **)&dst_stream->words, &dst_stream->capacity,
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2017-08-01 01:51:45 -07:00
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dst_stream->word_count + src_word_count, sizeof(*dst_stream->words)))
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2017-06-19 09:05:53 -07:00
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return false;
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2017-08-01 01:51:45 -07:00
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assert(dst_stream->word_count + src_word_count <= dst_stream->capacity);
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LIST_FOR_EACH_ENTRY(chunk, &src_stream->inserted_chunks, struct vkd3d_spirv_chunk, entry)
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{
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assert(src_location <= chunk->location);
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word_count = chunk->location - src_location;
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memcpy(&dst_stream->words[dst_stream->word_count], &src_stream->words[src_location],
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word_count * sizeof(*src_stream->words));
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dst_stream->word_count += word_count;
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src_location += word_count;
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assert(src_location == chunk->location);
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memcpy(&dst_stream->words[dst_stream->word_count], chunk->words,
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chunk->word_count * sizeof(*chunk->words));
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dst_stream->word_count += chunk->word_count;
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}
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word_count = src_stream->word_count - src_location;
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memcpy(&dst_stream->words[dst_stream->word_count], &src_stream->words[src_location],
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word_count * sizeof(*src_stream->words));
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dst_stream->word_count += word_count;
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2017-06-19 09:05:53 -07:00
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return true;
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}
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2017-06-19 09:05:53 -07:00
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struct vkd3d_spirv_builder
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{
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uint64_t capability_mask;
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2017-09-12 08:42:42 -07:00
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uint64_t capability_draw_parameters : 1;
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2017-06-20 05:59:25 -07:00
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uint32_t ext_instr_set_glsl_450;
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2017-06-19 09:05:53 -07:00
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SpvExecutionModel execution_model;
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uint32_t current_id;
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2017-06-19 09:05:53 -07:00
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uint32_t main_function_id;
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2017-07-17 09:12:02 -07:00
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struct rb_tree declarations;
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2017-07-17 09:12:02 -07:00
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uint32_t type_sampler_id;
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2017-07-17 09:12:02 -07:00
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uint32_t type_bool_id;
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uint32_t type_void_id;
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2017-06-19 09:05:53 -07:00
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struct vkd3d_spirv_stream debug_stream; /* debug instructions */
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struct vkd3d_spirv_stream annotation_stream; /* decoration instructions */
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struct vkd3d_spirv_stream global_stream; /* types, constants, global variables */
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struct vkd3d_spirv_stream function_stream; /* function definitions */
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2018-01-11 08:03:52 -08:00
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struct vkd3d_spirv_stream execution_mode_stream; /* execution mode instructions */
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2017-08-01 01:51:45 -07:00
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struct vkd3d_spirv_stream original_function_stream;
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struct vkd3d_spirv_stream insertion_stream;
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size_t insertion_location;
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2017-10-25 00:58:14 -07:00
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size_t main_function_location;
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2017-06-20 04:34:44 -07:00
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/* entry point interface */
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uint32_t *iface;
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size_t iface_capacity;
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size_t iface_element_count;
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2017-06-19 09:05:53 -07:00
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};
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2017-06-26 08:03:31 -07:00
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static uint32_t vkd3d_spirv_alloc_id(struct vkd3d_spirv_builder *builder)
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{
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return builder->current_id++;
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}
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2017-06-19 09:05:53 -07:00
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static void vkd3d_spirv_enable_capability(struct vkd3d_spirv_builder *builder,
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SpvCapability cap)
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{
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2017-09-12 08:42:42 -07:00
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if (cap < sizeof(builder->capability_mask) * CHAR_BIT)
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{
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builder->capability_mask |= 1ull << cap;
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}
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else if (cap == SpvCapabilityDrawParameters)
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{
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builder->capability_draw_parameters = 1;
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}
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else
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{
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FIXME("Unhandled capability %#x.\n", cap);
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}
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2017-06-19 09:05:53 -07:00
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}
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|
2017-06-27 13:21:43 -07:00
|
|
|
static uint32_t vkd3d_spirv_get_glsl_std450_instr_set(struct vkd3d_spirv_builder *builder)
|
2017-06-20 05:59:25 -07:00
|
|
|
{
|
|
|
|
if (!builder->ext_instr_set_glsl_450)
|
2017-06-26 08:03:31 -07:00
|
|
|
builder->ext_instr_set_glsl_450 = vkd3d_spirv_alloc_id(builder);
|
2017-06-20 05:59:25 -07:00
|
|
|
|
|
|
|
return builder->ext_instr_set_glsl_450;
|
|
|
|
}
|
|
|
|
|
2017-06-20 04:34:44 -07:00
|
|
|
static void vkd3d_spirv_add_iface_variable(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t id)
|
|
|
|
{
|
|
|
|
if (!vkd3d_array_reserve((void **)&builder->iface, &builder->iface_capacity,
|
|
|
|
builder->iface_element_count + 1, sizeof(*builder->iface)))
|
|
|
|
return;
|
|
|
|
|
|
|
|
builder->iface[builder->iface_element_count++] = id;
|
|
|
|
}
|
|
|
|
|
2017-06-19 09:05:53 -07:00
|
|
|
static void vkd3d_spirv_set_execution_model(struct vkd3d_spirv_builder *builder,
|
|
|
|
SpvExecutionModel model)
|
|
|
|
{
|
|
|
|
builder->execution_model = model;
|
|
|
|
|
|
|
|
switch (model)
|
|
|
|
{
|
|
|
|
case SpvExecutionModelVertex:
|
|
|
|
case SpvExecutionModelFragment:
|
|
|
|
case SpvExecutionModelGLCompute:
|
|
|
|
vkd3d_spirv_enable_capability(builder, SpvCapabilityShader);
|
|
|
|
break;
|
|
|
|
case SpvExecutionModelTessellationControl:
|
|
|
|
case SpvExecutionModelTessellationEvaluation:
|
|
|
|
vkd3d_spirv_enable_capability(builder, SpvCapabilityTessellation);
|
|
|
|
break;
|
|
|
|
case SpvExecutionModelGeometry:
|
|
|
|
vkd3d_spirv_enable_capability(builder, SpvCapabilityGeometry);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
ERR("Unhandled execution model %#x.\n", model);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2017-06-19 09:05:53 -07:00
|
|
|
static uint32_t vkd3d_spirv_opcode_word(SpvOp op, unsigned int word_count)
|
|
|
|
{
|
|
|
|
assert(!(op & ~SpvOpCodeMask));
|
|
|
|
return (word_count << SpvWordCountShift) | op;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void vkd3d_spirv_build_word(struct vkd3d_spirv_stream *stream, uint32_t word)
|
|
|
|
{
|
|
|
|
if (!vkd3d_array_reserve((void **)&stream->words, &stream->capacity,
|
|
|
|
stream->word_count + 1, sizeof(*stream->words)))
|
|
|
|
return;
|
|
|
|
|
|
|
|
stream->words[stream->word_count++] = word;
|
|
|
|
}
|
|
|
|
|
|
|
|
static unsigned int vkd3d_spirv_string_word_count(const char *str)
|
|
|
|
{
|
|
|
|
return align(strlen(str) + 1, sizeof(uint32_t)) / sizeof(uint32_t);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void vkd3d_spirv_build_string(struct vkd3d_spirv_stream *stream,
|
|
|
|
const char *str, unsigned int word_count)
|
|
|
|
{
|
|
|
|
unsigned int word_idx, i;
|
|
|
|
const char *ptr = str;
|
|
|
|
|
|
|
|
for (word_idx = 0; word_idx < word_count; ++word_idx)
|
|
|
|
{
|
|
|
|
uint32_t word = 0;
|
|
|
|
for (i = 0; i < sizeof(uint32_t) && *ptr; ++i)
|
|
|
|
word |= (uint32_t)*ptr++ << (8 * i);
|
|
|
|
vkd3d_spirv_build_word(stream, word);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2017-07-17 09:12:02 -07:00
|
|
|
typedef uint32_t (*vkd3d_spirv_build_pfn)(struct vkd3d_spirv_builder *builder);
|
|
|
|
typedef uint32_t (*vkd3d_spirv_build1_pfn)(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t operand0);
|
2017-07-19 05:45:54 -07:00
|
|
|
typedef uint32_t (*vkd3d_spirv_build1v_pfn)(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t operand0, const uint32_t *operands, unsigned int operand_count);
|
2017-07-17 09:12:02 -07:00
|
|
|
typedef uint32_t (*vkd3d_spirv_build2_pfn)(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t operand0, uint32_t operand1);
|
2017-07-17 09:12:02 -07:00
|
|
|
typedef uint32_t (*vkd3d_spirv_build7_pfn)(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t operand0, uint32_t operand1, uint32_t operand2, uint32_t operand3,
|
|
|
|
uint32_t operand4, uint32_t operand5, uint32_t operand6);
|
2017-07-17 09:12:02 -07:00
|
|
|
|
|
|
|
static uint32_t vkd3d_spirv_build_once(struct vkd3d_spirv_builder *builder,
|
2017-07-17 09:12:02 -07:00
|
|
|
uint32_t *id, vkd3d_spirv_build_pfn build_pfn)
|
2017-07-17 09:12:02 -07:00
|
|
|
{
|
|
|
|
if (!(*id))
|
|
|
|
*id = build_pfn(builder);
|
|
|
|
return *id;
|
|
|
|
}
|
|
|
|
|
2017-07-17 09:12:02 -07:00
|
|
|
#define MAX_SPIRV_DECLARATION_PARAMETER_COUNT 7
|
2017-07-17 09:12:02 -07:00
|
|
|
|
|
|
|
struct vkd3d_spirv_declaration
|
|
|
|
{
|
|
|
|
struct rb_entry entry;
|
|
|
|
|
|
|
|
SpvOp op;
|
|
|
|
unsigned int parameter_count;
|
|
|
|
uint32_t parameters[MAX_SPIRV_DECLARATION_PARAMETER_COUNT];
|
|
|
|
uint32_t id;
|
|
|
|
};
|
|
|
|
|
|
|
|
static int vkd3d_spirv_declaration_compare(const void *key, const struct rb_entry *e)
|
|
|
|
{
|
|
|
|
const struct vkd3d_spirv_declaration *a = key;
|
|
|
|
const struct vkd3d_spirv_declaration *b = RB_ENTRY_VALUE(e, const struct vkd3d_spirv_declaration, entry);
|
|
|
|
|
|
|
|
if (a->op != b->op)
|
|
|
|
return a->op - b->op;
|
|
|
|
if (a->parameter_count != b->parameter_count)
|
|
|
|
return a->parameter_count - b->parameter_count;
|
|
|
|
assert(a->parameter_count <= ARRAY_SIZE(a->parameters));
|
|
|
|
return memcmp(&a->parameters, &b->parameters, a->parameter_count * sizeof(*a->parameters));
|
|
|
|
}
|
|
|
|
|
|
|
|
static void vkd3d_spirv_declaration_free(struct rb_entry *entry, void *context)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_declaration *d = RB_ENTRY_VALUE(entry, struct vkd3d_spirv_declaration, entry);
|
|
|
|
|
|
|
|
vkd3d_free(d);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void vkd3d_spirv_insert_declaration(struct vkd3d_spirv_builder *builder,
|
|
|
|
const struct vkd3d_spirv_declaration *declaration)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_declaration *d;
|
|
|
|
|
2017-07-19 05:45:54 -07:00
|
|
|
assert(declaration->parameter_count <= ARRAY_SIZE(declaration->parameters));
|
|
|
|
|
2017-07-17 09:12:02 -07:00
|
|
|
if (!(d = vkd3d_malloc(sizeof(*d))))
|
|
|
|
return;
|
|
|
|
memcpy(d, declaration, sizeof(*d));
|
|
|
|
if (rb_put(&builder->declarations, d, &d->entry) == -1)
|
|
|
|
{
|
|
|
|
ERR("Failed to insert declaration entry.\n");
|
|
|
|
vkd3d_free(d);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static uint32_t vkd3d_spirv_build_once1(struct vkd3d_spirv_builder *builder,
|
|
|
|
SpvOp op, uint32_t operand0, vkd3d_spirv_build1_pfn build_pfn)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_declaration declaration;
|
|
|
|
struct rb_entry *entry;
|
|
|
|
|
|
|
|
declaration.op = op;
|
|
|
|
declaration.parameter_count = 1;
|
|
|
|
declaration.parameters[0] = operand0;
|
|
|
|
|
|
|
|
if ((entry = rb_get(&builder->declarations, &declaration)))
|
|
|
|
return RB_ENTRY_VALUE(entry, struct vkd3d_spirv_declaration, entry)->id;
|
|
|
|
|
|
|
|
declaration.id = build_pfn(builder, operand0);
|
|
|
|
vkd3d_spirv_insert_declaration(builder, &declaration);
|
|
|
|
return declaration.id;
|
|
|
|
}
|
|
|
|
|
2017-07-19 05:45:54 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_once1v(struct vkd3d_spirv_builder *builder,
|
|
|
|
SpvOp op, uint32_t operand0, const uint32_t *operands, unsigned int operand_count,
|
|
|
|
vkd3d_spirv_build1v_pfn build_pfn)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_declaration declaration;
|
|
|
|
unsigned int i, param_idx = 0;
|
|
|
|
struct rb_entry *entry;
|
|
|
|
|
2019-02-06 03:38:08 -08:00
|
|
|
if (operand_count >= ARRAY_SIZE(declaration.parameters))
|
|
|
|
{
|
|
|
|
WARN("Unsupported parameter count %u (opcode %#x).\n", operand_count + 1, op);
|
|
|
|
return build_pfn(builder, operand0, operands, operand_count);
|
|
|
|
}
|
|
|
|
|
2017-07-19 05:45:54 -07:00
|
|
|
declaration.op = op;
|
|
|
|
declaration.parameters[param_idx++] = operand0;
|
|
|
|
for (i = 0; i < operand_count; ++i)
|
|
|
|
declaration.parameters[param_idx++] = operands[i];
|
|
|
|
declaration.parameter_count = param_idx;
|
|
|
|
|
|
|
|
if ((entry = rb_get(&builder->declarations, &declaration)))
|
|
|
|
return RB_ENTRY_VALUE(entry, struct vkd3d_spirv_declaration, entry)->id;
|
|
|
|
|
|
|
|
declaration.id = build_pfn(builder, operand0, operands, operand_count);
|
|
|
|
vkd3d_spirv_insert_declaration(builder, &declaration);
|
|
|
|
return declaration.id;
|
|
|
|
}
|
|
|
|
|
2017-07-17 09:12:02 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_once2(struct vkd3d_spirv_builder *builder,
|
|
|
|
SpvOp op, uint32_t operand0, uint32_t operand1, vkd3d_spirv_build2_pfn build_pfn)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_declaration declaration;
|
|
|
|
struct rb_entry *entry;
|
|
|
|
|
|
|
|
declaration.op = op;
|
|
|
|
declaration.parameter_count = 2;
|
|
|
|
declaration.parameters[0] = operand0;
|
|
|
|
declaration.parameters[1] = operand1;
|
|
|
|
|
|
|
|
if ((entry = rb_get(&builder->declarations, &declaration)))
|
|
|
|
return RB_ENTRY_VALUE(entry, struct vkd3d_spirv_declaration, entry)->id;
|
|
|
|
|
|
|
|
declaration.id = build_pfn(builder, operand0, operand1);
|
|
|
|
vkd3d_spirv_insert_declaration(builder, &declaration);
|
|
|
|
return declaration.id;
|
|
|
|
}
|
|
|
|
|
2017-07-17 09:12:02 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_once7(struct vkd3d_spirv_builder *builder,
|
|
|
|
SpvOp op, const uint32_t *operands, vkd3d_spirv_build7_pfn build_pfn)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_declaration declaration;
|
|
|
|
struct rb_entry *entry;
|
|
|
|
|
|
|
|
declaration.op = op;
|
|
|
|
declaration.parameter_count = 7;
|
|
|
|
memcpy(&declaration.parameters, operands, declaration.parameter_count * sizeof(*operands));
|
|
|
|
|
|
|
|
if ((entry = rb_get(&builder->declarations, &declaration)))
|
|
|
|
return RB_ENTRY_VALUE(entry, struct vkd3d_spirv_declaration, entry)->id;
|
|
|
|
|
|
|
|
declaration.id = build_pfn(builder, operands[0], operands[1], operands[2],
|
|
|
|
operands[3], operands[4], operands[5], operands[6]);
|
|
|
|
vkd3d_spirv_insert_declaration(builder, &declaration);
|
|
|
|
return declaration.id;
|
|
|
|
}
|
|
|
|
|
2017-06-19 09:05:53 -07:00
|
|
|
/*
|
|
|
|
* vkd3d_spirv_build_op[1-3][v]()
|
|
|
|
* vkd3d_spirv_build_op_[t][r][1-3][v]()
|
|
|
|
*
|
|
|
|
* t - result type
|
|
|
|
* r - result id
|
|
|
|
* 1-3 - the number of operands
|
|
|
|
* v - variable number of operands
|
|
|
|
*/
|
|
|
|
static void vkd3d_spirv_build_op(struct vkd3d_spirv_stream *stream, SpvOp op)
|
|
|
|
{
|
|
|
|
vkd3d_spirv_build_word(stream, vkd3d_spirv_opcode_word(op, 1));
|
|
|
|
}
|
|
|
|
|
|
|
|
static void vkd3d_spirv_build_op1(struct vkd3d_spirv_stream *stream,
|
|
|
|
SpvOp op, uint32_t operand)
|
|
|
|
{
|
|
|
|
vkd3d_spirv_build_word(stream, vkd3d_spirv_opcode_word(op, 2));
|
|
|
|
vkd3d_spirv_build_word(stream, operand);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void vkd3d_spirv_build_op1v(struct vkd3d_spirv_stream *stream,
|
|
|
|
SpvOp op, uint32_t operand0, const uint32_t *operands, unsigned int operand_count)
|
|
|
|
{
|
|
|
|
unsigned int i;
|
|
|
|
vkd3d_spirv_build_word(stream, vkd3d_spirv_opcode_word(op, 2 + operand_count));
|
|
|
|
vkd3d_spirv_build_word(stream, operand0);
|
|
|
|
for (i = 0; i < operand_count; ++i)
|
|
|
|
vkd3d_spirv_build_word(stream, operands[i]);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void vkd3d_spirv_build_op2v(struct vkd3d_spirv_stream *stream,
|
|
|
|
SpvOp op, uint32_t operand0, uint32_t operand1,
|
|
|
|
const uint32_t *operands, unsigned int operand_count)
|
|
|
|
{
|
|
|
|
unsigned int i;
|
|
|
|
vkd3d_spirv_build_word(stream, vkd3d_spirv_opcode_word(op, 3 + operand_count));
|
|
|
|
vkd3d_spirv_build_word(stream, operand0);
|
|
|
|
vkd3d_spirv_build_word(stream, operand1);
|
|
|
|
for (i = 0; i < operand_count; ++i)
|
|
|
|
vkd3d_spirv_build_word(stream, operands[i]);
|
|
|
|
}
|
|
|
|
|
2017-06-23 13:24:33 -07:00
|
|
|
static void vkd3d_spirv_build_op3v(struct vkd3d_spirv_stream *stream,
|
|
|
|
SpvOp op, uint32_t operand0, uint32_t operand1, uint32_t operand2,
|
|
|
|
const uint32_t *operands, unsigned int operand_count)
|
|
|
|
{
|
|
|
|
unsigned int i;
|
|
|
|
vkd3d_spirv_build_word(stream, vkd3d_spirv_opcode_word(op, 4 + operand_count));
|
|
|
|
vkd3d_spirv_build_word(stream, operand0);
|
|
|
|
vkd3d_spirv_build_word(stream, operand1);
|
|
|
|
vkd3d_spirv_build_word(stream, operand2);
|
|
|
|
for (i = 0; i < operand_count; ++i)
|
|
|
|
vkd3d_spirv_build_word(stream, operands[i]);
|
|
|
|
}
|
|
|
|
|
2017-06-19 09:05:53 -07:00
|
|
|
static void vkd3d_spirv_build_op2(struct vkd3d_spirv_stream *stream,
|
|
|
|
SpvOp op, uint32_t operand0, uint32_t operand1)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op2v(stream, op, operand0, operand1, NULL, 0);
|
|
|
|
}
|
|
|
|
|
2017-06-20 04:34:44 -07:00
|
|
|
static void vkd3d_spirv_build_op3(struct vkd3d_spirv_stream *stream,
|
|
|
|
SpvOp op, uint32_t operand0, uint32_t operand1, uint32_t operand2)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op2v(stream, op, operand0, operand1, &operand2, 1);
|
|
|
|
}
|
|
|
|
|
2017-06-19 09:05:53 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_rv(struct vkd3d_spirv_builder *builder,
|
|
|
|
struct vkd3d_spirv_stream *stream, SpvOp op,
|
|
|
|
const uint32_t *operands, unsigned int operand_count)
|
|
|
|
{
|
2017-06-26 08:03:31 -07:00
|
|
|
uint32_t result_id = vkd3d_spirv_alloc_id(builder);
|
2017-06-19 09:05:53 -07:00
|
|
|
vkd3d_spirv_build_op1v(stream, op, result_id, operands, operand_count);
|
|
|
|
return result_id;
|
|
|
|
}
|
|
|
|
|
|
|
|
static uint32_t vkd3d_spirv_build_op_r(struct vkd3d_spirv_builder *builder,
|
|
|
|
struct vkd3d_spirv_stream *stream, SpvOp op)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_rv(builder, stream, op, NULL, 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static uint32_t vkd3d_spirv_build_op_r1(struct vkd3d_spirv_builder *builder,
|
|
|
|
struct vkd3d_spirv_stream *stream, SpvOp op, uint32_t operand0)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_rv(builder, stream, op, &operand0, 1);
|
|
|
|
}
|
|
|
|
|
|
|
|
static uint32_t vkd3d_spirv_build_op_r2(struct vkd3d_spirv_builder *builder,
|
|
|
|
struct vkd3d_spirv_stream *stream, SpvOp op, uint32_t operand0, uint32_t operand1)
|
|
|
|
{
|
|
|
|
uint32_t operands[] = {operand0, operand1};
|
|
|
|
return vkd3d_spirv_build_op_rv(builder, stream, op, operands, ARRAY_SIZE(operands));
|
|
|
|
}
|
|
|
|
|
|
|
|
static uint32_t vkd3d_spirv_build_op_r1v(struct vkd3d_spirv_builder *builder,
|
|
|
|
struct vkd3d_spirv_stream *stream, SpvOp op, uint32_t operand0,
|
|
|
|
const uint32_t *operands, unsigned int operand_count)
|
|
|
|
{
|
2017-06-26 08:03:31 -07:00
|
|
|
uint32_t result_id = vkd3d_spirv_alloc_id(builder);
|
2017-06-19 09:05:53 -07:00
|
|
|
vkd3d_spirv_build_op2v(stream, op, result_id, operand0, operands, operand_count);
|
|
|
|
return result_id;
|
|
|
|
}
|
|
|
|
|
|
|
|
static uint32_t vkd3d_spirv_build_op_trv(struct vkd3d_spirv_builder *builder,
|
|
|
|
struct vkd3d_spirv_stream *stream, SpvOp op, uint32_t result_type,
|
|
|
|
const uint32_t *operands, unsigned int operand_count)
|
|
|
|
{
|
2017-06-26 08:03:31 -07:00
|
|
|
uint32_t result_id = vkd3d_spirv_alloc_id(builder);
|
2017-06-19 09:05:53 -07:00
|
|
|
vkd3d_spirv_build_op2v(stream, op, result_type, result_id, operands, operand_count);
|
|
|
|
return result_id;
|
|
|
|
}
|
|
|
|
|
2017-06-20 04:34:44 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_tr(struct vkd3d_spirv_builder *builder,
|
|
|
|
struct vkd3d_spirv_stream *stream, SpvOp op, uint32_t result_type)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_trv(builder, stream, op, result_type, NULL, 0);
|
|
|
|
}
|
|
|
|
|
2017-06-20 04:34:44 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_tr1(struct vkd3d_spirv_builder *builder,
|
|
|
|
struct vkd3d_spirv_stream *stream, SpvOp op, uint32_t result_type,
|
|
|
|
uint32_t operand0)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_trv(builder, stream, op, result_type, &operand0, 1);
|
|
|
|
}
|
|
|
|
|
2017-06-19 09:05:53 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_tr2(struct vkd3d_spirv_builder *builder,
|
|
|
|
struct vkd3d_spirv_stream *stream, SpvOp op, uint32_t result_type,
|
|
|
|
uint32_t operand0, uint32_t operand1)
|
|
|
|
{
|
|
|
|
uint32_t operands[] = {operand0, operand1};
|
|
|
|
return vkd3d_spirv_build_op_trv(builder, stream, op, result_type,
|
|
|
|
operands, ARRAY_SIZE(operands));
|
|
|
|
}
|
|
|
|
|
2017-08-21 03:41:07 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_tr3(struct vkd3d_spirv_builder *builder,
|
|
|
|
struct vkd3d_spirv_stream *stream, SpvOp op, uint32_t result_type,
|
|
|
|
uint32_t operand0, uint32_t operand1, uint32_t operand2)
|
|
|
|
{
|
|
|
|
uint32_t operands[] = {operand0, operand1, operand2};
|
|
|
|
return vkd3d_spirv_build_op_trv(builder, stream, op, result_type,
|
|
|
|
operands, ARRAY_SIZE(operands));
|
|
|
|
}
|
|
|
|
|
2017-06-20 04:34:44 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_tr1v(struct vkd3d_spirv_builder *builder,
|
|
|
|
struct vkd3d_spirv_stream *stream, SpvOp op, uint32_t result_type,
|
|
|
|
uint32_t operand0, const uint32_t *operands, unsigned int operand_count)
|
|
|
|
{
|
2017-06-26 08:03:31 -07:00
|
|
|
uint32_t result_id = vkd3d_spirv_alloc_id(builder);
|
2017-06-23 13:24:33 -07:00
|
|
|
vkd3d_spirv_build_op3v(stream, op, result_type, result_id, operand0, operands, operand_count);
|
2017-06-20 04:34:44 -07:00
|
|
|
return result_id;
|
|
|
|
}
|
|
|
|
|
|
|
|
static uint32_t vkd3d_spirv_build_op_tr2v(struct vkd3d_spirv_builder *builder,
|
|
|
|
struct vkd3d_spirv_stream *stream, SpvOp op, uint32_t result_type,
|
|
|
|
uint32_t operand0, uint32_t operand1, const uint32_t *operands, unsigned int operand_count)
|
|
|
|
{
|
2017-06-26 08:03:31 -07:00
|
|
|
uint32_t result_id = vkd3d_spirv_alloc_id(builder);
|
2017-06-20 04:34:44 -07:00
|
|
|
unsigned int i;
|
|
|
|
vkd3d_spirv_build_word(stream, vkd3d_spirv_opcode_word(op, 5 + operand_count));
|
|
|
|
vkd3d_spirv_build_word(stream, result_type);
|
|
|
|
vkd3d_spirv_build_word(stream, result_id);
|
|
|
|
vkd3d_spirv_build_word(stream, operand0);
|
|
|
|
vkd3d_spirv_build_word(stream, operand1);
|
|
|
|
for (i = 0; i < operand_count; ++i)
|
|
|
|
vkd3d_spirv_build_word(stream, operands[i]);
|
|
|
|
return result_id;
|
|
|
|
}
|
|
|
|
|
2017-08-01 01:51:45 -07:00
|
|
|
static void vkd3d_spirv_begin_function_stream_insertion(struct vkd3d_spirv_builder *builder,
|
|
|
|
size_t location)
|
|
|
|
{
|
|
|
|
assert(builder->insertion_location == ~(size_t)0);
|
2017-10-25 00:58:14 -07:00
|
|
|
|
|
|
|
if (vkd3d_spirv_stream_current_location(&builder->function_stream) == location)
|
|
|
|
return;
|
|
|
|
|
2017-08-01 01:51:45 -07:00
|
|
|
builder->original_function_stream = builder->function_stream;
|
|
|
|
builder->function_stream = builder->insertion_stream;
|
|
|
|
builder->insertion_location = location;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void vkd3d_spirv_end_function_stream_insertion(struct vkd3d_spirv_builder *builder)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_stream *insertion_stream = &builder->insertion_stream;
|
|
|
|
|
2017-10-25 00:58:14 -07:00
|
|
|
if (builder->insertion_location == ~(size_t)0)
|
|
|
|
return;
|
2017-08-01 01:51:45 -07:00
|
|
|
|
|
|
|
builder->insertion_stream = builder->function_stream;
|
|
|
|
builder->function_stream = builder->original_function_stream;
|
|
|
|
|
|
|
|
vkd3d_spirv_stream_insert(&builder->function_stream, builder->insertion_location,
|
|
|
|
insertion_stream->words, insertion_stream->word_count);
|
|
|
|
vkd3d_spirv_stream_clear(insertion_stream);
|
|
|
|
builder->insertion_location = ~(size_t)0;
|
|
|
|
}
|
|
|
|
|
2017-10-18 10:02:46 -07:00
|
|
|
struct vkd3d_spirv_op_branch_conditional
|
|
|
|
{
|
|
|
|
uint32_t opcode;
|
|
|
|
uint32_t condition_id;
|
|
|
|
uint32_t true_label;
|
|
|
|
uint32_t false_label;
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct vkd3d_spirv_op_branch_conditional *vkd3d_spirv_as_op_branch_conditional(
|
|
|
|
struct vkd3d_spirv_stream *stream, size_t location)
|
|
|
|
{
|
|
|
|
return (struct vkd3d_spirv_op_branch_conditional *)&stream->words[location];
|
|
|
|
}
|
|
|
|
|
2017-06-19 09:05:53 -07:00
|
|
|
static void vkd3d_spirv_build_op_capability(struct vkd3d_spirv_stream *stream,
|
|
|
|
SpvCapability cap)
|
|
|
|
{
|
|
|
|
vkd3d_spirv_build_op1(stream, SpvOpCapability, cap);
|
|
|
|
}
|
|
|
|
|
2017-09-12 08:42:42 -07:00
|
|
|
static void vkd3d_spirv_build_op_extension(struct vkd3d_spirv_stream *stream,
|
|
|
|
const char *name)
|
|
|
|
{
|
|
|
|
unsigned int name_size = vkd3d_spirv_string_word_count(name);
|
|
|
|
vkd3d_spirv_build_word(stream, vkd3d_spirv_opcode_word(SpvOpExtension, 1 + name_size));
|
|
|
|
vkd3d_spirv_build_string(stream, name, name_size);
|
|
|
|
}
|
|
|
|
|
2017-06-20 05:59:25 -07:00
|
|
|
static void vkd3d_spirv_build_op_ext_inst_import(struct vkd3d_spirv_stream *stream,
|
|
|
|
uint32_t result_id, const char *name)
|
|
|
|
{
|
|
|
|
unsigned int name_size = vkd3d_spirv_string_word_count(name);
|
|
|
|
vkd3d_spirv_build_word(stream, vkd3d_spirv_opcode_word(SpvOpExtInstImport, 2 + name_size));
|
|
|
|
vkd3d_spirv_build_word(stream, result_id);
|
|
|
|
vkd3d_spirv_build_string(stream, name, name_size);
|
|
|
|
}
|
|
|
|
|
|
|
|
static uint32_t vkd3d_spirv_build_op_ext_inst(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t result_type, uint32_t inst_set, uint32_t inst_number,
|
2017-06-27 13:21:43 -07:00
|
|
|
uint32_t *operands, unsigned int operand_count)
|
2017-06-20 05:59:25 -07:00
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_tr2v(builder, &builder->function_stream,
|
|
|
|
SpvOpExtInst, result_type, inst_set, inst_number, operands, operand_count);
|
|
|
|
}
|
|
|
|
|
2017-06-19 09:05:53 -07:00
|
|
|
static void vkd3d_spirv_build_op_memory_model(struct vkd3d_spirv_stream *stream,
|
|
|
|
SpvAddressingModel addressing_model, SpvMemoryModel memory_model)
|
|
|
|
{
|
|
|
|
vkd3d_spirv_build_op2(stream, SpvOpMemoryModel, addressing_model, memory_model);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void vkd3d_spirv_build_op_entry_point(struct vkd3d_spirv_stream *stream,
|
|
|
|
SpvExecutionModel model, uint32_t function_id, const char *name,
|
|
|
|
uint32_t *interface_list, unsigned int interface_size)
|
|
|
|
{
|
|
|
|
unsigned int i, name_size = vkd3d_spirv_string_word_count(name);
|
|
|
|
vkd3d_spirv_build_word(stream, vkd3d_spirv_opcode_word(SpvOpEntryPoint, 3 + name_size + interface_size));
|
|
|
|
vkd3d_spirv_build_word(stream, model);
|
|
|
|
vkd3d_spirv_build_word(stream, function_id);
|
|
|
|
vkd3d_spirv_build_string(stream, name, name_size);
|
|
|
|
for (i = 0; i < interface_size; ++i)
|
|
|
|
vkd3d_spirv_build_word(stream, interface_list[i]);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void vkd3d_spirv_build_op_execution_mode(struct vkd3d_spirv_stream *stream,
|
2018-01-11 08:03:52 -08:00
|
|
|
uint32_t entry_point, SpvExecutionMode mode, const uint32_t *literals, unsigned int literal_count)
|
2017-06-19 09:05:53 -07:00
|
|
|
{
|
|
|
|
vkd3d_spirv_build_op2v(stream, SpvOpExecutionMode, entry_point, mode, literals, literal_count);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void vkd3d_spirv_build_op_name(struct vkd3d_spirv_builder *builder,
|
2017-06-26 08:03:31 -07:00
|
|
|
uint32_t id, const char *fmt, ...)
|
2017-06-19 09:05:53 -07:00
|
|
|
{
|
|
|
|
struct vkd3d_spirv_stream *stream = &builder->debug_stream;
|
2017-06-26 08:03:31 -07:00
|
|
|
unsigned int name_size;
|
|
|
|
char name[1024];
|
|
|
|
va_list args;
|
|
|
|
|
|
|
|
va_start(args, fmt);
|
|
|
|
vsnprintf(name, ARRAY_SIZE(name), fmt, args);
|
|
|
|
name[ARRAY_SIZE(name) - 1] = '\0';
|
|
|
|
va_end(args);
|
|
|
|
|
|
|
|
name_size = vkd3d_spirv_string_word_count(name);
|
2017-06-19 09:05:53 -07:00
|
|
|
vkd3d_spirv_build_word(stream, vkd3d_spirv_opcode_word(SpvOpName, 2 + name_size));
|
|
|
|
vkd3d_spirv_build_word(stream, id);
|
|
|
|
vkd3d_spirv_build_string(stream, name, name_size);
|
|
|
|
}
|
|
|
|
|
2017-07-27 06:16:49 -07:00
|
|
|
static void vkd3d_spirv_build_op_member_name(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t type_id, uint32_t member, const char *fmt, ...)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_stream *stream = &builder->debug_stream;
|
|
|
|
unsigned int name_size;
|
|
|
|
char name[1024];
|
|
|
|
va_list args;
|
|
|
|
|
|
|
|
va_start(args, fmt);
|
|
|
|
vsnprintf(name, ARRAY_SIZE(name), fmt, args);
|
|
|
|
name[ARRAY_SIZE(name) - 1] = '\0';
|
|
|
|
va_end(args);
|
|
|
|
|
|
|
|
name_size = vkd3d_spirv_string_word_count(name);
|
|
|
|
vkd3d_spirv_build_word(stream, vkd3d_spirv_opcode_word(SpvOpMemberName, 3 + name_size));
|
|
|
|
vkd3d_spirv_build_word(stream, type_id);
|
|
|
|
vkd3d_spirv_build_word(stream, member);
|
|
|
|
vkd3d_spirv_build_string(stream, name, name_size);
|
|
|
|
}
|
|
|
|
|
2017-06-20 04:34:44 -07:00
|
|
|
static void vkd3d_spirv_build_op_decorate(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t target_id, SpvDecoration decoration,
|
|
|
|
uint32_t *literals, uint32_t literal_count)
|
|
|
|
{
|
|
|
|
vkd3d_spirv_build_op2v(&builder->annotation_stream,
|
|
|
|
SpvOpDecorate, target_id, decoration, literals, literal_count);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void vkd3d_spirv_build_op_decorate1(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t target_id, SpvDecoration decoration, uint32_t operand0)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_decorate(builder, target_id, decoration, &operand0, 1);
|
|
|
|
}
|
|
|
|
|
2017-06-23 13:24:33 -07:00
|
|
|
static void vkd3d_spirv_build_op_member_decorate(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t structure_type_id, uint32_t member_idx, SpvDecoration decoration,
|
|
|
|
uint32_t *literals, uint32_t literal_count)
|
|
|
|
{
|
|
|
|
vkd3d_spirv_build_op3v(&builder->annotation_stream, SpvOpMemberDecorate,
|
|
|
|
structure_type_id, member_idx, decoration, literals, literal_count);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void vkd3d_spirv_build_op_member_decorate1(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t structure_type_id, uint32_t member_idx, SpvDecoration decoration, uint32_t operand0)
|
|
|
|
{
|
|
|
|
vkd3d_spirv_build_op_member_decorate(builder, structure_type_id, member_idx, decoration, &operand0, 1);
|
|
|
|
}
|
|
|
|
|
2017-06-19 09:05:53 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_type_void(struct vkd3d_spirv_builder *builder)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_r(builder, &builder->global_stream, SpvOpTypeVoid);
|
|
|
|
}
|
|
|
|
|
2017-07-17 09:12:02 -07:00
|
|
|
static uint32_t vkd3d_spirv_get_op_type_void(struct vkd3d_spirv_builder *builder)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_once(builder, &builder->type_void_id, vkd3d_spirv_build_op_type_void);
|
|
|
|
}
|
|
|
|
|
2017-06-26 08:03:31 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_type_bool(struct vkd3d_spirv_builder *builder)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_r(builder, &builder->global_stream, SpvOpTypeBool);
|
|
|
|
}
|
|
|
|
|
2017-07-17 09:12:02 -07:00
|
|
|
static uint32_t vkd3d_spirv_get_op_type_bool(struct vkd3d_spirv_builder *builder)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_once(builder, &builder->type_bool_id, vkd3d_spirv_build_op_type_bool);
|
|
|
|
}
|
|
|
|
|
2017-06-19 09:05:53 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_type_float(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t width)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_r1(builder, &builder->global_stream, SpvOpTypeFloat, width);
|
|
|
|
}
|
|
|
|
|
2017-07-17 09:12:02 -07:00
|
|
|
static uint32_t vkd3d_spirv_get_op_type_float(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t width)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_once1(builder, SpvOpTypeFloat, width, vkd3d_spirv_build_op_type_float);
|
|
|
|
}
|
|
|
|
|
2017-06-19 09:05:53 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_type_int(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t width, uint32_t signedness)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_r2(builder, &builder->global_stream, SpvOpTypeInt, width, signedness);
|
|
|
|
}
|
|
|
|
|
2017-07-17 09:12:02 -07:00
|
|
|
static uint32_t vkd3d_spirv_get_op_type_int(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t width, uint32_t signedness)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_once2(builder, SpvOpTypeInt, width, signedness,
|
|
|
|
vkd3d_spirv_build_op_type_int);
|
|
|
|
}
|
|
|
|
|
2017-06-19 09:05:53 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_type_vector(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t component_type, uint32_t component_count)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_r2(builder, &builder->global_stream,
|
|
|
|
SpvOpTypeVector, component_type, component_count);
|
|
|
|
}
|
|
|
|
|
2017-07-17 09:12:02 -07:00
|
|
|
static uint32_t vkd3d_spirv_get_op_type_vector(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t component_type, uint32_t component_count)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_once2(builder, SpvOpTypeVector, component_type, component_count,
|
|
|
|
vkd3d_spirv_build_op_type_vector);
|
|
|
|
}
|
|
|
|
|
2017-06-20 08:09:39 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_type_array(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t element_type, uint32_t length_id)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_r2(builder, &builder->global_stream,
|
|
|
|
SpvOpTypeArray, element_type, length_id);
|
|
|
|
}
|
|
|
|
|
2017-08-24 02:11:16 -07:00
|
|
|
static uint32_t vkd3d_spirv_get_op_type_array(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t element_type, uint32_t length_id)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_once2(builder, SpvOpTypeArray, element_type, length_id,
|
|
|
|
vkd3d_spirv_build_op_type_array);
|
|
|
|
}
|
|
|
|
|
2017-06-20 08:09:39 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_type_struct(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t *members, unsigned int member_count)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_rv(builder, &builder->global_stream,
|
|
|
|
SpvOpTypeStruct, members, member_count);
|
|
|
|
}
|
|
|
|
|
2017-07-14 04:44:35 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_type_sampler(struct vkd3d_spirv_builder *builder)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_r(builder, &builder->global_stream, SpvOpTypeSampler);
|
|
|
|
}
|
|
|
|
|
2017-07-17 09:12:02 -07:00
|
|
|
static uint32_t vkd3d_spirv_get_op_type_sampler(struct vkd3d_spirv_builder *builder)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_once(builder, &builder->type_sampler_id, vkd3d_spirv_build_op_type_sampler);
|
|
|
|
}
|
|
|
|
|
2017-07-17 07:25:29 -07:00
|
|
|
/* Access qualifiers are not supported. */
|
|
|
|
static uint32_t vkd3d_spirv_build_op_type_image(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t sampled_type_id, SpvDim dim, uint32_t depth, uint32_t arrayed,
|
|
|
|
uint32_t ms, uint32_t sampled, SpvImageFormat format)
|
|
|
|
{
|
|
|
|
uint32_t operands[] = {sampled_type_id, dim, depth, arrayed, ms, sampled, format};
|
|
|
|
return vkd3d_spirv_build_op_rv(builder, &builder->global_stream,
|
|
|
|
SpvOpTypeImage, operands, ARRAY_SIZE(operands));
|
|
|
|
}
|
|
|
|
|
2017-07-17 09:12:02 -07:00
|
|
|
static uint32_t vkd3d_spirv_get_op_type_image(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t sampled_type_id, SpvDim dim, uint32_t depth, uint32_t arrayed,
|
|
|
|
uint32_t ms, uint32_t sampled, SpvImageFormat format)
|
|
|
|
{
|
|
|
|
uint32_t operands[] = {sampled_type_id, dim, depth, arrayed, ms, sampled, format};
|
|
|
|
return vkd3d_spirv_build_once7(builder, SpvOpTypeImage, operands,
|
|
|
|
vkd3d_spirv_build_op_type_image);
|
|
|
|
}
|
|
|
|
|
2017-07-17 07:25:29 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_type_sampled_image(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t image_type_id)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_r1(builder, &builder->global_stream,
|
|
|
|
SpvOpTypeSampledImage, image_type_id);
|
|
|
|
}
|
|
|
|
|
2017-07-17 09:12:02 -07:00
|
|
|
static uint32_t vkd3d_spirv_get_op_type_sampled_image(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t image_type_id)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_once1(builder, SpvOpTypeSampledImage, image_type_id,
|
|
|
|
vkd3d_spirv_build_op_type_sampled_image);
|
|
|
|
}
|
|
|
|
|
2017-06-19 09:05:53 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_type_function(struct vkd3d_spirv_builder *builder,
|
2019-02-06 03:38:08 -08:00
|
|
|
uint32_t return_type, const uint32_t *param_types, unsigned int param_count)
|
2017-06-19 09:05:53 -07:00
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_r1v(builder, &builder->global_stream,
|
|
|
|
SpvOpTypeFunction, return_type, param_types, param_count);
|
|
|
|
}
|
|
|
|
|
2019-02-06 03:38:08 -08:00
|
|
|
static uint32_t vkd3d_spirv_get_op_type_function(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t return_type, const uint32_t *param_types, unsigned int param_count)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_once1v(builder, SpvOpTypeFunction, return_type,
|
|
|
|
param_types, param_count, vkd3d_spirv_build_op_type_function);
|
|
|
|
}
|
|
|
|
|
2017-06-20 04:34:44 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_type_pointer(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t storage_class, uint32_t type_id)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_r2(builder, &builder->global_stream,
|
|
|
|
SpvOpTypePointer, storage_class, type_id);
|
|
|
|
}
|
|
|
|
|
2017-07-17 09:12:02 -07:00
|
|
|
static uint32_t vkd3d_spirv_get_op_type_pointer(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t storage_class, uint32_t type_id)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_once2(builder, SpvOpTypePointer, storage_class, type_id,
|
|
|
|
vkd3d_spirv_build_op_type_pointer);
|
|
|
|
}
|
|
|
|
|
2017-06-20 04:34:44 -07:00
|
|
|
/* Types larger than 32-bits are not supported. */
|
|
|
|
static uint32_t vkd3d_spirv_build_op_constant(struct vkd3d_spirv_builder *builder,
|
2017-07-19 05:45:54 -07:00
|
|
|
uint32_t result_type, uint32_t value)
|
2017-06-20 04:34:44 -07:00
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_tr1(builder, &builder->global_stream,
|
|
|
|
SpvOpConstant, result_type, value);
|
|
|
|
}
|
|
|
|
|
2017-07-19 05:45:54 -07:00
|
|
|
static uint32_t vkd3d_spirv_get_op_constant(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t result_type, uint32_t value)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_once2(builder, SpvOpConstant, result_type, value,
|
|
|
|
vkd3d_spirv_build_op_constant);
|
|
|
|
}
|
|
|
|
|
2017-06-20 04:34:44 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_constant_composite(struct vkd3d_spirv_builder *builder,
|
2017-07-19 05:45:54 -07:00
|
|
|
uint32_t result_type, const uint32_t *constituents, unsigned int constituent_count)
|
2017-06-20 04:34:44 -07:00
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_trv(builder, &builder->global_stream,
|
|
|
|
SpvOpConstantComposite, result_type, constituents, constituent_count);
|
|
|
|
}
|
|
|
|
|
2017-07-19 05:45:54 -07:00
|
|
|
static uint32_t vkd3d_spirv_get_op_constant_composite(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t result_type, const uint32_t *constituents, unsigned int constituent_count)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_once1v(builder, SpvOpConstantComposite, result_type,
|
|
|
|
constituents, constituent_count, vkd3d_spirv_build_op_constant_composite);
|
|
|
|
}
|
|
|
|
|
2017-06-20 04:34:44 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_variable(struct vkd3d_spirv_builder *builder,
|
2017-07-11 08:23:02 -07:00
|
|
|
struct vkd3d_spirv_stream *stream, uint32_t type_id, uint32_t storage_class, uint32_t initializer)
|
2017-06-20 04:34:44 -07:00
|
|
|
{
|
2017-07-11 08:23:02 -07:00
|
|
|
return vkd3d_spirv_build_op_tr1v(builder, stream,
|
|
|
|
SpvOpVariable, type_id, storage_class, &initializer, !!initializer);
|
2017-06-20 04:34:44 -07:00
|
|
|
}
|
|
|
|
|
2017-06-19 09:05:53 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_function(struct vkd3d_spirv_builder *builder,
|
2017-07-10 06:33:34 -07:00
|
|
|
uint32_t result_type, uint32_t result_id, uint32_t function_control, uint32_t function_type)
|
2017-06-19 09:05:53 -07:00
|
|
|
{
|
2017-07-10 06:33:34 -07:00
|
|
|
vkd3d_spirv_build_op3v(&builder->function_stream,
|
|
|
|
SpvOpFunction, result_type, result_id, function_control, &function_type, 1);
|
|
|
|
return result_id;
|
|
|
|
}
|
|
|
|
|
|
|
|
static uint32_t vkd3d_spirv_build_op_function_parameter(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t result_type)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_tr(builder, &builder->function_stream,
|
|
|
|
SpvOpFunctionParameter, result_type);
|
2017-06-19 09:05:53 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
static void vkd3d_spirv_build_op_function_end(struct vkd3d_spirv_builder *builder)
|
|
|
|
{
|
|
|
|
vkd3d_spirv_build_op(&builder->function_stream, SpvOpFunctionEnd);
|
|
|
|
}
|
|
|
|
|
2017-07-10 06:33:34 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_function_call(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t result_type, uint32_t function_id, const uint32_t *arguments, unsigned int argument_count)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_tr1v(builder, &builder->function_stream,
|
|
|
|
SpvOpFunctionCall, result_type, function_id, arguments, argument_count);
|
|
|
|
}
|
|
|
|
|
2017-06-20 04:34:44 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_undef(struct vkd3d_spirv_builder *builder,
|
|
|
|
struct vkd3d_spirv_stream *stream, uint32_t type_id)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_tr(builder, stream, SpvOpUndef, type_id);
|
|
|
|
}
|
|
|
|
|
|
|
|
static uint32_t vkd3d_spirv_build_op_access_chain(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t result_type, uint32_t base_id, uint32_t *indexes, uint32_t index_count)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_tr1v(builder, &builder->function_stream,
|
|
|
|
SpvOpAccessChain, result_type, base_id, indexes, index_count);
|
|
|
|
}
|
|
|
|
|
2019-02-01 00:42:48 -08:00
|
|
|
static uint32_t vkd3d_spirv_build_op_access_chain1(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t result_type, uint32_t base_id, uint32_t index)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_access_chain(builder, result_type, base_id, &index, 1);
|
|
|
|
}
|
|
|
|
|
2017-06-20 04:34:44 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_in_bounds_access_chain(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t result_type, uint32_t base_id, uint32_t *indexes, uint32_t index_count)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_tr1v(builder, &builder->function_stream,
|
|
|
|
SpvOpInBoundsAccessChain, result_type, base_id, indexes, index_count);
|
|
|
|
}
|
|
|
|
|
|
|
|
static uint32_t vkd3d_spirv_build_op_vector_shuffle(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t result_type, uint32_t vector1_id, uint32_t vector2_id,
|
2017-07-06 09:11:57 -07:00
|
|
|
const uint32_t *components, uint32_t component_count)
|
2017-06-20 04:34:44 -07:00
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_tr2v(builder, &builder->function_stream, SpvOpVectorShuffle,
|
|
|
|
result_type, vector1_id, vector2_id, components, component_count);
|
|
|
|
}
|
|
|
|
|
2017-07-06 09:11:57 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_composite_construct(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t result_type, const uint32_t *constituents, unsigned int constituent_count)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_trv(builder, &builder->function_stream, SpvOpCompositeConstruct,
|
|
|
|
result_type, constituents, constituent_count);
|
|
|
|
}
|
|
|
|
|
2017-07-06 09:11:57 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_composite_extract(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t result_type, uint32_t composite_id, const uint32_t *indexes, unsigned int index_count)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_tr1v(builder, &builder->function_stream, SpvOpCompositeExtract,
|
|
|
|
result_type, composite_id, indexes, index_count);
|
|
|
|
}
|
|
|
|
|
2017-08-24 02:11:16 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_composite_extract1(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t result_type, uint32_t composite_id, uint32_t index)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_composite_extract(builder, result_type, composite_id, &index, 1);
|
|
|
|
}
|
|
|
|
|
2017-08-16 08:38:33 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_composite_insert(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t result_type, uint32_t object_id, uint32_t composite_id,
|
|
|
|
const uint32_t *indexes, unsigned int index_count)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_tr2v(builder, &builder->function_stream, SpvOpCompositeInsert,
|
|
|
|
result_type, object_id, composite_id, indexes, index_count);
|
|
|
|
}
|
|
|
|
|
2017-06-20 04:34:44 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_load(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t result_type, uint32_t pointer_id, uint32_t memory_access)
|
|
|
|
{
|
|
|
|
if (!memory_access)
|
|
|
|
return vkd3d_spirv_build_op_tr1(builder, &builder->function_stream, SpvOpLoad,
|
|
|
|
result_type, pointer_id);
|
|
|
|
else
|
|
|
|
return vkd3d_spirv_build_op_tr2(builder, &builder->function_stream, SpvOpLoad,
|
|
|
|
result_type, pointer_id, memory_access);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void vkd3d_spirv_build_op_store(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t pointer_id, uint32_t object_id, uint32_t memory_access)
|
|
|
|
{
|
|
|
|
if (!memory_access)
|
|
|
|
return vkd3d_spirv_build_op2(&builder->function_stream, SpvOpStore,
|
|
|
|
pointer_id, object_id);
|
|
|
|
else
|
|
|
|
return vkd3d_spirv_build_op3(&builder->function_stream, SpvOpStore,
|
|
|
|
pointer_id, object_id, memory_access);
|
|
|
|
}
|
|
|
|
|
2017-06-26 08:03:31 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_select(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t result_type, uint32_t condition_id, uint32_t object0_id, uint32_t object1_id)
|
|
|
|
{
|
2017-08-21 03:41:07 -07:00
|
|
|
return vkd3d_spirv_build_op_tr3(builder, &builder->function_stream,
|
|
|
|
SpvOpSelect, result_type, condition_id, object0_id, object1_id);
|
2017-06-26 08:03:31 -07:00
|
|
|
}
|
|
|
|
|
2017-08-30 07:41:15 -07:00
|
|
|
static void vkd3d_spirv_build_op_kill(struct vkd3d_spirv_builder *builder)
|
|
|
|
{
|
|
|
|
vkd3d_spirv_build_op(&builder->function_stream, SpvOpKill);
|
|
|
|
}
|
|
|
|
|
2017-06-19 09:05:53 -07:00
|
|
|
static void vkd3d_spirv_build_op_return(struct vkd3d_spirv_builder *builder)
|
|
|
|
{
|
|
|
|
vkd3d_spirv_build_op(&builder->function_stream, SpvOpReturn);
|
|
|
|
}
|
|
|
|
|
2017-06-26 08:03:31 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_label(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t label_id)
|
|
|
|
{
|
|
|
|
vkd3d_spirv_build_op1(&builder->function_stream, SpvOpLabel, label_id);
|
|
|
|
return label_id;
|
|
|
|
}
|
|
|
|
|
2017-07-20 04:32:40 -07:00
|
|
|
/* Loop control parameters are not supported. */
|
|
|
|
static void vkd3d_spirv_build_op_loop_merge(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t merge_block, uint32_t continue_target, SpvLoopControlMask loop_control)
|
|
|
|
{
|
|
|
|
vkd3d_spirv_build_op3(&builder->function_stream, SpvOpLoopMerge,
|
|
|
|
merge_block, continue_target, loop_control);
|
|
|
|
}
|
|
|
|
|
2017-06-26 08:03:31 -07:00
|
|
|
static void vkd3d_spirv_build_op_selection_merge(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t merge_block, uint32_t selection_control)
|
|
|
|
{
|
|
|
|
vkd3d_spirv_build_op2(&builder->function_stream, SpvOpSelectionMerge,
|
|
|
|
merge_block, selection_control);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void vkd3d_spirv_build_op_branch(struct vkd3d_spirv_builder *builder, uint32_t label)
|
|
|
|
{
|
|
|
|
vkd3d_spirv_build_op1(&builder->function_stream, SpvOpBranch, label);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Branch weights are not supported. */
|
|
|
|
static void vkd3d_spirv_build_op_branch_conditional(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t condition, uint32_t true_label, uint32_t false_label)
|
|
|
|
{
|
|
|
|
vkd3d_spirv_build_op3(&builder->function_stream, SpvOpBranchConditional,
|
|
|
|
condition, true_label, false_label);
|
|
|
|
}
|
|
|
|
|
2017-08-01 01:51:45 -07:00
|
|
|
static void vkd3d_spirv_build_op_switch(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t selector, uint32_t default_label, uint32_t *targets, unsigned int target_count)
|
|
|
|
{
|
|
|
|
vkd3d_spirv_build_op2v(&builder->function_stream, SpvOpSwitch,
|
|
|
|
selector, default_label, targets, 2 * target_count);
|
|
|
|
}
|
|
|
|
|
2017-07-11 08:23:02 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_iadd(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t result_type, uint32_t operand0, uint32_t operand1)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_tr2(builder, &builder->function_stream,
|
|
|
|
SpvOpIAdd, result_type, operand0, operand1);
|
|
|
|
}
|
|
|
|
|
2017-07-19 04:51:44 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_imul(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t result_type, uint32_t operand0, uint32_t operand1)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_tr2(builder, &builder->function_stream,
|
|
|
|
SpvOpIMul, result_type, operand0, operand1);
|
|
|
|
}
|
|
|
|
|
2017-07-21 05:14:42 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_udiv(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t result_type, uint32_t operand0, uint32_t operand1)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_tr2(builder, &builder->function_stream,
|
|
|
|
SpvOpUDiv, result_type, operand0, operand1);
|
|
|
|
}
|
|
|
|
|
|
|
|
static uint32_t vkd3d_spirv_build_op_umod(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t result_type, uint32_t operand0, uint32_t operand1)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_tr2(builder, &builder->function_stream,
|
|
|
|
SpvOpUMod, result_type, operand0, operand1);
|
|
|
|
}
|
|
|
|
|
2017-06-29 04:40:27 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_isub(struct vkd3d_spirv_builder *builder,
|
2017-06-29 00:02:50 -07:00
|
|
|
uint32_t result_type, uint32_t operand0, uint32_t operand1)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_tr2(builder, &builder->function_stream,
|
|
|
|
SpvOpISub, result_type, operand0, operand1);
|
|
|
|
}
|
|
|
|
|
2017-07-19 04:51:44 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_fdiv(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t result_type, uint32_t operand0, uint32_t operand1)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_tr2(builder, &builder->function_stream,
|
|
|
|
SpvOpFDiv, result_type, operand0, operand1);
|
|
|
|
}
|
|
|
|
|
2017-06-29 04:40:27 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_fnegate(struct vkd3d_spirv_builder *builder,
|
2017-06-21 03:22:20 -07:00
|
|
|
uint32_t result_type, uint32_t operand)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_tr1(builder, &builder->function_stream,
|
|
|
|
SpvOpFNegate, result_type, operand);
|
|
|
|
}
|
|
|
|
|
2017-06-29 04:40:27 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_snegate(struct vkd3d_spirv_builder *builder,
|
2017-06-29 00:02:50 -07:00
|
|
|
uint32_t result_type, uint32_t operand)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_tr1(builder, &builder->function_stream,
|
|
|
|
SpvOpSNegate, result_type, operand);
|
|
|
|
}
|
|
|
|
|
2017-06-20 08:09:39 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_and(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t result_type, uint32_t operand0, uint32_t operand1)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_tr2(builder, &builder->function_stream,
|
|
|
|
SpvOpBitwiseAnd, result_type, operand0, operand1);
|
|
|
|
}
|
|
|
|
|
2018-10-19 07:55:48 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_shift_left_logical(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t result_type, uint32_t base, uint32_t shift)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_tr2(builder, &builder->function_stream,
|
|
|
|
SpvOpShiftLeftLogical, result_type, base, shift);
|
|
|
|
}
|
|
|
|
|
2017-08-11 04:58:04 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_shift_right_logical(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t result_type, uint32_t base, uint32_t shift)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_tr2(builder, &builder->function_stream,
|
|
|
|
SpvOpShiftRightLogical, result_type, base, shift);
|
|
|
|
}
|
|
|
|
|
2017-08-08 08:09:35 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_convert_utof(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t result_type, uint32_t unsigned_value)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_tr1(builder, &builder->function_stream,
|
|
|
|
SpvOpConvertUToF, result_type, unsigned_value);
|
|
|
|
}
|
|
|
|
|
2017-06-20 04:34:44 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_bitcast(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t result_type, uint32_t operand)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_tr1(builder, &builder->function_stream,
|
|
|
|
SpvOpBitcast, result_type, operand);
|
|
|
|
}
|
|
|
|
|
2017-08-21 03:41:07 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_image_texel_pointer(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t result_type, uint32_t image_id, uint32_t coordinate_id, uint32_t sample_id)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_tr3(builder, &builder->function_stream,
|
|
|
|
SpvOpImageTexelPointer, result_type, image_id, coordinate_id, sample_id);
|
|
|
|
}
|
|
|
|
|
2017-07-17 07:25:29 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_sampled_image(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t result_type, uint32_t image_id, uint32_t sampler_id)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_tr2(builder, &builder->function_stream,
|
|
|
|
SpvOpSampledImage, result_type, image_id, sampler_id);
|
|
|
|
}
|
|
|
|
|
2017-08-16 04:11:52 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_image(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t result_type, uint32_t sampled_image_id)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_tr1(builder, &builder->function_stream,
|
|
|
|
SpvOpImage, result_type, sampled_image_id);
|
|
|
|
}
|
|
|
|
|
2017-08-31 00:29:02 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_image_instruction(struct vkd3d_spirv_builder *builder,
|
|
|
|
SpvOp op, uint32_t result_type, const uint32_t *operands, unsigned int operand_count,
|
|
|
|
uint32_t image_operands_mask, const uint32_t *image_operands, unsigned int image_operand_count)
|
|
|
|
{
|
|
|
|
unsigned int index = 0, i;
|
|
|
|
uint32_t w[10];
|
|
|
|
|
|
|
|
assert(operand_count <= ARRAY_SIZE(w));
|
|
|
|
for (i = 0; i < operand_count; ++i)
|
|
|
|
w[index++] = operands[i];
|
|
|
|
|
|
|
|
if (image_operands_mask)
|
|
|
|
{
|
|
|
|
assert(index + 1 + image_operand_count <= ARRAY_SIZE(w));
|
|
|
|
w[index++] = image_operands_mask;
|
|
|
|
for (i = 0; i < image_operand_count; ++i)
|
|
|
|
w[index++] = image_operands[i];
|
|
|
|
}
|
|
|
|
|
|
|
|
return vkd3d_spirv_build_op_trv(builder, &builder->function_stream,
|
|
|
|
op, result_type, w, index);
|
|
|
|
}
|
|
|
|
|
2017-08-30 07:41:15 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_image_sample(struct vkd3d_spirv_builder *builder,
|
|
|
|
SpvOp op, uint32_t result_type, uint32_t sampled_image_id, uint32_t coordinate_id,
|
2017-08-31 00:29:02 -07:00
|
|
|
uint32_t image_operands_mask, const uint32_t *image_operands, unsigned int image_operand_count)
|
2017-07-17 07:25:29 -07:00
|
|
|
{
|
2017-08-31 00:29:02 -07:00
|
|
|
const uint32_t operands[] = {sampled_image_id, coordinate_id};
|
2017-07-17 07:25:29 -07:00
|
|
|
|
2017-08-30 07:41:15 -07:00
|
|
|
if (op == SpvOpImageSampleExplicitLod)
|
2018-10-17 08:59:34 -07:00
|
|
|
assert(image_operands_mask & (SpvImageOperandsLodMask | SpvImageOperandsGradMask));
|
2017-08-30 07:41:15 -07:00
|
|
|
else
|
|
|
|
assert(op == SpvOpImageSampleImplicitLod);
|
|
|
|
|
2017-08-31 00:29:02 -07:00
|
|
|
return vkd3d_spirv_build_image_instruction(builder, op, result_type,
|
|
|
|
operands, ARRAY_SIZE(operands), image_operands_mask, image_operands, image_operand_count);
|
2017-07-17 07:25:29 -07:00
|
|
|
}
|
|
|
|
|
2017-08-30 07:41:15 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_image_sample_dref(struct vkd3d_spirv_builder *builder,
|
2017-08-31 00:29:02 -07:00
|
|
|
SpvOp op, uint32_t result_type, uint32_t sampled_image_id, uint32_t coordinate_id, uint32_t dref_id,
|
|
|
|
uint32_t image_operands_mask, const uint32_t *image_operands, unsigned int image_operand_count)
|
2017-08-16 08:38:33 -07:00
|
|
|
{
|
2017-08-31 00:29:02 -07:00
|
|
|
const uint32_t operands[] = {sampled_image_id, coordinate_id, dref_id};
|
2017-08-16 08:38:33 -07:00
|
|
|
|
2017-08-30 07:41:15 -07:00
|
|
|
if (op == SpvOpImageSampleDrefExplicitLod)
|
2018-10-17 08:59:34 -07:00
|
|
|
assert(image_operands_mask & (SpvImageOperandsLodMask | SpvImageOperandsGradMask));
|
2017-08-30 07:41:15 -07:00
|
|
|
else
|
|
|
|
assert(op == SpvOpImageSampleDrefImplicitLod);
|
|
|
|
|
2017-08-31 00:29:02 -07:00
|
|
|
return vkd3d_spirv_build_image_instruction(builder, op, result_type,
|
|
|
|
operands, ARRAY_SIZE(operands), image_operands_mask, image_operands, image_operand_count);
|
2017-08-16 08:38:33 -07:00
|
|
|
}
|
|
|
|
|
2017-09-04 03:46:52 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_image_gather(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t result_type, uint32_t sampled_image_id, uint32_t coordinate_id, uint32_t component_id,
|
|
|
|
uint32_t image_operands_mask, const uint32_t *image_operands, unsigned int image_operand_count)
|
|
|
|
{
|
|
|
|
const uint32_t operands[] = {sampled_image_id, coordinate_id, component_id};
|
|
|
|
return vkd3d_spirv_build_image_instruction(builder, SpvOpImageGather, result_type,
|
|
|
|
operands, ARRAY_SIZE(operands), image_operands_mask, image_operands, image_operand_count);
|
|
|
|
}
|
|
|
|
|
2018-09-24 01:25:23 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_image_dref_gather(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t result_type, uint32_t sampled_image_id, uint32_t coordinate_id, uint32_t dref_id,
|
|
|
|
uint32_t image_operands_mask, const uint32_t *image_operands, unsigned int image_operand_count)
|
|
|
|
{
|
|
|
|
const uint32_t operands[] = {sampled_image_id, coordinate_id, dref_id};
|
|
|
|
return vkd3d_spirv_build_image_instruction(builder, SpvOpImageDrefGather, result_type,
|
|
|
|
operands, ARRAY_SIZE(operands), image_operands_mask, image_operands, image_operand_count);
|
|
|
|
}
|
|
|
|
|
2017-08-16 04:11:52 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_image_fetch(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t result_type, uint32_t image_id, uint32_t coordinate_id,
|
2017-08-31 00:29:02 -07:00
|
|
|
uint32_t image_operands_mask, const uint32_t *image_operands, unsigned int image_operand_count)
|
2017-08-16 04:11:52 -07:00
|
|
|
{
|
2017-08-31 00:29:02 -07:00
|
|
|
const uint32_t operands[] = {image_id, coordinate_id};
|
|
|
|
return vkd3d_spirv_build_image_instruction(builder, SpvOpImageFetch, result_type,
|
|
|
|
operands, ARRAY_SIZE(operands), image_operands_mask, image_operands, image_operand_count);
|
2017-08-16 04:11:52 -07:00
|
|
|
}
|
|
|
|
|
2017-08-28 10:10:23 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_image_read(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t result_type, uint32_t image_id, uint32_t coordinate_id,
|
2017-08-31 00:29:02 -07:00
|
|
|
uint32_t image_operands_mask, const uint32_t *image_operands, unsigned int image_operand_count)
|
2017-08-28 10:10:23 -07:00
|
|
|
{
|
2017-08-31 00:29:02 -07:00
|
|
|
const uint32_t operands[] = {image_id, coordinate_id};
|
|
|
|
return vkd3d_spirv_build_image_instruction(builder, SpvOpImageRead, result_type,
|
|
|
|
operands, ARRAY_SIZE(operands), image_operands_mask, image_operands, image_operand_count);
|
2017-08-28 10:10:23 -07:00
|
|
|
}
|
|
|
|
|
2017-07-24 10:43:50 -07:00
|
|
|
static void vkd3d_spirv_build_op_image_write(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t image_id, uint32_t coordinate_id, uint32_t texel_id,
|
|
|
|
uint32_t image_operands, const uint32_t *operands, unsigned int operand_count)
|
|
|
|
{
|
|
|
|
if (image_operands)
|
|
|
|
FIXME("Image operands not supported.\n");
|
|
|
|
|
|
|
|
vkd3d_spirv_build_op3(&builder->function_stream, SpvOpImageWrite,
|
|
|
|
image_id, coordinate_id, texel_id);
|
|
|
|
}
|
|
|
|
|
2017-08-16 04:11:52 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_image_query_size_lod(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t result_type, uint32_t image_id, uint32_t lod_id)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_tr2(builder, &builder->function_stream,
|
|
|
|
SpvOpImageQuerySizeLod, result_type, image_id, lod_id);
|
|
|
|
}
|
|
|
|
|
2017-08-08 08:09:35 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_image_query_size(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t result_type, uint32_t image_id)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_tr1(builder, &builder->function_stream,
|
|
|
|
SpvOpImageQuerySize, result_type, image_id);
|
|
|
|
}
|
|
|
|
|
2017-08-16 04:11:52 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_image_query_levels(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t result_type, uint32_t image_id)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_tr1(builder, &builder->function_stream,
|
|
|
|
SpvOpImageQueryLevels, result_type, image_id);
|
|
|
|
}
|
|
|
|
|
2018-11-26 05:22:26 -08:00
|
|
|
static uint32_t vkd3d_spirv_build_op_image_query_samples(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t result_type, uint32_t image_id)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_tr1(builder, &builder->function_stream,
|
|
|
|
SpvOpImageQuerySamples, result_type, image_id);
|
|
|
|
}
|
|
|
|
|
2018-01-11 08:03:53 -08:00
|
|
|
static void vkd3d_spirv_build_op_emit_vertex(struct vkd3d_spirv_builder *builder)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op(&builder->function_stream, SpvOpEmitVertex);
|
|
|
|
}
|
|
|
|
|
2018-02-04 14:58:23 -08:00
|
|
|
static void vkd3d_spirv_build_op_end_primitive(struct vkd3d_spirv_builder *builder)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op(&builder->function_stream, SpvOpEndPrimitive);
|
|
|
|
}
|
|
|
|
|
2017-08-24 02:11:16 -07:00
|
|
|
static void vkd3d_spirv_build_op_control_barrier(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t execution_id, uint32_t memory_id, uint32_t memory_semantics_id)
|
|
|
|
{
|
|
|
|
vkd3d_spirv_build_op3(&builder->function_stream,
|
|
|
|
SpvOpControlBarrier, execution_id, memory_id, memory_semantics_id);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void vkd3d_spirv_build_op_memory_barrier(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t memory_id, uint32_t memory_semantics_id)
|
|
|
|
{
|
|
|
|
vkd3d_spirv_build_op2(&builder->function_stream,
|
|
|
|
SpvOpMemoryBarrier, memory_id, memory_semantics_id);
|
|
|
|
}
|
|
|
|
|
2018-08-01 06:34:36 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_glsl_std450_tr1(struct vkd3d_spirv_builder *builder,
|
|
|
|
enum GLSLstd450 op, uint32_t result_type, uint32_t operand)
|
|
|
|
{
|
|
|
|
uint32_t id = vkd3d_spirv_get_glsl_std450_instr_set(builder);
|
|
|
|
return vkd3d_spirv_build_op_ext_inst(builder, result_type, id, op, &operand, 1);
|
|
|
|
}
|
|
|
|
|
2017-06-27 13:21:43 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_glsl_std450_fabs(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t result_type, uint32_t operand)
|
|
|
|
{
|
2018-08-01 06:34:36 -07:00
|
|
|
return vkd3d_spirv_build_op_glsl_std450_tr1(builder, GLSLstd450FAbs, result_type, operand);
|
|
|
|
}
|
|
|
|
|
|
|
|
static uint32_t vkd3d_spirv_build_op_glsl_std450_sin(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t result_type, uint32_t operand)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_glsl_std450_tr1(builder, GLSLstd450Sin, result_type, operand);
|
|
|
|
}
|
|
|
|
|
|
|
|
static uint32_t vkd3d_spirv_build_op_glsl_std450_cos(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t result_type, uint32_t operand)
|
|
|
|
{
|
|
|
|
return vkd3d_spirv_build_op_glsl_std450_tr1(builder, GLSLstd450Cos, result_type, operand);
|
2017-06-27 13:21:43 -07:00
|
|
|
}
|
|
|
|
|
2017-06-29 04:40:27 -07:00
|
|
|
static uint32_t vkd3d_spirv_build_op_glsl_std450_nclamp(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t result_type, uint32_t x, uint32_t min, uint32_t max)
|
|
|
|
{
|
|
|
|
uint32_t glsl_std450_id = vkd3d_spirv_get_glsl_std450_instr_set(builder);
|
|
|
|
uint32_t operands[] = {x, min, max};
|
|
|
|
return vkd3d_spirv_build_op_ext_inst(builder, result_type, glsl_std450_id,
|
2018-01-25 03:04:27 -08:00
|
|
|
GLSLstd450NClamp, operands, ARRAY_SIZE(operands));
|
2017-06-29 04:40:27 -07:00
|
|
|
}
|
|
|
|
|
2017-06-19 09:05:53 -07:00
|
|
|
static uint32_t vkd3d_spirv_get_type_id(struct vkd3d_spirv_builder *builder,
|
|
|
|
enum vkd3d_component_type component_type, unsigned int component_count)
|
|
|
|
{
|
2017-07-17 09:12:02 -07:00
|
|
|
uint32_t scalar_id;
|
2017-06-19 09:05:53 -07:00
|
|
|
|
2017-07-17 09:12:02 -07:00
|
|
|
if (component_count == 1)
|
2017-06-19 09:05:53 -07:00
|
|
|
{
|
2017-07-17 09:12:02 -07:00
|
|
|
switch (component_type)
|
2017-06-19 09:05:53 -07:00
|
|
|
{
|
2017-07-17 09:12:02 -07:00
|
|
|
case VKD3D_TYPE_VOID:
|
|
|
|
return vkd3d_spirv_get_op_type_void(builder);
|
|
|
|
break;
|
|
|
|
case VKD3D_TYPE_FLOAT:
|
|
|
|
return vkd3d_spirv_get_op_type_float(builder, 32);
|
|
|
|
break;
|
|
|
|
case VKD3D_TYPE_INT:
|
|
|
|
case VKD3D_TYPE_UINT:
|
|
|
|
return vkd3d_spirv_get_op_type_int(builder, 32, component_type == VKD3D_TYPE_INT);
|
|
|
|
break;
|
|
|
|
case VKD3D_TYPE_BOOL:
|
|
|
|
return vkd3d_spirv_get_op_type_bool(builder);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
FIXME("Unhandled component type %#x.\n", component_type);
|
|
|
|
return 0;
|
2017-06-19 09:05:53 -07:00
|
|
|
}
|
|
|
|
}
|
2017-07-17 09:12:02 -07:00
|
|
|
else
|
|
|
|
{
|
|
|
|
assert(component_type != VKD3D_TYPE_VOID);
|
|
|
|
scalar_id = vkd3d_spirv_get_type_id(builder, component_type, 1);
|
|
|
|
return vkd3d_spirv_get_op_type_vector(builder, scalar_id, component_count);
|
|
|
|
}
|
2017-06-19 09:05:53 -07:00
|
|
|
}
|
|
|
|
|
2017-06-19 09:05:53 -07:00
|
|
|
static void vkd3d_spirv_builder_init(struct vkd3d_spirv_builder *builder)
|
|
|
|
{
|
2017-06-19 09:05:53 -07:00
|
|
|
vkd3d_spirv_stream_init(&builder->debug_stream);
|
|
|
|
vkd3d_spirv_stream_init(&builder->annotation_stream);
|
|
|
|
vkd3d_spirv_stream_init(&builder->global_stream);
|
|
|
|
vkd3d_spirv_stream_init(&builder->function_stream);
|
2018-01-11 08:03:52 -08:00
|
|
|
vkd3d_spirv_stream_init(&builder->execution_mode_stream);
|
2017-06-19 09:05:53 -07:00
|
|
|
|
2017-08-01 01:51:45 -07:00
|
|
|
vkd3d_spirv_stream_init(&builder->insertion_stream);
|
|
|
|
builder->insertion_location = ~(size_t)0;
|
|
|
|
|
2017-06-19 09:05:53 -07:00
|
|
|
builder->current_id = 1;
|
2017-06-19 09:05:53 -07:00
|
|
|
|
2017-07-17 09:12:02 -07:00
|
|
|
rb_init(&builder->declarations, vkd3d_spirv_declaration_compare);
|
|
|
|
|
2019-02-06 03:38:09 -08:00
|
|
|
builder->main_function_id = vkd3d_spirv_alloc_id(builder);
|
|
|
|
vkd3d_spirv_build_op_name(builder, builder->main_function_id, "main");
|
|
|
|
}
|
|
|
|
|
|
|
|
static void vkd3d_spirv_builder_begin_main_function(struct vkd3d_spirv_builder *builder)
|
|
|
|
{
|
|
|
|
uint32_t void_id, function_type_id;
|
|
|
|
|
2017-07-17 09:12:02 -07:00
|
|
|
void_id = vkd3d_spirv_get_op_type_void(builder);
|
2019-02-06 03:38:08 -08:00
|
|
|
function_type_id = vkd3d_spirv_get_op_type_function(builder, void_id, NULL, 0);
|
2017-06-19 09:05:53 -07:00
|
|
|
|
2019-02-06 03:38:09 -08:00
|
|
|
vkd3d_spirv_build_op_function(builder, void_id,
|
|
|
|
builder->main_function_id, SpvFunctionControlMaskNone, function_type_id);
|
2017-06-26 08:03:31 -07:00
|
|
|
vkd3d_spirv_build_op_label(builder, vkd3d_spirv_alloc_id(builder));
|
2017-10-25 00:58:14 -07:00
|
|
|
builder->main_function_location = vkd3d_spirv_stream_current_location(&builder->function_stream);
|
2017-06-19 09:05:53 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
static void vkd3d_spirv_builder_free(struct vkd3d_spirv_builder *builder)
|
|
|
|
{
|
|
|
|
vkd3d_spirv_stream_free(&builder->debug_stream);
|
|
|
|
vkd3d_spirv_stream_free(&builder->annotation_stream);
|
|
|
|
vkd3d_spirv_stream_free(&builder->global_stream);
|
|
|
|
vkd3d_spirv_stream_free(&builder->function_stream);
|
2018-01-11 08:03:52 -08:00
|
|
|
vkd3d_spirv_stream_free(&builder->execution_mode_stream);
|
2017-06-20 05:59:25 -07:00
|
|
|
|
2017-08-01 01:51:45 -07:00
|
|
|
vkd3d_spirv_stream_free(&builder->insertion_stream);
|
|
|
|
|
2017-07-17 09:12:02 -07:00
|
|
|
rb_destroy(&builder->declarations, vkd3d_spirv_declaration_free, NULL);
|
|
|
|
|
2017-06-20 05:59:25 -07:00
|
|
|
vkd3d_free(builder->iface);
|
2017-06-19 09:05:53 -07:00
|
|
|
}
|
|
|
|
|
2017-06-19 09:05:53 -07:00
|
|
|
static bool vkd3d_spirv_compile_module(struct vkd3d_spirv_builder *builder,
|
|
|
|
struct vkd3d_shader_code *spirv)
|
|
|
|
{
|
2017-06-19 09:05:53 -07:00
|
|
|
uint64_t capability_mask = builder->capability_mask;
|
|
|
|
struct vkd3d_spirv_stream stream;
|
|
|
|
uint32_t *code;
|
|
|
|
unsigned int i;
|
|
|
|
size_t size;
|
|
|
|
|
|
|
|
vkd3d_spirv_stream_init(&stream);
|
|
|
|
|
|
|
|
vkd3d_spirv_build_word(&stream, SpvMagicNumber);
|
2018-04-16 03:16:22 -07:00
|
|
|
vkd3d_spirv_build_word(&stream, VKD3D_SPIRV_VERSION);
|
2018-02-02 06:39:22 -08:00
|
|
|
vkd3d_spirv_build_word(&stream, VKD3D_SPIRV_GENERATOR_MAGIC);
|
2017-06-19 09:05:53 -07:00
|
|
|
vkd3d_spirv_build_word(&stream, builder->current_id); /* bound */
|
|
|
|
vkd3d_spirv_build_word(&stream, 0); /* schema, reserved */
|
|
|
|
|
2018-01-11 08:03:52 -08:00
|
|
|
/* capabilities */
|
2017-06-19 09:05:53 -07:00
|
|
|
for (i = 0; capability_mask; ++i)
|
|
|
|
{
|
|
|
|
if (capability_mask & 1)
|
|
|
|
vkd3d_spirv_build_op_capability(&stream, i);
|
|
|
|
capability_mask >>= 1;
|
|
|
|
}
|
2017-09-12 08:42:42 -07:00
|
|
|
if (builder->capability_draw_parameters)
|
|
|
|
vkd3d_spirv_build_op_capability(&stream, SpvCapabilityDrawParameters);
|
|
|
|
|
2018-01-11 08:03:52 -08:00
|
|
|
/* extensions */
|
2017-09-12 08:42:42 -07:00
|
|
|
if (builder->capability_draw_parameters)
|
|
|
|
vkd3d_spirv_build_op_extension(&stream, "SPV_KHR_shader_draw_parameters");
|
2017-06-19 09:05:53 -07:00
|
|
|
|
2017-06-20 05:59:25 -07:00
|
|
|
if (builder->ext_instr_set_glsl_450)
|
|
|
|
vkd3d_spirv_build_op_ext_inst_import(&stream, builder->ext_instr_set_glsl_450, "GLSL.std.450");
|
|
|
|
|
2018-01-11 08:03:52 -08:00
|
|
|
/* entry point declarations */
|
2017-06-19 09:05:53 -07:00
|
|
|
vkd3d_spirv_build_op_memory_model(&stream, SpvAddressingModelLogical, SpvMemoryModelGLSL450);
|
|
|
|
vkd3d_spirv_build_op_entry_point(&stream, builder->execution_model, builder->main_function_id,
|
2017-06-20 04:34:44 -07:00
|
|
|
"main", builder->iface, builder->iface_element_count);
|
2017-06-19 09:05:53 -07:00
|
|
|
|
2018-01-11 08:03:52 -08:00
|
|
|
/* execution mode declarations */
|
|
|
|
vkd3d_spirv_stream_append(&stream, &builder->execution_mode_stream);
|
2017-06-19 09:05:53 -07:00
|
|
|
|
|
|
|
vkd3d_spirv_stream_append(&stream, &builder->debug_stream);
|
|
|
|
vkd3d_spirv_stream_append(&stream, &builder->annotation_stream);
|
|
|
|
vkd3d_spirv_stream_append(&stream, &builder->global_stream);
|
|
|
|
vkd3d_spirv_stream_append(&stream, &builder->function_stream);
|
|
|
|
|
|
|
|
if (!(code = vkd3d_calloc(stream.word_count, sizeof(*code))))
|
|
|
|
{
|
|
|
|
vkd3d_spirv_stream_free(&stream);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
size = stream.word_count * sizeof(*code);
|
|
|
|
memcpy(code, stream.words, size);
|
|
|
|
vkd3d_spirv_stream_free(&stream);
|
|
|
|
|
|
|
|
spirv->code = code;
|
|
|
|
spirv->size = size;
|
2017-06-19 09:05:53 -07:00
|
|
|
|
2017-06-19 09:05:53 -07:00
|
|
|
return true;
|
2017-06-19 09:05:53 -07:00
|
|
|
}
|
|
|
|
|
2017-08-16 08:38:33 -07:00
|
|
|
static const struct vkd3d_spirv_resource_type
|
|
|
|
{
|
|
|
|
enum vkd3d_shader_resource_type resource_type;
|
|
|
|
|
|
|
|
SpvDim dim;
|
|
|
|
uint32_t arrayed;
|
|
|
|
uint32_t ms;
|
|
|
|
|
|
|
|
unsigned int coordinate_component_count;
|
2017-09-04 03:46:52 -07:00
|
|
|
unsigned int offset_component_count;
|
2017-08-16 08:38:33 -07:00
|
|
|
|
|
|
|
SpvCapability capability;
|
|
|
|
SpvCapability uav_capability;
|
|
|
|
}
|
|
|
|
vkd3d_spirv_resource_type_table[] =
|
|
|
|
{
|
2017-09-04 03:46:52 -07:00
|
|
|
{VKD3D_SHADER_RESOURCE_BUFFER, SpvDimBuffer, 0, 0, 1, 0,
|
2017-08-16 08:38:33 -07:00
|
|
|
SpvCapabilitySampledBuffer, SpvCapabilityImageBuffer},
|
2017-09-04 03:46:52 -07:00
|
|
|
{VKD3D_SHADER_RESOURCE_TEXTURE_1D, SpvDim1D, 0, 0, 1, 1,
|
2017-08-16 08:38:33 -07:00
|
|
|
SpvCapabilitySampled1D, SpvCapabilityImage1D},
|
2017-09-04 03:46:52 -07:00
|
|
|
{VKD3D_SHADER_RESOURCE_TEXTURE_2DMS, SpvDim2D, 0, 1, 2, 2},
|
|
|
|
{VKD3D_SHADER_RESOURCE_TEXTURE_2D, SpvDim2D, 0, 0, 2, 2},
|
|
|
|
{VKD3D_SHADER_RESOURCE_TEXTURE_3D, SpvDim3D, 0, 0, 3, 3},
|
|
|
|
{VKD3D_SHADER_RESOURCE_TEXTURE_CUBE, SpvDimCube, 0, 0, 3, 0},
|
|
|
|
{VKD3D_SHADER_RESOURCE_TEXTURE_1DARRAY, SpvDim1D, 1, 0, 2, 1,
|
2017-08-16 08:38:33 -07:00
|
|
|
SpvCapabilitySampled1D, SpvCapabilityImage1D},
|
2017-09-04 03:46:52 -07:00
|
|
|
{VKD3D_SHADER_RESOURCE_TEXTURE_2DARRAY, SpvDim2D, 1, 0, 3, 2},
|
2018-11-26 05:22:24 -08:00
|
|
|
{VKD3D_SHADER_RESOURCE_TEXTURE_2DMSARRAY, SpvDim2D, 1, 1, 3, 2},
|
2019-01-23 03:46:48 -08:00
|
|
|
{VKD3D_SHADER_RESOURCE_TEXTURE_CUBEARRAY, SpvDimCube, 1, 0, 4, 0,
|
2017-08-16 08:38:33 -07:00
|
|
|
SpvCapabilitySampledCubeArray, SpvCapabilityImageCubeArray},
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct vkd3d_spirv_resource_type *vkd3d_get_spirv_resource_type(
|
|
|
|
enum vkd3d_shader_resource_type resource_type)
|
|
|
|
{
|
|
|
|
unsigned int i;
|
|
|
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE(vkd3d_spirv_resource_type_table); ++i)
|
|
|
|
{
|
|
|
|
const struct vkd3d_spirv_resource_type* current = &vkd3d_spirv_resource_type_table[i];
|
|
|
|
|
|
|
|
if (current->resource_type == resource_type)
|
|
|
|
return current;
|
|
|
|
}
|
|
|
|
|
|
|
|
FIXME("Unhandled resource type %#x.\n", resource_type);
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2017-06-20 04:34:44 -07:00
|
|
|
struct vkd3d_symbol_register
|
|
|
|
{
|
|
|
|
enum vkd3d_shader_register_type type;
|
|
|
|
unsigned int idx;
|
|
|
|
};
|
|
|
|
|
2017-07-17 07:25:29 -07:00
|
|
|
struct vkd3d_symbol_resource
|
|
|
|
{
|
2017-07-24 10:43:50 -07:00
|
|
|
enum vkd3d_shader_register_type type;
|
2017-07-17 07:25:29 -07:00
|
|
|
unsigned int idx;
|
|
|
|
};
|
|
|
|
|
2018-10-21 16:49:16 -07:00
|
|
|
struct vkd3d_symbol_combined_sampler
|
|
|
|
{
|
|
|
|
unsigned int resource_idx;
|
|
|
|
unsigned int sampler_idx;
|
|
|
|
};
|
|
|
|
|
2017-08-22 05:53:33 -07:00
|
|
|
struct vkd3d_symbol_register_data
|
|
|
|
{
|
|
|
|
SpvStorageClass storage_class;
|
|
|
|
uint32_t member_idx;
|
2018-06-26 05:41:44 -07:00
|
|
|
enum vkd3d_component_type component_type;
|
|
|
|
unsigned int write_mask;
|
2017-08-24 02:11:16 -07:00
|
|
|
unsigned int structure_stride;
|
2019-01-25 04:23:29 -08:00
|
|
|
bool is_aggregate; /* An aggregate, i.e. a structure or an array. */
|
2017-08-22 05:53:33 -07:00
|
|
|
};
|
|
|
|
|
2017-08-16 04:11:52 -07:00
|
|
|
struct vkd3d_symbol_resource_data
|
|
|
|
{
|
|
|
|
enum vkd3d_component_type sampled_type;
|
|
|
|
uint32_t type_id;
|
2017-08-16 08:38:33 -07:00
|
|
|
const struct vkd3d_spirv_resource_type *resource_type_info;
|
2017-08-22 05:53:33 -07:00
|
|
|
unsigned int structure_stride;
|
2017-08-24 06:13:38 -07:00
|
|
|
bool raw;
|
2017-09-07 08:15:54 -07:00
|
|
|
uint32_t uav_counter_id;
|
2017-08-16 04:11:52 -07:00
|
|
|
};
|
|
|
|
|
2017-06-20 04:34:44 -07:00
|
|
|
struct vkd3d_symbol
|
|
|
|
{
|
|
|
|
struct rb_entry entry;
|
|
|
|
|
|
|
|
enum
|
|
|
|
{
|
2017-06-20 04:34:44 -07:00
|
|
|
VKD3D_SYMBOL_REGISTER,
|
2017-07-17 07:25:29 -07:00
|
|
|
VKD3D_SYMBOL_RESOURCE,
|
2018-10-21 16:49:16 -07:00
|
|
|
VKD3D_SYMBOL_COMBINED_SAMPLER,
|
2017-06-20 04:34:44 -07:00
|
|
|
} type;
|
|
|
|
|
|
|
|
union
|
|
|
|
{
|
2017-06-20 04:34:44 -07:00
|
|
|
struct vkd3d_symbol_register reg;
|
2017-07-17 07:25:29 -07:00
|
|
|
struct vkd3d_symbol_resource resource;
|
2018-10-21 16:49:16 -07:00
|
|
|
struct vkd3d_symbol_combined_sampler combined_sampler;
|
2017-06-20 04:34:44 -07:00
|
|
|
} key;
|
|
|
|
|
|
|
|
uint32_t id;
|
|
|
|
union
|
|
|
|
{
|
2017-08-22 05:53:33 -07:00
|
|
|
struct vkd3d_symbol_register_data reg;
|
2017-08-16 04:11:52 -07:00
|
|
|
struct vkd3d_symbol_resource_data resource;
|
2017-06-20 04:34:44 -07:00
|
|
|
} info;
|
|
|
|
};
|
|
|
|
|
|
|
|
static int vkd3d_symbol_compare(const void *key, const struct rb_entry *entry)
|
|
|
|
{
|
|
|
|
const struct vkd3d_symbol *a = key;
|
|
|
|
const struct vkd3d_symbol *b = RB_ENTRY_VALUE(entry, const struct vkd3d_symbol, entry);
|
|
|
|
|
|
|
|
if (a->type != b->type)
|
|
|
|
return a->type - b->type;
|
|
|
|
return memcmp(&a->key, &b->key, sizeof(a->key));
|
|
|
|
}
|
|
|
|
|
|
|
|
static void vkd3d_symbol_free(struct rb_entry *entry, void *context)
|
|
|
|
{
|
|
|
|
struct vkd3d_symbol *s = RB_ENTRY_VALUE(entry, struct vkd3d_symbol, entry);
|
|
|
|
|
|
|
|
vkd3d_free(s);
|
|
|
|
}
|
|
|
|
|
2017-06-20 04:34:44 -07:00
|
|
|
static void vkd3d_symbol_make_register(struct vkd3d_symbol *symbol,
|
|
|
|
const struct vkd3d_shader_register *reg)
|
|
|
|
{
|
|
|
|
symbol->type = VKD3D_SYMBOL_REGISTER;
|
|
|
|
memset(&symbol->key, 0, sizeof(symbol->key));
|
|
|
|
symbol->key.reg.type = reg->type;
|
2018-07-18 03:05:42 -07:00
|
|
|
if (vkd3d_shader_register_is_input(reg) && reg->idx[1].offset != ~0u)
|
2018-02-04 14:58:26 -08:00
|
|
|
symbol->key.reg.idx = reg->idx[1].offset;
|
|
|
|
else if (reg->type != VKD3DSPR_IMMCONSTBUFFER)
|
2017-07-11 08:23:02 -07:00
|
|
|
symbol->key.reg.idx = reg->idx[0].offset;
|
2017-06-20 04:34:44 -07:00
|
|
|
}
|
|
|
|
|
2017-07-17 07:25:29 -07:00
|
|
|
static void vkd3d_symbol_make_resource(struct vkd3d_symbol *symbol,
|
|
|
|
const struct vkd3d_shader_register *reg)
|
|
|
|
{
|
|
|
|
symbol->type = VKD3D_SYMBOL_RESOURCE;
|
|
|
|
memset(&symbol->key, 0, sizeof(symbol->key));
|
2017-07-24 10:43:50 -07:00
|
|
|
symbol->key.resource.type = reg->type;
|
2017-07-17 07:25:29 -07:00
|
|
|
symbol->key.resource.idx = reg->idx[0].offset;
|
|
|
|
}
|
|
|
|
|
2018-10-21 16:49:16 -07:00
|
|
|
static void vkd3d_symbol_make_combined_sampler(struct vkd3d_symbol *symbol,
|
|
|
|
unsigned int resource_index, unsigned int sampler_index)
|
|
|
|
{
|
|
|
|
symbol->type = VKD3D_SYMBOL_COMBINED_SAMPLER;
|
|
|
|
memset(&symbol->key, 0, sizeof(symbol->key));
|
|
|
|
symbol->key.combined_sampler.resource_idx = resource_index;
|
|
|
|
symbol->key.combined_sampler.sampler_idx = sampler_index;
|
|
|
|
}
|
|
|
|
|
2017-06-20 04:34:44 -07:00
|
|
|
static struct vkd3d_symbol *vkd3d_symbol_dup(const struct vkd3d_symbol *symbol)
|
|
|
|
{
|
|
|
|
struct vkd3d_symbol *s;
|
|
|
|
|
|
|
|
if (!(s = vkd3d_malloc(sizeof(*s))))
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
return memcpy(s, symbol, sizeof(*s));
|
|
|
|
}
|
|
|
|
|
2018-02-04 14:58:26 -08:00
|
|
|
static const char *debug_vkd3d_symbol(const struct vkd3d_symbol *symbol)
|
|
|
|
{
|
|
|
|
switch (symbol->type)
|
|
|
|
{
|
|
|
|
case VKD3D_SYMBOL_REGISTER:
|
|
|
|
return vkd3d_dbg_sprintf("register %#x, %u",
|
|
|
|
symbol->key.reg.type, symbol->key.reg.idx);
|
|
|
|
case VKD3D_SYMBOL_RESOURCE:
|
|
|
|
return vkd3d_dbg_sprintf("resource %#x, %u",
|
|
|
|
symbol->key.resource.type, symbol->key.resource.idx);
|
|
|
|
default:
|
|
|
|
return vkd3d_dbg_sprintf("type %#x", symbol->type);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2017-07-20 04:32:40 -07:00
|
|
|
struct vkd3d_if_cf_info
|
2017-06-26 08:03:31 -07:00
|
|
|
{
|
2017-10-18 10:02:46 -07:00
|
|
|
size_t stream_location;
|
|
|
|
unsigned int id;
|
2017-06-26 08:03:31 -07:00
|
|
|
uint32_t merge_block_id;
|
|
|
|
uint32_t else_block_id;
|
2017-07-20 04:32:40 -07:00
|
|
|
};
|
|
|
|
|
|
|
|
struct vkd3d_loop_cf_info
|
|
|
|
{
|
|
|
|
uint32_t header_block_id;
|
|
|
|
uint32_t continue_block_id;
|
|
|
|
uint32_t merge_block_id;
|
|
|
|
};
|
|
|
|
|
2017-08-01 01:51:45 -07:00
|
|
|
struct vkd3d_switch_cf_info
|
|
|
|
{
|
|
|
|
size_t stream_location;
|
2017-10-18 10:02:46 -07:00
|
|
|
unsigned int id;
|
2017-08-01 01:51:45 -07:00
|
|
|
uint32_t selector_id;
|
|
|
|
uint32_t merge_block_id;
|
|
|
|
uint32_t default_block_id;
|
2017-08-01 02:38:10 -07:00
|
|
|
uint32_t *case_blocks;
|
|
|
|
size_t case_blocks_size;
|
2017-08-01 01:51:45 -07:00
|
|
|
unsigned int case_block_count;
|
|
|
|
};
|
|
|
|
|
2017-07-20 04:32:40 -07:00
|
|
|
struct vkd3d_control_flow_info
|
|
|
|
{
|
|
|
|
union
|
|
|
|
{
|
2017-10-18 10:02:46 -07:00
|
|
|
struct vkd3d_if_cf_info if_;
|
2017-07-20 04:32:40 -07:00
|
|
|
struct vkd3d_loop_cf_info loop;
|
2017-08-01 01:51:45 -07:00
|
|
|
struct vkd3d_switch_cf_info switch_;
|
2017-07-20 04:32:40 -07:00
|
|
|
} u;
|
2017-06-28 03:28:09 -07:00
|
|
|
|
|
|
|
enum
|
|
|
|
{
|
|
|
|
VKD3D_BLOCK_IF,
|
2017-07-20 04:32:40 -07:00
|
|
|
VKD3D_BLOCK_LOOP,
|
2017-08-01 01:51:45 -07:00
|
|
|
VKD3D_BLOCK_SWITCH,
|
2017-06-28 03:28:09 -07:00
|
|
|
} current_block;
|
2017-10-18 10:02:46 -07:00
|
|
|
bool inside_block;
|
2017-06-26 08:03:31 -07:00
|
|
|
};
|
|
|
|
|
2017-09-07 08:15:54 -07:00
|
|
|
struct vkd3d_push_constant_buffer_binding
|
2017-07-27 06:16:49 -07:00
|
|
|
{
|
|
|
|
struct vkd3d_shader_register reg;
|
2017-09-07 08:15:54 -07:00
|
|
|
struct vkd3d_shader_push_constant_buffer pc;
|
2017-07-27 06:16:49 -07:00
|
|
|
};
|
|
|
|
|
2019-02-06 03:38:09 -08:00
|
|
|
struct vkd3d_shader_phase
|
|
|
|
{
|
|
|
|
enum VKD3D_SHADER_INSTRUCTION_HANDLER type;
|
2019-02-07 00:59:14 -08:00
|
|
|
unsigned int idx;
|
|
|
|
unsigned int instance_count;
|
2019-02-06 03:38:09 -08:00
|
|
|
uint32_t function_id;
|
2019-02-07 00:59:15 -08:00
|
|
|
uint32_t instance_id;
|
2019-02-06 03:38:11 -08:00
|
|
|
size_t function_location;
|
2019-02-06 03:38:09 -08:00
|
|
|
};
|
|
|
|
|
2017-06-19 09:05:53 -07:00
|
|
|
struct vkd3d_dxbc_compiler
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder spirv_builder;
|
|
|
|
|
|
|
|
uint32_t options;
|
2017-06-20 04:34:44 -07:00
|
|
|
|
|
|
|
struct rb_tree symbol_table;
|
|
|
|
uint32_t temp_id;
|
|
|
|
unsigned int temp_count;
|
2017-06-21 13:00:19 -07:00
|
|
|
|
|
|
|
enum vkd3d_shader_type shader_type;
|
2017-06-26 08:03:31 -07:00
|
|
|
|
|
|
|
unsigned int branch_id;
|
2017-07-20 04:32:40 -07:00
|
|
|
unsigned int loop_id;
|
2017-08-01 01:51:45 -07:00
|
|
|
unsigned int switch_id;
|
2017-07-20 04:32:40 -07:00
|
|
|
unsigned int control_flow_depth;
|
|
|
|
struct vkd3d_control_flow_info *control_flow_info;
|
|
|
|
size_t control_flow_info_size;
|
2017-07-10 06:33:34 -07:00
|
|
|
|
2019-01-16 03:44:59 -08:00
|
|
|
struct vkd3d_shader_interface_info shader_interface;
|
2017-09-07 08:15:54 -07:00
|
|
|
struct vkd3d_push_constant_buffer_binding *push_constants;
|
2018-05-24 04:08:35 -07:00
|
|
|
const struct vkd3d_shader_compile_arguments *compile_args;
|
2017-07-26 04:45:25 -07:00
|
|
|
|
2017-07-27 06:16:49 -07:00
|
|
|
bool after_declarations_section;
|
2017-07-25 05:23:27 -07:00
|
|
|
const struct vkd3d_shader_signature *input_signature;
|
2017-07-10 06:33:34 -07:00
|
|
|
const struct vkd3d_shader_signature *output_signature;
|
2019-01-14 08:05:43 -08:00
|
|
|
const struct vkd3d_shader_transform_feedback_info *xfb_info;
|
2018-08-01 06:34:44 -07:00
|
|
|
struct vkd3d_shader_output_info
|
2017-07-10 06:33:34 -07:00
|
|
|
{
|
|
|
|
uint32_t id;
|
|
|
|
enum vkd3d_component_type component_type;
|
2018-09-05 04:45:29 -07:00
|
|
|
uint32_t array_element_mask;
|
2017-07-10 06:33:34 -07:00
|
|
|
} *output_info;
|
2017-08-18 05:52:40 -07:00
|
|
|
uint32_t private_output_variable[MAX_REG_OUTPUT + 1]; /* 1 entry for oDepth */
|
2018-10-30 07:22:47 -07:00
|
|
|
uint32_t epilogue_function_id;
|
2018-05-24 04:08:37 -07:00
|
|
|
uint32_t dummy_sampler_id;
|
2017-08-21 03:41:07 -07:00
|
|
|
|
2017-10-25 05:34:44 -07:00
|
|
|
uint32_t binding_idx;
|
|
|
|
|
2017-08-21 03:41:07 -07:00
|
|
|
const struct vkd3d_shader_scan_info *scan_info;
|
2019-02-06 03:38:09 -08:00
|
|
|
|
|
|
|
unsigned int shader_phase_count;
|
|
|
|
struct vkd3d_shader_phase *shader_phases;
|
|
|
|
size_t shader_phases_size;
|
2017-06-19 09:05:53 -07:00
|
|
|
};
|
|
|
|
|
2019-01-14 08:05:42 -08:00
|
|
|
static void vkd3d_dxbc_compiler_emit_initial_declarations(struct vkd3d_dxbc_compiler *compiler);
|
2019-01-11 07:45:33 -08:00
|
|
|
|
2017-06-19 09:05:53 -07:00
|
|
|
struct vkd3d_dxbc_compiler *vkd3d_dxbc_compiler_create(const struct vkd3d_shader_version *shader_version,
|
2017-07-26 04:45:25 -07:00
|
|
|
const struct vkd3d_shader_desc *shader_desc, uint32_t compiler_options,
|
2019-01-16 03:44:59 -08:00
|
|
|
const struct vkd3d_shader_interface_info *shader_interface,
|
2018-05-24 04:08:35 -07:00
|
|
|
const struct vkd3d_shader_compile_arguments *compile_args,
|
2017-08-21 03:41:07 -07:00
|
|
|
const struct vkd3d_shader_scan_info *scan_info)
|
2017-06-19 09:05:53 -07:00
|
|
|
{
|
2017-07-25 05:23:27 -07:00
|
|
|
const struct vkd3d_shader_signature *output_signature = &shader_desc->output_signature;
|
2017-06-19 09:05:53 -07:00
|
|
|
struct vkd3d_dxbc_compiler *compiler;
|
2017-07-27 06:16:49 -07:00
|
|
|
unsigned int i;
|
2017-06-19 09:05:53 -07:00
|
|
|
|
|
|
|
if (!(compiler = vkd3d_malloc(sizeof(*compiler))))
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
memset(compiler, 0, sizeof(*compiler));
|
2017-07-10 06:33:34 -07:00
|
|
|
|
|
|
|
if (!(compiler->output_info = vkd3d_calloc(output_signature->element_count, sizeof(*compiler->output_info))))
|
|
|
|
{
|
|
|
|
vkd3d_free(compiler);
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2017-06-19 09:05:53 -07:00
|
|
|
vkd3d_spirv_builder_init(&compiler->spirv_builder);
|
|
|
|
compiler->options = compiler_options;
|
|
|
|
|
2017-06-20 04:34:44 -07:00
|
|
|
rb_init(&compiler->symbol_table, vkd3d_symbol_compare);
|
|
|
|
|
2017-06-21 13:00:19 -07:00
|
|
|
compiler->shader_type = shader_version->type;
|
|
|
|
|
2017-07-25 05:23:27 -07:00
|
|
|
compiler->input_signature = &shader_desc->input_signature;
|
|
|
|
compiler->output_signature = &shader_desc->output_signature;
|
2017-07-10 06:33:34 -07:00
|
|
|
|
2017-08-16 04:11:52 -07:00
|
|
|
if (shader_interface)
|
2017-07-26 04:45:25 -07:00
|
|
|
{
|
2019-01-14 08:05:43 -08:00
|
|
|
compiler->xfb_info = vkd3d_find_struct(shader_interface->next, TRANSFORM_FEEDBACK_INFO);
|
|
|
|
|
2017-08-16 04:11:52 -07:00
|
|
|
compiler->shader_interface = *shader_interface;
|
2017-09-07 08:15:54 -07:00
|
|
|
if (shader_interface->push_constant_buffer_count)
|
2017-07-27 06:16:49 -07:00
|
|
|
{
|
2017-09-07 08:15:54 -07:00
|
|
|
if (!(compiler->push_constants = vkd3d_calloc(shader_interface->push_constant_buffer_count,
|
2017-08-16 04:11:52 -07:00
|
|
|
sizeof(*compiler->push_constants))))
|
|
|
|
{
|
|
|
|
vkd3d_dxbc_compiler_destroy(compiler);
|
|
|
|
return NULL;
|
|
|
|
}
|
2017-09-07 08:15:54 -07:00
|
|
|
for (i = 0; i < shader_interface->push_constant_buffer_count; ++i)
|
|
|
|
compiler->push_constants[i].pc = shader_interface->push_constant_buffers[i];
|
2017-07-27 06:16:49 -07:00
|
|
|
}
|
|
|
|
}
|
2018-05-24 04:08:35 -07:00
|
|
|
compiler->compile_args = compile_args;
|
2017-07-27 06:16:49 -07:00
|
|
|
|
2017-08-21 03:41:07 -07:00
|
|
|
compiler->scan_info = scan_info;
|
|
|
|
|
2019-01-14 08:05:42 -08:00
|
|
|
vkd3d_dxbc_compiler_emit_initial_declarations(compiler);
|
2018-09-05 04:45:27 -07:00
|
|
|
|
2017-06-19 09:05:53 -07:00
|
|
|
return compiler;
|
|
|
|
}
|
|
|
|
|
2018-10-17 08:59:31 -07:00
|
|
|
static enum vkd3d_shader_target vkd3d_dxbc_compiler_get_target(const struct vkd3d_dxbc_compiler *compiler)
|
2018-10-11 06:33:34 -07:00
|
|
|
{
|
|
|
|
const struct vkd3d_shader_compile_arguments *args = compiler->compile_args;
|
|
|
|
return args ? args->target : VKD3D_SHADER_TARGET_SPIRV_VULKAN_1_0;
|
|
|
|
}
|
|
|
|
|
2018-10-17 08:59:36 -07:00
|
|
|
static bool vkd3d_dxbc_compiler_is_opengl_target(const struct vkd3d_dxbc_compiler *compiler)
|
|
|
|
{
|
|
|
|
return vkd3d_dxbc_compiler_get_target(compiler) == VKD3D_SHADER_TARGET_SPIRV_OPENGL_4_5;
|
|
|
|
}
|
|
|
|
|
2018-10-17 08:59:31 -07:00
|
|
|
static bool vkd3d_dxbc_compiler_check_shader_visibility(const struct vkd3d_dxbc_compiler *compiler,
|
2017-08-01 01:51:45 -07:00
|
|
|
enum vkd3d_shader_visibility visibility)
|
|
|
|
{
|
|
|
|
switch (visibility)
|
|
|
|
{
|
|
|
|
case VKD3D_SHADER_VISIBILITY_ALL:
|
|
|
|
return true;
|
|
|
|
case VKD3D_SHADER_VISIBILITY_VERTEX:
|
|
|
|
return compiler->shader_type == VKD3D_SHADER_TYPE_VERTEX;
|
|
|
|
case VKD3D_SHADER_VISIBILITY_HULL:
|
|
|
|
return compiler->shader_type == VKD3D_SHADER_TYPE_HULL;
|
|
|
|
case VKD3D_SHADER_VISIBILITY_DOMAIN:
|
|
|
|
return compiler->shader_type == VKD3D_SHADER_TYPE_DOMAIN;
|
|
|
|
case VKD3D_SHADER_VISIBILITY_GEOMETRY:
|
|
|
|
return compiler->shader_type == VKD3D_SHADER_TYPE_GEOMETRY;
|
|
|
|
case VKD3D_SHADER_VISIBILITY_PIXEL:
|
|
|
|
return compiler->shader_type == VKD3D_SHADER_TYPE_PIXEL;
|
2018-10-29 03:12:17 -07:00
|
|
|
case VKD3D_SHADER_VISIBILITY_COMPUTE:
|
|
|
|
return compiler->shader_type == VKD3D_SHADER_TYPE_COMPUTE;
|
2018-02-02 06:39:23 -08:00
|
|
|
default:
|
|
|
|
ERR("Invalid shader visibility %#x.\n", visibility);
|
|
|
|
return false;
|
2017-08-01 01:51:45 -07:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2017-09-07 08:15:54 -07:00
|
|
|
static struct vkd3d_push_constant_buffer_binding *vkd3d_dxbc_compiler_find_push_constant_buffer(
|
2018-10-17 08:59:31 -07:00
|
|
|
const struct vkd3d_dxbc_compiler *compiler, const struct vkd3d_shader_register *reg)
|
2017-07-27 06:16:49 -07:00
|
|
|
{
|
|
|
|
unsigned int reg_idx = reg->idx[0].offset;
|
|
|
|
unsigned int i;
|
|
|
|
|
2017-09-07 08:15:54 -07:00
|
|
|
for (i = 0; i < compiler->shader_interface.push_constant_buffer_count; ++i)
|
2017-07-27 06:16:49 -07:00
|
|
|
{
|
2017-09-07 08:15:54 -07:00
|
|
|
struct vkd3d_push_constant_buffer_binding *current = &compiler->push_constants[i];
|
2017-07-27 06:16:49 -07:00
|
|
|
|
2017-08-01 01:51:45 -07:00
|
|
|
if (!vkd3d_dxbc_compiler_check_shader_visibility(compiler, current->pc.shader_visibility))
|
|
|
|
continue;
|
|
|
|
|
2017-07-27 06:16:49 -07:00
|
|
|
if (current->pc.register_index == reg_idx)
|
|
|
|
return current;
|
|
|
|
}
|
|
|
|
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2018-10-21 16:49:16 -07:00
|
|
|
static bool vkd3d_dxbc_compiler_have_combined_sampler(const struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_register *resource, const struct vkd3d_shader_register *sampler)
|
|
|
|
{
|
2019-01-16 03:44:59 -08:00
|
|
|
const struct vkd3d_shader_interface_info *shader_interface = &compiler->shader_interface;
|
2018-10-21 16:49:16 -07:00
|
|
|
const struct vkd3d_shader_combined_resource_sampler *combined_sampler;
|
|
|
|
unsigned int i;
|
|
|
|
|
|
|
|
if (!shader_interface->combined_sampler_count)
|
|
|
|
return false;
|
|
|
|
|
|
|
|
if (resource && resource->type == VKD3DSPR_UAV)
|
|
|
|
return false;
|
|
|
|
|
|
|
|
for (i = 0; i < shader_interface->combined_sampler_count; ++i)
|
|
|
|
{
|
|
|
|
combined_sampler = &shader_interface->combined_samplers[i];
|
|
|
|
|
2018-10-24 04:16:24 -07:00
|
|
|
if ((!resource || combined_sampler->resource_index == resource->idx[0].offset)
|
2018-10-21 16:49:16 -07:00
|
|
|
&& (!sampler || combined_sampler->sampler_index == sampler->idx[0].offset))
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2017-08-16 04:11:52 -07:00
|
|
|
static struct vkd3d_shader_descriptor_binding vkd3d_dxbc_compiler_get_descriptor_binding(
|
2017-08-08 08:09:35 -07:00
|
|
|
struct vkd3d_dxbc_compiler *compiler, const struct vkd3d_shader_register *reg,
|
2017-09-07 08:15:54 -07:00
|
|
|
enum vkd3d_shader_resource_type resource_type, bool is_uav_counter)
|
2017-07-26 04:45:25 -07:00
|
|
|
{
|
2019-01-16 03:44:59 -08:00
|
|
|
const struct vkd3d_shader_interface_info *shader_interface = &compiler->shader_interface;
|
2017-09-07 08:15:54 -07:00
|
|
|
enum vkd3d_shader_descriptor_type descriptor_type;
|
2018-10-29 03:12:16 -07:00
|
|
|
enum vkd3d_shader_binding_flag resource_type_flag;
|
2018-10-21 16:49:13 -07:00
|
|
|
struct vkd3d_shader_descriptor_binding binding;
|
2017-07-26 04:45:25 -07:00
|
|
|
unsigned int reg_idx = reg->idx[0].offset;
|
|
|
|
unsigned int i;
|
|
|
|
|
2017-09-07 08:15:54 -07:00
|
|
|
descriptor_type = VKD3D_SHADER_DESCRIPTOR_TYPE_UNKNOWN;
|
2017-07-26 04:45:25 -07:00
|
|
|
if (reg->type == VKD3DSPR_CONSTBUFFER)
|
2017-09-07 08:15:54 -07:00
|
|
|
descriptor_type = VKD3D_SHADER_DESCRIPTOR_TYPE_CBV;
|
2017-07-26 04:45:25 -07:00
|
|
|
else if (reg->type == VKD3DSPR_RESOURCE)
|
2017-09-07 08:15:54 -07:00
|
|
|
descriptor_type = VKD3D_SHADER_DESCRIPTOR_TYPE_SRV;
|
2017-07-26 04:45:25 -07:00
|
|
|
else if (reg->type == VKD3DSPR_UAV)
|
2017-09-07 08:15:54 -07:00
|
|
|
descriptor_type = VKD3D_SHADER_DESCRIPTOR_TYPE_UAV;
|
2017-07-26 04:45:25 -07:00
|
|
|
else if (reg->type == VKD3DSPR_SAMPLER)
|
2017-09-07 08:15:54 -07:00
|
|
|
descriptor_type = VKD3D_SHADER_DESCRIPTOR_TYPE_SAMPLER;
|
2017-07-26 04:45:25 -07:00
|
|
|
else
|
|
|
|
FIXME("Unhandled register type %#x.\n", reg->type);
|
|
|
|
|
2018-10-29 03:12:16 -07:00
|
|
|
resource_type_flag = resource_type == VKD3D_SHADER_RESOURCE_BUFFER
|
|
|
|
? VKD3D_SHADER_BINDING_FLAG_BUFFER : VKD3D_SHADER_BINDING_FLAG_IMAGE;
|
|
|
|
|
2017-09-07 08:15:54 -07:00
|
|
|
if (is_uav_counter)
|
|
|
|
{
|
|
|
|
assert(descriptor_type == VKD3D_SHADER_DESCRIPTOR_TYPE_UAV);
|
|
|
|
for (i = 0; i < shader_interface->uav_counter_count; ++i)
|
|
|
|
{
|
|
|
|
const struct vkd3d_shader_uav_counter_binding *current = &shader_interface->uav_counters[i];
|
|
|
|
|
2018-11-15 07:32:40 -08:00
|
|
|
if (!vkd3d_dxbc_compiler_check_shader_visibility(compiler, current->shader_visibility))
|
|
|
|
continue;
|
|
|
|
|
2018-10-17 08:59:36 -07:00
|
|
|
if (current->offset)
|
|
|
|
FIXME("Atomic counter offsets are not supported yet.\n");
|
|
|
|
|
2017-09-07 08:15:54 -07:00
|
|
|
if (current->register_index == reg_idx)
|
|
|
|
return current->binding;
|
|
|
|
}
|
|
|
|
if (shader_interface->uav_counter_count)
|
|
|
|
FIXME("Could not find descriptor binding for UAV counter %u.\n", reg_idx);
|
|
|
|
}
|
|
|
|
else if (descriptor_type != VKD3D_SHADER_DESCRIPTOR_TYPE_UNKNOWN)
|
2017-07-26 04:45:25 -07:00
|
|
|
{
|
2017-08-16 04:11:52 -07:00
|
|
|
for (i = 0; i < shader_interface->binding_count; ++i)
|
2017-07-26 04:45:25 -07:00
|
|
|
{
|
2017-08-16 04:11:52 -07:00
|
|
|
const struct vkd3d_shader_resource_binding *current = &shader_interface->bindings[i];
|
2017-07-26 04:45:25 -07:00
|
|
|
|
2018-10-29 03:12:16 -07:00
|
|
|
if (!(current->flags & resource_type_flag))
|
|
|
|
continue;
|
|
|
|
|
2017-09-22 07:42:07 -07:00
|
|
|
if (!vkd3d_dxbc_compiler_check_shader_visibility(compiler, current->shader_visibility))
|
|
|
|
continue;
|
|
|
|
|
2018-10-29 03:12:16 -07:00
|
|
|
if (current->type == descriptor_type && current->register_index == reg_idx)
|
2017-08-16 04:11:52 -07:00
|
|
|
return current->binding;
|
2017-07-26 04:45:25 -07:00
|
|
|
}
|
2017-08-16 04:11:52 -07:00
|
|
|
if (shader_interface->binding_count)
|
2017-09-22 07:42:07 -07:00
|
|
|
FIXME("Could not find binding for type %#x, register %u, shader type %#x.\n",
|
|
|
|
descriptor_type, reg_idx, compiler->shader_type);
|
2017-07-26 04:45:25 -07:00
|
|
|
}
|
|
|
|
|
2018-10-21 16:49:13 -07:00
|
|
|
binding.set = 0;
|
|
|
|
binding.binding = compiler->binding_idx++;
|
|
|
|
return binding;
|
2017-07-26 04:45:25 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
static void vkd3d_dxbc_compiler_emit_descriptor_binding(struct vkd3d_dxbc_compiler *compiler,
|
2018-10-21 16:49:13 -07:00
|
|
|
uint32_t variable_id, const struct vkd3d_shader_descriptor_binding *binding)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
|
|
|
|
vkd3d_spirv_build_op_decorate1(builder, variable_id, SpvDecorationDescriptorSet, binding->set);
|
|
|
|
vkd3d_spirv_build_op_decorate1(builder, variable_id, SpvDecorationBinding, binding->binding);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void vkd3d_dxbc_compiler_emit_descriptor_binding_for_reg(struct vkd3d_dxbc_compiler *compiler,
|
2017-08-08 08:09:35 -07:00
|
|
|
uint32_t variable_id, const struct vkd3d_shader_register *reg,
|
2017-09-07 08:15:54 -07:00
|
|
|
enum vkd3d_shader_resource_type resource_type, bool is_uav_counter)
|
2017-07-26 04:45:25 -07:00
|
|
|
{
|
2018-10-21 16:49:13 -07:00
|
|
|
struct vkd3d_shader_descriptor_binding binding;
|
2017-07-26 04:45:25 -07:00
|
|
|
|
2018-10-21 16:49:13 -07:00
|
|
|
binding = vkd3d_dxbc_compiler_get_descriptor_binding(compiler, reg, resource_type, is_uav_counter);
|
|
|
|
vkd3d_dxbc_compiler_emit_descriptor_binding(compiler, variable_id, &binding);
|
2017-07-26 04:45:25 -07:00
|
|
|
}
|
|
|
|
|
2017-06-20 04:34:44 -07:00
|
|
|
static void vkd3d_dxbc_compiler_put_symbol(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_symbol *symbol)
|
|
|
|
{
|
|
|
|
struct vkd3d_symbol *s;
|
|
|
|
|
|
|
|
s = vkd3d_symbol_dup(symbol);
|
|
|
|
if (rb_put(&compiler->symbol_table, s, &s->entry) == -1)
|
|
|
|
{
|
2018-02-04 14:58:26 -08:00
|
|
|
ERR("Failed to insert symbol entry (%s).\n", debug_vkd3d_symbol(symbol));
|
2017-06-20 04:34:44 -07:00
|
|
|
vkd3d_free(s);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2017-06-20 04:34:44 -07:00
|
|
|
static uint32_t vkd3d_dxbc_compiler_get_constant(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
enum vkd3d_component_type component_type, unsigned int component_count, const uint32_t *values)
|
|
|
|
{
|
2017-07-19 05:45:54 -07:00
|
|
|
uint32_t type_id, scalar_type_id, component_ids[VKD3D_VEC4_SIZE];
|
2017-06-20 04:34:44 -07:00
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
unsigned int i;
|
|
|
|
|
|
|
|
assert(0 < component_count && component_count <= VKD3D_VEC4_SIZE);
|
2017-07-19 05:45:54 -07:00
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, component_type, component_count);
|
2017-06-20 04:34:44 -07:00
|
|
|
|
|
|
|
switch (component_type)
|
|
|
|
{
|
|
|
|
case VKD3D_TYPE_UINT:
|
|
|
|
case VKD3D_TYPE_INT:
|
|
|
|
case VKD3D_TYPE_FLOAT:
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
FIXME("Unhandled component_type %#x.\n", component_type);
|
|
|
|
return vkd3d_spirv_build_op_undef(builder, &builder->global_stream, type_id);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (component_count == 1)
|
|
|
|
{
|
2017-07-19 05:45:54 -07:00
|
|
|
return vkd3d_spirv_get_op_constant(builder, type_id, *values);
|
2017-06-20 04:34:44 -07:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2017-07-19 05:45:54 -07:00
|
|
|
scalar_type_id = vkd3d_spirv_get_type_id(builder, component_type, 1);
|
2017-06-20 04:34:44 -07:00
|
|
|
for (i = 0; i < component_count; ++i)
|
2017-07-19 05:45:54 -07:00
|
|
|
component_ids[i] = vkd3d_spirv_get_op_constant(builder, scalar_type_id, values[i]);
|
|
|
|
return vkd3d_spirv_get_op_constant_composite(builder, type_id, component_ids, component_count);
|
2017-06-20 04:34:44 -07:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static uint32_t vkd3d_dxbc_compiler_get_constant_uint(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
uint32_t value)
|
|
|
|
{
|
|
|
|
return vkd3d_dxbc_compiler_get_constant(compiler, VKD3D_TYPE_UINT, 1, &value);
|
|
|
|
}
|
|
|
|
|
2017-07-06 09:11:57 -07:00
|
|
|
static uint32_t vkd3d_dxbc_compiler_get_constant_float(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
float value)
|
|
|
|
{
|
|
|
|
return vkd3d_dxbc_compiler_get_constant(compiler, VKD3D_TYPE_FLOAT, 1, (uint32_t *)&value);
|
|
|
|
}
|
|
|
|
|
2018-08-01 06:34:44 -07:00
|
|
|
static uint32_t vkd3d_dxbc_compiler_get_constant_vector(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
enum vkd3d_component_type component_type, unsigned int component_count, uint32_t value)
|
|
|
|
{
|
|
|
|
const uint32_t values[] = {value, value, value, value};
|
|
|
|
return vkd3d_dxbc_compiler_get_constant(compiler, component_type, component_count, values);
|
|
|
|
}
|
|
|
|
|
2017-12-14 02:45:56 -08:00
|
|
|
static uint32_t vkd3d_dxbc_compiler_get_constant_uint_vector(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
uint32_t value, unsigned int component_count)
|
|
|
|
{
|
2018-08-01 06:34:44 -07:00
|
|
|
return vkd3d_dxbc_compiler_get_constant_vector(compiler, VKD3D_TYPE_UINT, component_count, value);
|
2017-12-14 02:45:56 -08:00
|
|
|
}
|
|
|
|
|
2017-10-18 03:14:32 -07:00
|
|
|
static uint32_t vkd3d_dxbc_compiler_get_constant_float_vector(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
float value, unsigned int component_count)
|
|
|
|
{
|
|
|
|
const float values[] = {value, value, value, value};
|
|
|
|
return vkd3d_dxbc_compiler_get_constant(compiler,
|
|
|
|
VKD3D_TYPE_FLOAT, component_count, (const uint32_t *)values);
|
|
|
|
}
|
|
|
|
|
2018-09-05 04:45:26 -07:00
|
|
|
static uint32_t vkd3d_dxbc_compiler_get_type_id_for_reg(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_register *reg, DWORD write_mask)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
|
|
|
|
return vkd3d_spirv_get_type_id(builder,
|
|
|
|
vkd3d_component_type_from_data_type(reg->data_type),
|
|
|
|
vkd3d_write_mask_component_count(write_mask));
|
|
|
|
}
|
|
|
|
|
|
|
|
static uint32_t vkd3d_dxbc_compiler_get_type_id_for_dst(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_dst_param *dst)
|
|
|
|
{
|
|
|
|
return vkd3d_dxbc_compiler_get_type_id_for_reg(compiler, &dst->reg, dst->write_mask);
|
|
|
|
}
|
|
|
|
|
2017-07-10 06:33:34 -07:00
|
|
|
static bool vkd3d_dxbc_compiler_get_register_name(char *buffer, unsigned int buffer_size,
|
|
|
|
const struct vkd3d_shader_register *reg)
|
2017-06-20 04:34:44 -07:00
|
|
|
{
|
2018-02-04 14:58:26 -08:00
|
|
|
unsigned int idx;
|
|
|
|
|
|
|
|
idx = reg->idx[1].offset != ~0u ? reg->idx[1].offset : reg->idx[0].offset;
|
2017-06-20 04:34:44 -07:00
|
|
|
switch (reg->type)
|
|
|
|
{
|
2017-07-17 07:25:29 -07:00
|
|
|
case VKD3DSPR_RESOURCE:
|
|
|
|
snprintf(buffer, buffer_size, "t%u", reg->idx[0].offset);
|
|
|
|
break;
|
2017-07-24 10:43:50 -07:00
|
|
|
case VKD3DSPR_UAV:
|
|
|
|
snprintf(buffer, buffer_size, "u%u", reg->idx[0].offset);
|
|
|
|
break;
|
2017-07-14 04:44:35 -07:00
|
|
|
case VKD3DSPR_SAMPLER:
|
|
|
|
snprintf(buffer, buffer_size, "s%u", reg->idx[0].offset);
|
|
|
|
break;
|
2017-06-20 04:34:44 -07:00
|
|
|
case VKD3DSPR_CONSTBUFFER:
|
2017-07-10 06:33:34 -07:00
|
|
|
snprintf(buffer, buffer_size, "cb%u_%u", reg->idx[0].offset, reg->idx[1].offset);
|
2017-06-20 04:34:44 -07:00
|
|
|
break;
|
|
|
|
case VKD3DSPR_INPUT:
|
2018-02-04 14:58:26 -08:00
|
|
|
snprintf(buffer, buffer_size, "v%u", idx);
|
2017-06-20 04:34:44 -07:00
|
|
|
break;
|
2018-07-18 03:05:42 -07:00
|
|
|
case VKD3DSPR_INCONTROLPOINT:
|
|
|
|
snprintf(buffer, buffer_size, "vicp%u", idx);
|
|
|
|
break;
|
2017-06-20 04:34:44 -07:00
|
|
|
case VKD3DSPR_OUTPUT:
|
|
|
|
case VKD3DSPR_COLOROUT:
|
2018-02-04 14:58:26 -08:00
|
|
|
snprintf(buffer, buffer_size, "o%u", idx);
|
2017-06-20 04:34:44 -07:00
|
|
|
break;
|
2017-08-18 05:52:40 -07:00
|
|
|
case VKD3DSPR_DEPTHOUT:
|
2018-10-19 07:55:49 -07:00
|
|
|
case VKD3DSPR_DEPTHOUTGE:
|
|
|
|
case VKD3DSPR_DEPTHOUTLE:
|
2017-08-18 05:52:40 -07:00
|
|
|
snprintf(buffer, buffer_size, "oDepth");
|
|
|
|
break;
|
2019-02-07 00:59:16 -08:00
|
|
|
case VKD3DSPR_FORKINSTID:
|
|
|
|
snprintf(buffer, buffer_size, "vForkInstanceId");
|
|
|
|
break;
|
2019-02-07 00:59:17 -08:00
|
|
|
case VKD3DSPR_JOININSTID:
|
|
|
|
snprintf(buffer, buffer_size, "vJoinInstanceId");
|
|
|
|
break;
|
2018-07-18 03:05:43 -07:00
|
|
|
case VKD3DSPR_TESSCOORD:
|
|
|
|
snprintf(buffer, buffer_size, "vDomainLocation");
|
|
|
|
break;
|
2017-07-10 06:33:34 -07:00
|
|
|
case VKD3DSPR_THREADID:
|
2017-07-10 06:33:34 -07:00
|
|
|
snprintf(buffer, buffer_size, "vThreadID");
|
2017-07-10 06:33:34 -07:00
|
|
|
break;
|
2017-07-10 06:33:34 -07:00
|
|
|
case VKD3DSPR_LOCALTHREADID:
|
|
|
|
snprintf(buffer, buffer_size, "vThreadIDInGroup");
|
|
|
|
break;
|
2017-07-18 08:32:26 -07:00
|
|
|
case VKD3DSPR_LOCALTHREADINDEX:
|
|
|
|
snprintf(buffer, buffer_size, "vThreadIDInGroupFlattened");
|
|
|
|
break;
|
2017-07-18 08:32:26 -07:00
|
|
|
case VKD3DSPR_THREADGROUPID:
|
|
|
|
snprintf(buffer, buffer_size, "vThreadGroupID");
|
|
|
|
break;
|
2017-08-24 02:11:16 -07:00
|
|
|
case VKD3DSPR_GROUPSHAREDMEM:
|
|
|
|
snprintf(buffer, buffer_size, "g%u", reg->idx[0].offset);
|
|
|
|
break;
|
2018-08-01 06:34:39 -07:00
|
|
|
case VKD3DSPR_IDXTEMP:
|
|
|
|
snprintf(buffer, buffer_size, "x%u", idx);
|
|
|
|
break;
|
2019-01-24 06:09:23 -08:00
|
|
|
case VKD3DSPR_COVERAGE:
|
|
|
|
snprintf(buffer, buffer_size, "vCoverage");
|
|
|
|
break;
|
2019-01-23 03:46:51 -08:00
|
|
|
case VKD3DSPR_SAMPLEMASK:
|
|
|
|
snprintf(buffer, buffer_size, "oMask");
|
|
|
|
break;
|
2017-06-20 04:34:44 -07:00
|
|
|
default:
|
|
|
|
FIXME("Unhandled register %#x.\n", reg->type);
|
2017-07-10 06:33:34 -07:00
|
|
|
snprintf(buffer, buffer_size, "unrecognized_%#x", reg->type);
|
2017-06-20 04:34:44 -07:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void vkd3d_dxbc_compiler_emit_register_debug_name(struct vkd3d_spirv_builder *builder,
|
|
|
|
uint32_t id, const struct vkd3d_shader_register *reg)
|
|
|
|
{
|
|
|
|
char debug_name[256];
|
2017-07-10 06:33:34 -07:00
|
|
|
if (vkd3d_dxbc_compiler_get_register_name(debug_name, ARRAY_SIZE(debug_name), reg))
|
2017-09-07 08:15:54 -07:00
|
|
|
vkd3d_spirv_build_op_name(builder, id, "%s", debug_name);
|
2017-06-20 04:34:44 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
static uint32_t vkd3d_dxbc_compiler_emit_variable(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
struct vkd3d_spirv_stream *stream, SpvStorageClass storage_class,
|
|
|
|
enum vkd3d_component_type component_type, unsigned int component_count)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
uint32_t type_id, ptr_type_id;
|
|
|
|
|
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, component_type, component_count);
|
2017-07-17 09:12:02 -07:00
|
|
|
ptr_type_id = vkd3d_spirv_get_op_type_pointer(builder, storage_class, type_id);
|
2017-07-11 08:23:02 -07:00
|
|
|
return vkd3d_spirv_build_op_variable(builder, stream, ptr_type_id, storage_class, 0);
|
2017-06-20 04:34:44 -07:00
|
|
|
}
|
|
|
|
|
2018-02-04 14:58:26 -08:00
|
|
|
static uint32_t vkd3d_dxbc_compiler_emit_array_variable(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
struct vkd3d_spirv_stream *stream, SpvStorageClass storage_class,
|
|
|
|
enum vkd3d_component_type component_type, unsigned int component_count, unsigned int array_length)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
uint32_t type_id, length_id, ptr_type_id;
|
|
|
|
|
|
|
|
if (!array_length)
|
|
|
|
return vkd3d_dxbc_compiler_emit_variable(compiler,
|
|
|
|
stream, storage_class, component_type, component_count);
|
|
|
|
|
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, component_type, component_count);
|
|
|
|
length_id = vkd3d_dxbc_compiler_get_constant_uint(compiler, array_length);
|
|
|
|
type_id = vkd3d_spirv_get_op_type_array(builder, type_id, length_id);
|
|
|
|
ptr_type_id = vkd3d_spirv_get_op_type_pointer(builder, storage_class, type_id);
|
|
|
|
return vkd3d_spirv_build_op_variable(builder, stream, ptr_type_id, storage_class, 0);
|
|
|
|
}
|
|
|
|
|
2018-06-26 05:41:53 -07:00
|
|
|
static uint32_t vkd3d_dxbc_compiler_emit_construct_vector(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
enum vkd3d_component_type component_type, unsigned int component_count,
|
|
|
|
uint32_t val_id, unsigned int val_component_idx, unsigned int val_component_count)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
uint32_t components[VKD3D_VEC4_SIZE];
|
|
|
|
uint32_t type_id, result_id;
|
|
|
|
unsigned int i;
|
|
|
|
|
|
|
|
assert(val_component_idx < val_component_count);
|
|
|
|
|
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, component_type, component_count);
|
|
|
|
if (val_component_count == 1)
|
|
|
|
{
|
|
|
|
for (i = 0; i < component_count; ++i)
|
|
|
|
components[i] = val_id;
|
|
|
|
result_id = vkd3d_spirv_build_op_composite_construct(builder,
|
|
|
|
type_id, components, component_count);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
for (i = 0; i < component_count; ++i)
|
|
|
|
components[i] = val_component_idx;
|
|
|
|
result_id = vkd3d_spirv_build_op_vector_shuffle(builder,
|
|
|
|
type_id, val_id, val_id, components, component_count);
|
|
|
|
}
|
|
|
|
return result_id;
|
|
|
|
}
|
|
|
|
|
2017-07-11 08:23:02 -07:00
|
|
|
static uint32_t vkd3d_dxbc_compiler_emit_load_src(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_src_param *src, DWORD write_mask);
|
|
|
|
|
|
|
|
static uint32_t vkd3d_dxbc_compiler_emit_register_addressing(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_register_index *reg_index)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
uint32_t type_id, addr_id;
|
|
|
|
|
|
|
|
if (!reg_index->rel_addr)
|
|
|
|
return vkd3d_dxbc_compiler_get_constant_uint(compiler, reg_index->offset);
|
|
|
|
|
|
|
|
addr_id = vkd3d_dxbc_compiler_emit_load_src(compiler, reg_index->rel_addr, VKD3DSP_WRITEMASK_0);
|
|
|
|
if (reg_index->offset)
|
|
|
|
{
|
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_UINT, 1);
|
|
|
|
addr_id = vkd3d_spirv_build_op_iadd(builder, type_id,
|
|
|
|
addr_id, vkd3d_dxbc_compiler_get_constant_uint(compiler, reg_index->offset));
|
|
|
|
}
|
|
|
|
return addr_id;
|
|
|
|
}
|
|
|
|
|
2017-08-24 06:13:38 -07:00
|
|
|
struct vkd3d_shader_register_info
|
2017-06-20 04:34:44 -07:00
|
|
|
{
|
|
|
|
uint32_t id;
|
|
|
|
SpvStorageClass storage_class;
|
2018-06-26 05:41:44 -07:00
|
|
|
enum vkd3d_component_type component_type;
|
|
|
|
unsigned int write_mask;
|
2018-06-26 05:41:43 -07:00
|
|
|
uint32_t member_idx;
|
2017-08-24 06:13:38 -07:00
|
|
|
unsigned int structure_stride;
|
2019-01-25 04:23:29 -08:00
|
|
|
bool is_aggregate;
|
2017-06-20 04:34:44 -07:00
|
|
|
};
|
|
|
|
|
2018-10-17 08:59:31 -07:00
|
|
|
static bool vkd3d_dxbc_compiler_get_register_info(const struct vkd3d_dxbc_compiler *compiler,
|
2017-08-24 06:13:38 -07:00
|
|
|
const struct vkd3d_shader_register *reg, struct vkd3d_shader_register_info *register_info)
|
2017-06-20 04:34:44 -07:00
|
|
|
{
|
|
|
|
struct vkd3d_symbol reg_symbol, *symbol;
|
|
|
|
struct rb_entry *entry;
|
|
|
|
|
|
|
|
assert(reg->type != VKD3DSPR_IMMCONST);
|
|
|
|
|
|
|
|
if (reg->type == VKD3DSPR_TEMP)
|
|
|
|
{
|
|
|
|
assert(reg->idx[0].offset < compiler->temp_count);
|
|
|
|
register_info->id = compiler->temp_id + reg->idx[0].offset;
|
|
|
|
register_info->storage_class = SpvStorageClassFunction;
|
2018-06-26 05:41:44 -07:00
|
|
|
register_info->component_type = VKD3D_TYPE_FLOAT;
|
|
|
|
register_info->write_mask = VKD3DSP_WRITEMASK_ALL;
|
2018-06-26 05:41:43 -07:00
|
|
|
register_info->member_idx = 0;
|
2019-01-25 04:23:29 -08:00
|
|
|
register_info->structure_stride = 0;
|
|
|
|
register_info->is_aggregate = false;
|
2018-01-09 04:13:04 -08:00
|
|
|
return true;
|
2017-06-20 04:34:44 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
vkd3d_symbol_make_register(®_symbol, reg);
|
2018-01-09 04:13:04 -08:00
|
|
|
if (!(entry = rb_get(&compiler->symbol_table, ®_symbol)))
|
|
|
|
{
|
2018-02-04 14:58:26 -08:00
|
|
|
FIXME("Unrecognized register (%s).\n", debug_vkd3d_symbol(®_symbol));
|
2018-01-09 04:13:04 -08:00
|
|
|
memset(register_info, 0, sizeof(*register_info));
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2017-06-20 04:34:44 -07:00
|
|
|
symbol = RB_ENTRY_VALUE(entry, struct vkd3d_symbol, entry);
|
|
|
|
register_info->id = symbol->id;
|
2017-08-01 01:51:45 -07:00
|
|
|
register_info->storage_class = symbol->info.reg.storage_class;
|
2018-06-26 05:41:44 -07:00
|
|
|
register_info->component_type = symbol->info.reg.component_type;
|
|
|
|
register_info->write_mask = symbol->info.reg.write_mask;
|
2017-08-24 06:13:38 -07:00
|
|
|
register_info->structure_stride = symbol->info.reg.structure_stride;
|
2018-06-26 05:41:43 -07:00
|
|
|
register_info->member_idx = symbol->info.reg.member_idx;
|
2019-01-25 04:23:29 -08:00
|
|
|
register_info->is_aggregate = symbol->info.reg.is_aggregate;
|
2018-06-26 05:41:43 -07:00
|
|
|
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void vkd3d_dxbc_compiler_emit_dereference_register(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_register *reg, struct vkd3d_shader_register_info *register_info)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
2018-10-31 07:26:48 -07:00
|
|
|
unsigned int component_count, index_count = 0;
|
2018-06-26 05:41:43 -07:00
|
|
|
uint32_t type_id, ptr_type_id;
|
|
|
|
uint32_t indexes[2];
|
2017-06-20 04:34:44 -07:00
|
|
|
|
|
|
|
if (reg->type == VKD3DSPR_CONSTBUFFER)
|
|
|
|
{
|
2017-10-06 08:06:31 -07:00
|
|
|
assert(!reg->idx[0].rel_addr);
|
2018-06-26 05:41:43 -07:00
|
|
|
indexes[index_count++] = vkd3d_dxbc_compiler_get_constant_uint(compiler, register_info->member_idx);
|
2018-02-04 14:58:26 -08:00
|
|
|
indexes[index_count++] = vkd3d_dxbc_compiler_emit_register_addressing(compiler, ®->idx[1]);
|
2017-07-11 08:23:02 -07:00
|
|
|
}
|
|
|
|
else if (reg->type == VKD3DSPR_IMMCONSTBUFFER)
|
|
|
|
{
|
2018-02-04 14:58:26 -08:00
|
|
|
indexes[index_count++] = vkd3d_dxbc_compiler_emit_register_addressing(compiler, ®->idx[0]);
|
|
|
|
}
|
2018-08-01 06:34:39 -07:00
|
|
|
else if (reg->type == VKD3DSPR_IDXTEMP)
|
|
|
|
{
|
|
|
|
indexes[index_count++] = vkd3d_dxbc_compiler_emit_register_addressing(compiler, ®->idx[1]);
|
|
|
|
}
|
2019-01-25 04:23:29 -08:00
|
|
|
else if (register_info->is_aggregate)
|
2019-01-23 03:46:51 -08:00
|
|
|
{
|
2019-01-25 04:23:29 -08:00
|
|
|
if (reg->idx[0].rel_addr || reg->idx[1].rel_addr)
|
|
|
|
FIXME("Relative addressing not implemented.\n");
|
|
|
|
|
2019-01-23 03:46:51 -08:00
|
|
|
indexes[index_count++] = vkd3d_dxbc_compiler_get_constant_uint(compiler, register_info->member_idx);
|
|
|
|
}
|
2018-02-04 14:58:26 -08:00
|
|
|
else
|
|
|
|
{
|
|
|
|
if (reg->idx[0].rel_addr || reg->idx[1].rel_addr)
|
|
|
|
FIXME("Relative addressing not implemented.\n");
|
2017-07-11 08:23:02 -07:00
|
|
|
|
2018-02-04 14:58:26 -08:00
|
|
|
/* Handle arrayed registers, e.g. v[3][0]. */
|
|
|
|
if (reg->idx[1].offset != ~0u)
|
|
|
|
indexes[index_count++] = vkd3d_dxbc_compiler_get_constant_uint(compiler, reg->idx[0].offset);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (index_count)
|
|
|
|
{
|
2018-10-31 07:26:48 -07:00
|
|
|
component_count = vkd3d_write_mask_component_count(register_info->write_mask);
|
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, register_info->component_type, component_count);
|
2017-07-17 09:12:02 -07:00
|
|
|
ptr_type_id = vkd3d_spirv_get_op_type_pointer(builder, register_info->storage_class, type_id);
|
2017-06-20 04:34:44 -07:00
|
|
|
register_info->id = vkd3d_spirv_build_op_access_chain(builder, ptr_type_id,
|
2018-02-04 14:58:26 -08:00
|
|
|
register_info->id, indexes, index_count);
|
2017-10-06 08:06:31 -07:00
|
|
|
}
|
2017-06-20 04:34:44 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
static uint32_t vkd3d_dxbc_compiler_get_register_id(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_register *reg)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
2017-08-24 06:13:38 -07:00
|
|
|
struct vkd3d_shader_register_info register_info;
|
2017-06-20 04:34:44 -07:00
|
|
|
|
|
|
|
switch (reg->type)
|
|
|
|
{
|
|
|
|
case VKD3DSPR_TEMP:
|
2018-08-01 06:34:39 -07:00
|
|
|
case VKD3DSPR_IDXTEMP:
|
2017-06-20 04:34:44 -07:00
|
|
|
case VKD3DSPR_INPUT:
|
|
|
|
case VKD3DSPR_OUTPUT:
|
|
|
|
case VKD3DSPR_COLOROUT:
|
2017-08-18 05:52:40 -07:00
|
|
|
case VKD3DSPR_DEPTHOUT:
|
2018-10-19 07:55:49 -07:00
|
|
|
case VKD3DSPR_DEPTHOUTGE:
|
|
|
|
case VKD3DSPR_DEPTHOUTLE:
|
2017-06-20 04:34:44 -07:00
|
|
|
case VKD3DSPR_CONSTBUFFER:
|
2017-07-18 08:32:26 -07:00
|
|
|
case VKD3DSPR_IMMCONSTBUFFER:
|
2017-07-17 07:25:29 -07:00
|
|
|
case VKD3DSPR_SAMPLER:
|
2017-07-18 08:32:26 -07:00
|
|
|
case VKD3DSPR_THREADID:
|
|
|
|
case VKD3DSPR_LOCALTHREADID:
|
2017-07-18 08:32:26 -07:00
|
|
|
case VKD3DSPR_LOCALTHREADINDEX:
|
2017-07-18 08:32:26 -07:00
|
|
|
case VKD3DSPR_THREADGROUPID:
|
2018-01-09 04:13:04 -08:00
|
|
|
if (vkd3d_dxbc_compiler_get_register_info(compiler, reg, ®ister_info))
|
2018-06-26 05:41:43 -07:00
|
|
|
{
|
|
|
|
vkd3d_dxbc_compiler_emit_dereference_register(compiler, reg, ®ister_info);
|
2018-01-09 04:13:04 -08:00
|
|
|
return register_info.id;
|
2018-06-26 05:41:43 -07:00
|
|
|
}
|
2018-01-09 04:13:05 -08:00
|
|
|
return vkd3d_dxbc_compiler_emit_variable(compiler, &builder->global_stream,
|
|
|
|
SpvStorageClassPrivate, VKD3D_TYPE_FLOAT, VKD3D_VEC4_SIZE);
|
2017-06-20 04:34:44 -07:00
|
|
|
case VKD3DSPR_IMMCONST:
|
2017-06-26 08:03:31 -07:00
|
|
|
ERR("Unexpected register type %#x.\n", reg->type);
|
2018-01-09 04:13:05 -08:00
|
|
|
return vkd3d_dxbc_compiler_emit_variable(compiler, &builder->global_stream,
|
|
|
|
SpvStorageClassPrivate, VKD3D_TYPE_FLOAT, VKD3D_VEC4_SIZE);
|
2017-06-20 04:34:44 -07:00
|
|
|
default:
|
|
|
|
FIXME("Unhandled register type %#x.\n", reg->type);
|
2018-01-09 04:13:05 -08:00
|
|
|
return vkd3d_dxbc_compiler_emit_variable(compiler, &builder->global_stream,
|
|
|
|
SpvStorageClassPrivate, VKD3D_TYPE_FLOAT, VKD3D_VEC4_SIZE);
|
2017-06-20 04:34:44 -07:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-06-26 05:41:44 -07:00
|
|
|
static uint32_t vkd3d_dxbc_compiler_emit_swizzle_ext(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
uint32_t val_id, unsigned int val_write_mask, enum vkd3d_component_type component_type,
|
|
|
|
unsigned int swizzle, unsigned int write_mask)
|
2017-07-14 08:21:23 -07:00
|
|
|
{
|
2018-06-26 05:41:44 -07:00
|
|
|
unsigned int i, component_idx, component_count, val_component_count;
|
2017-07-14 08:21:23 -07:00
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
uint32_t type_id, components[VKD3D_VEC4_SIZE];
|
|
|
|
|
2018-10-31 07:26:46 -07:00
|
|
|
component_count = vkd3d_write_mask_component_count(write_mask);
|
|
|
|
val_component_count = vkd3d_write_mask_component_count(val_write_mask);
|
|
|
|
|
|
|
|
if (component_count == val_component_count
|
|
|
|
&& vkd3d_compact_swizzle(swizzle, write_mask) == vkd3d_compact_swizzle(VKD3D_NO_SWIZZLE, val_write_mask))
|
2017-07-14 08:21:23 -07:00
|
|
|
return val_id;
|
|
|
|
|
2017-08-16 04:11:52 -07:00
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, component_type, component_count);
|
2017-07-14 08:21:23 -07:00
|
|
|
|
|
|
|
if (component_count == 1)
|
|
|
|
{
|
|
|
|
component_idx = vkd3d_write_mask_get_component_idx(write_mask);
|
|
|
|
component_idx = vkd3d_swizzle_get_component(swizzle, component_idx);
|
2018-11-01 14:39:29 -07:00
|
|
|
component_idx -= vkd3d_write_mask_get_component_idx(val_write_mask);
|
2017-08-24 02:11:16 -07:00
|
|
|
return vkd3d_spirv_build_op_composite_extract1(builder, type_id, val_id, component_idx);
|
2017-07-14 08:21:23 -07:00
|
|
|
}
|
|
|
|
|
2018-06-26 05:41:44 -07:00
|
|
|
if (val_component_count == 1)
|
|
|
|
{
|
|
|
|
for (i = 0, component_idx = 0; i < VKD3D_VEC4_SIZE; ++i)
|
|
|
|
{
|
|
|
|
if (write_mask & (VKD3DSP_WRITEMASK_0 << i))
|
|
|
|
{
|
|
|
|
assert(VKD3DSP_WRITEMASK_0 << vkd3d_swizzle_get_component(swizzle, i) == val_write_mask);
|
|
|
|
components[component_idx++] = val_id;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return vkd3d_spirv_build_op_composite_construct(builder, type_id, components, component_count);
|
|
|
|
}
|
|
|
|
|
2017-07-14 08:21:23 -07:00
|
|
|
for (i = 0, component_idx = 0; i < VKD3D_VEC4_SIZE; ++i)
|
|
|
|
{
|
|
|
|
if (write_mask & (VKD3DSP_WRITEMASK_0 << i))
|
|
|
|
components[component_idx++] = vkd3d_swizzle_get_component(swizzle, i);
|
|
|
|
}
|
|
|
|
return vkd3d_spirv_build_op_vector_shuffle(builder,
|
|
|
|
type_id, val_id, val_id, components, component_count);
|
|
|
|
}
|
|
|
|
|
2018-06-26 05:41:44 -07:00
|
|
|
static uint32_t vkd3d_dxbc_compiler_emit_swizzle(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
uint32_t val_id, enum vkd3d_component_type component_type, DWORD swizzle, DWORD write_mask)
|
|
|
|
{
|
|
|
|
return vkd3d_dxbc_compiler_emit_swizzle_ext(compiler,
|
|
|
|
val_id, VKD3DSP_WRITEMASK_ALL, component_type, swizzle, write_mask);
|
|
|
|
}
|
|
|
|
|
2018-08-01 06:34:43 -07:00
|
|
|
static uint32_t vkd3d_dxbc_compiler_emit_vector_shuffle(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
uint32_t vector1_id, uint32_t vector2_id, uint32_t write_mask,
|
|
|
|
enum vkd3d_component_type component_type, unsigned int component_count)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
uint32_t components[VKD3D_VEC4_SIZE];
|
|
|
|
unsigned int i, component_idx;
|
|
|
|
uint32_t type_id;
|
|
|
|
|
|
|
|
assert(component_count <= ARRAY_SIZE(components));
|
|
|
|
|
|
|
|
for (i = 0, component_idx = 0; i < component_count; ++i)
|
|
|
|
{
|
|
|
|
if (write_mask & (VKD3DSP_WRITEMASK_0 << i))
|
|
|
|
components[i] = VKD3D_VEC4_SIZE + component_idx++;
|
|
|
|
else
|
|
|
|
components[i] = i;
|
|
|
|
}
|
|
|
|
|
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, component_type, component_count);
|
|
|
|
return vkd3d_spirv_build_op_vector_shuffle(builder,
|
|
|
|
type_id, vector1_id, vector2_id, components, component_count);
|
|
|
|
}
|
|
|
|
|
2017-06-20 04:34:44 -07:00
|
|
|
static uint32_t vkd3d_dxbc_compiler_emit_load_constant(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_register *reg, DWORD swizzle, DWORD write_mask)
|
|
|
|
{
|
|
|
|
unsigned int component_count = vkd3d_write_mask_component_count(write_mask);
|
2018-08-15 04:57:52 -07:00
|
|
|
uint32_t values[VKD3D_VEC4_SIZE] = {0};
|
2017-06-20 04:34:44 -07:00
|
|
|
unsigned int i, j;
|
|
|
|
|
|
|
|
assert(reg->type == VKD3DSPR_IMMCONST);
|
|
|
|
|
2017-06-26 08:03:31 -07:00
|
|
|
if (reg->immconst_type == VKD3D_IMMCONST_SCALAR)
|
2017-06-20 04:34:44 -07:00
|
|
|
{
|
2018-09-24 01:25:17 -07:00
|
|
|
for (i = 0; i < component_count; ++i)
|
|
|
|
values[i] = *reg->u.immconst_uint;
|
2017-06-20 04:34:44 -07:00
|
|
|
}
|
2017-06-26 08:03:31 -07:00
|
|
|
else
|
2017-06-20 04:34:44 -07:00
|
|
|
{
|
2017-06-26 08:03:31 -07:00
|
|
|
for (i = 0, j = 0; i < VKD3D_VEC4_SIZE; ++i)
|
|
|
|
{
|
|
|
|
if (write_mask & (VKD3DSP_WRITEMASK_0 << i))
|
2018-05-29 03:50:32 -07:00
|
|
|
values[j++] = reg->u.immconst_uint[vkd3d_swizzle_get_component(swizzle, i)];
|
2017-06-26 08:03:31 -07:00
|
|
|
}
|
2017-06-20 04:34:44 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
return vkd3d_dxbc_compiler_get_constant(compiler,
|
|
|
|
vkd3d_component_type_from_data_type(reg->data_type), component_count, values);
|
|
|
|
}
|
|
|
|
|
|
|
|
static uint32_t vkd3d_dxbc_compiler_emit_load_scalar(struct vkd3d_dxbc_compiler *compiler,
|
2018-10-30 07:22:49 -07:00
|
|
|
const struct vkd3d_shader_register *reg, DWORD swizzle, DWORD write_mask,
|
|
|
|
const struct vkd3d_shader_register_info *reg_info)
|
2017-06-20 04:34:44 -07:00
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
2018-06-26 05:41:44 -07:00
|
|
|
uint32_t type_id, ptr_type_id, indexes[1], reg_id, val_id;
|
|
|
|
unsigned int component_idx, reg_component_count;
|
|
|
|
enum vkd3d_component_type component_type;
|
2017-06-20 04:34:44 -07:00
|
|
|
|
|
|
|
assert(reg->type != VKD3DSPR_IMMCONST);
|
|
|
|
assert(vkd3d_write_mask_component_count(write_mask) == 1);
|
|
|
|
|
|
|
|
component_idx = vkd3d_write_mask_get_component_idx(write_mask);
|
|
|
|
component_idx = vkd3d_swizzle_get_component(swizzle, component_idx);
|
2018-06-26 05:41:44 -07:00
|
|
|
component_type = vkd3d_component_type_from_data_type(reg->data_type);
|
2017-06-20 04:34:44 -07:00
|
|
|
|
2018-10-30 07:22:49 -07:00
|
|
|
reg_component_count = vkd3d_write_mask_component_count(reg_info->write_mask);
|
2017-06-20 04:34:44 -07:00
|
|
|
|
2018-10-31 07:26:48 -07:00
|
|
|
if (!(reg_info->write_mask & (VKD3DSP_WRITEMASK_0 << component_idx)))
|
|
|
|
ERR("Invalid component_idx for register %#x, %u (write_mask %#x).\n",
|
|
|
|
reg->type, reg->idx[0].offset, reg_info->write_mask);
|
2018-06-26 05:41:44 -07:00
|
|
|
|
2018-10-30 07:22:49 -07:00
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, reg_info->component_type, 1);
|
|
|
|
reg_id = reg_info->id;
|
2018-06-26 05:41:44 -07:00
|
|
|
if (reg_component_count != 1)
|
|
|
|
{
|
2018-10-30 07:22:49 -07:00
|
|
|
ptr_type_id = vkd3d_spirv_get_op_type_pointer(builder, reg_info->storage_class, type_id);
|
2018-06-26 05:41:44 -07:00
|
|
|
indexes[0] = vkd3d_dxbc_compiler_get_constant_uint(compiler, component_idx);
|
|
|
|
reg_id = vkd3d_spirv_build_op_in_bounds_access_chain(builder,
|
|
|
|
ptr_type_id, reg_id, indexes, ARRAY_SIZE(indexes));
|
|
|
|
}
|
2017-06-20 04:34:44 -07:00
|
|
|
|
2018-06-26 05:41:44 -07:00
|
|
|
val_id = vkd3d_spirv_build_op_load(builder, type_id, reg_id, SpvMemoryAccessMaskNone);
|
2017-06-20 04:34:44 -07:00
|
|
|
|
2018-10-30 07:22:49 -07:00
|
|
|
if (component_type != reg_info->component_type)
|
2017-06-20 04:34:44 -07:00
|
|
|
{
|
2018-06-26 05:41:44 -07:00
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, component_type, 1);
|
2017-06-20 04:34:44 -07:00
|
|
|
val_id = vkd3d_spirv_build_op_bitcast(builder, type_id, val_id);
|
|
|
|
}
|
|
|
|
|
|
|
|
return val_id;
|
|
|
|
}
|
|
|
|
|
|
|
|
static uint32_t vkd3d_dxbc_compiler_emit_load_reg(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_register *reg, DWORD swizzle, DWORD write_mask)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
2018-06-26 05:41:44 -07:00
|
|
|
struct vkd3d_shader_register_info reg_info;
|
|
|
|
enum vkd3d_component_type component_type;
|
2017-07-14 08:21:23 -07:00
|
|
|
unsigned int component_count;
|
2018-06-26 05:41:44 -07:00
|
|
|
uint32_t type_id, val_id;
|
2017-06-20 04:34:44 -07:00
|
|
|
|
|
|
|
if (reg->type == VKD3DSPR_IMMCONST)
|
|
|
|
return vkd3d_dxbc_compiler_emit_load_constant(compiler, reg, swizzle, write_mask);
|
|
|
|
|
|
|
|
component_count = vkd3d_write_mask_component_count(write_mask);
|
2018-06-26 05:41:44 -07:00
|
|
|
component_type = vkd3d_component_type_from_data_type(reg->data_type);
|
|
|
|
if (!vkd3d_dxbc_compiler_get_register_info(compiler, reg, ®_info))
|
|
|
|
{
|
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, component_type, component_count);
|
|
|
|
return vkd3d_spirv_build_op_undef(builder, &builder->global_stream, type_id);
|
|
|
|
}
|
|
|
|
vkd3d_dxbc_compiler_emit_dereference_register(compiler, reg, ®_info);
|
2017-06-20 04:34:44 -07:00
|
|
|
|
2019-02-07 00:59:16 -08:00
|
|
|
/* Intermediate value (no storage class). */
|
|
|
|
if (reg_info.storage_class == SpvStorageClassMax)
|
|
|
|
{
|
|
|
|
val_id = reg_info.id;
|
|
|
|
}
|
|
|
|
else if (component_count == 1)
|
|
|
|
{
|
2018-10-30 07:22:49 -07:00
|
|
|
return vkd3d_dxbc_compiler_emit_load_scalar(compiler, reg, swizzle, write_mask, ®_info);
|
2019-02-07 00:59:16 -08:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
type_id = vkd3d_spirv_get_type_id(builder,
|
|
|
|
reg_info.component_type, vkd3d_write_mask_component_count(reg_info.write_mask));
|
|
|
|
val_id = vkd3d_spirv_build_op_load(builder, type_id, reg_info.id, SpvMemoryAccessMaskNone);
|
|
|
|
}
|
2017-06-20 04:34:44 -07:00
|
|
|
|
2018-06-26 05:41:44 -07:00
|
|
|
val_id = vkd3d_dxbc_compiler_emit_swizzle_ext(compiler,
|
|
|
|
val_id, reg_info.write_mask, reg_info.component_type, swizzle, write_mask);
|
|
|
|
|
|
|
|
if (component_type != reg_info.component_type)
|
2017-06-20 04:34:44 -07:00
|
|
|
{
|
2018-06-26 05:41:44 -07:00
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, component_type, component_count);
|
2017-06-20 04:34:44 -07:00
|
|
|
val_id = vkd3d_spirv_build_op_bitcast(builder, type_id, val_id);
|
|
|
|
}
|
|
|
|
|
|
|
|
return val_id;
|
|
|
|
}
|
|
|
|
|
2019-01-14 08:05:42 -08:00
|
|
|
static void vkd3d_dxbc_compiler_emit_execution_mode(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
SpvExecutionMode mode, const uint32_t *literals, unsigned int literal_count)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
|
|
|
|
vkd3d_spirv_build_op_execution_mode(&builder->execution_mode_stream,
|
|
|
|
builder->main_function_id, mode, literals, literal_count);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void vkd3d_dxbc_compiler_emit_execution_mode1(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
SpvExecutionMode mode, const uint32_t literal)
|
|
|
|
{
|
|
|
|
vkd3d_dxbc_compiler_emit_execution_mode(compiler, mode, &literal, 1);
|
|
|
|
}
|
|
|
|
|
2017-06-29 04:40:27 -07:00
|
|
|
static uint32_t vkd3d_dxbc_compiler_emit_abs(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_register *reg, DWORD write_mask, uint32_t val_id)
|
|
|
|
{
|
|
|
|
unsigned int component_count = vkd3d_write_mask_component_count(write_mask);
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
uint32_t type_id;
|
|
|
|
|
|
|
|
if (reg->data_type == VKD3D_DATA_FLOAT)
|
|
|
|
{
|
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_FLOAT, component_count);
|
|
|
|
return vkd3d_spirv_build_op_glsl_std450_fabs(builder, type_id, val_id);
|
|
|
|
}
|
|
|
|
|
|
|
|
FIXME("Unhandled data type %#x.\n", reg->data_type);
|
|
|
|
return val_id;
|
|
|
|
}
|
|
|
|
|
2017-06-29 00:02:50 -07:00
|
|
|
static uint32_t vkd3d_dxbc_compiler_emit_neg(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_register *reg, DWORD write_mask, uint32_t val_id)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
uint32_t type_id;
|
|
|
|
|
2018-09-05 04:45:26 -07:00
|
|
|
type_id = vkd3d_dxbc_compiler_get_type_id_for_reg(compiler, reg, write_mask);
|
2017-06-29 00:02:50 -07:00
|
|
|
if (reg->data_type == VKD3D_DATA_FLOAT)
|
2017-06-29 04:40:27 -07:00
|
|
|
return vkd3d_spirv_build_op_fnegate(builder, type_id, val_id);
|
2017-06-29 00:02:50 -07:00
|
|
|
else if (reg->data_type == VKD3D_DATA_INT)
|
2017-06-29 04:40:27 -07:00
|
|
|
return vkd3d_spirv_build_op_snegate(builder, type_id, val_id);
|
2017-06-29 00:02:50 -07:00
|
|
|
|
|
|
|
FIXME("Unhandled data type %#x.\n", reg->data_type);
|
|
|
|
return val_id;
|
|
|
|
}
|
|
|
|
|
2017-06-21 13:00:19 -07:00
|
|
|
static uint32_t vkd3d_dxbc_compiler_emit_src_modifier(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_register *reg, DWORD write_mask,
|
|
|
|
enum vkd3d_shader_src_modifier modifier, uint32_t val_id)
|
|
|
|
{
|
|
|
|
switch (modifier)
|
|
|
|
{
|
|
|
|
case VKD3DSPSM_NONE:
|
|
|
|
break;
|
|
|
|
case VKD3DSPSM_NEG:
|
2017-06-29 00:02:50 -07:00
|
|
|
return vkd3d_dxbc_compiler_emit_neg(compiler, reg, write_mask, val_id);
|
2017-06-27 13:21:43 -07:00
|
|
|
case VKD3DSPSM_ABS:
|
2017-06-29 04:40:27 -07:00
|
|
|
return vkd3d_dxbc_compiler_emit_abs(compiler, reg, write_mask, val_id);
|
|
|
|
case VKD3DSPSM_ABSNEG:
|
|
|
|
val_id = vkd3d_dxbc_compiler_emit_abs(compiler, reg, write_mask, val_id);
|
|
|
|
return vkd3d_dxbc_compiler_emit_neg(compiler, reg, write_mask, val_id);
|
2017-06-21 13:00:19 -07:00
|
|
|
default:
|
|
|
|
FIXME("Unhandled src modifier %#x.\n", modifier);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return val_id;
|
|
|
|
}
|
|
|
|
|
|
|
|
static uint32_t vkd3d_dxbc_compiler_emit_load_src(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_src_param *src, DWORD write_mask)
|
|
|
|
{
|
|
|
|
uint32_t val_id;
|
|
|
|
|
|
|
|
val_id = vkd3d_dxbc_compiler_emit_load_reg(compiler, &src->reg, src->swizzle, write_mask);
|
|
|
|
return vkd3d_dxbc_compiler_emit_src_modifier(compiler, &src->reg, write_mask, src->modifiers, val_id);
|
|
|
|
}
|
|
|
|
|
2019-01-15 03:09:44 -08:00
|
|
|
static uint32_t vkd3d_dxbc_compiler_emit_load_src_with_type(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_src_param *src, DWORD write_mask, enum vkd3d_component_type component_type)
|
|
|
|
{
|
|
|
|
struct vkd3d_shader_src_param src_param = *src;
|
|
|
|
|
|
|
|
src_param.reg.data_type = vkd3d_data_type_from_component_type(component_type);
|
|
|
|
return vkd3d_dxbc_compiler_emit_load_src(compiler, &src_param, write_mask);
|
|
|
|
}
|
|
|
|
|
2017-06-20 04:34:44 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_store_scalar(struct vkd3d_dxbc_compiler *compiler,
|
2018-10-30 07:22:48 -07:00
|
|
|
const struct vkd3d_shader_register *reg, DWORD write_mask,
|
|
|
|
const struct vkd3d_shader_register_info *reg_info, uint32_t val_id)
|
2017-06-20 04:34:44 -07:00
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
2018-10-30 07:22:50 -07:00
|
|
|
uint32_t type_id, ptr_type_id, id, index[1];
|
2017-06-20 04:34:44 -07:00
|
|
|
unsigned int component_idx;
|
|
|
|
|
|
|
|
assert(reg->type != VKD3DSPR_IMMCONST);
|
|
|
|
|
2018-10-30 07:22:50 -07:00
|
|
|
id = reg_info->id;
|
|
|
|
if (vkd3d_write_mask_component_count(reg_info->write_mask) > 1)
|
|
|
|
{
|
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, reg_info->component_type, 1);
|
|
|
|
ptr_type_id = vkd3d_spirv_get_op_type_pointer(builder, reg_info->storage_class, type_id);
|
|
|
|
component_idx = vkd3d_write_mask_get_component_idx(write_mask);
|
|
|
|
index[0] = vkd3d_dxbc_compiler_get_constant_uint(compiler, component_idx);
|
|
|
|
id = vkd3d_spirv_build_op_in_bounds_access_chain(builder, ptr_type_id, id, index, ARRAY_SIZE(index));
|
|
|
|
}
|
2017-06-20 04:34:44 -07:00
|
|
|
|
2018-10-30 07:22:50 -07:00
|
|
|
vkd3d_spirv_build_op_store(builder, id, val_id, SpvMemoryAccessMaskNone);
|
2017-06-20 04:34:44 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
static void vkd3d_dxbc_compiler_emit_store_reg(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_register *reg, DWORD write_mask, uint32_t val_id)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
2018-10-30 07:22:48 -07:00
|
|
|
struct vkd3d_shader_register_info reg_info;
|
|
|
|
enum vkd3d_component_type component_type;
|
|
|
|
uint32_t type_id, reg_val_id;
|
2018-08-01 06:34:43 -07:00
|
|
|
unsigned int component_count;
|
2017-06-20 04:34:44 -07:00
|
|
|
|
|
|
|
assert(reg->type != VKD3DSPR_IMMCONST);
|
2017-07-24 10:43:50 -07:00
|
|
|
assert(write_mask);
|
2017-06-20 04:34:44 -07:00
|
|
|
|
|
|
|
component_count = vkd3d_write_mask_component_count(write_mask);
|
2018-10-30 07:22:48 -07:00
|
|
|
component_type = vkd3d_component_type_from_data_type(reg->data_type);
|
|
|
|
if (!vkd3d_dxbc_compiler_get_register_info(compiler, reg, ®_info))
|
|
|
|
return;
|
|
|
|
vkd3d_dxbc_compiler_emit_dereference_register(compiler, reg, ®_info);
|
2017-06-20 04:34:44 -07:00
|
|
|
|
2018-10-30 07:22:48 -07:00
|
|
|
if (component_type != reg_info.component_type)
|
2017-06-20 04:34:44 -07:00
|
|
|
{
|
2018-10-30 07:22:48 -07:00
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, reg_info.component_type, component_count);
|
2017-06-20 04:34:44 -07:00
|
|
|
val_id = vkd3d_spirv_build_op_bitcast(builder, type_id, val_id);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (component_count == 1)
|
2018-10-30 07:22:48 -07:00
|
|
|
return vkd3d_dxbc_compiler_emit_store_scalar(compiler, reg, write_mask, ®_info, val_id);
|
2017-07-06 09:11:57 -07:00
|
|
|
|
2017-06-20 04:34:44 -07:00
|
|
|
if (component_count != VKD3D_VEC4_SIZE)
|
|
|
|
{
|
2018-10-30 07:22:48 -07:00
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, reg_info.component_type, VKD3D_VEC4_SIZE);
|
|
|
|
reg_val_id = vkd3d_spirv_build_op_load(builder, type_id, reg_info.id, SpvMemoryAccessMaskNone);
|
2017-06-20 04:34:44 -07:00
|
|
|
|
2018-08-01 06:34:43 -07:00
|
|
|
val_id = vkd3d_dxbc_compiler_emit_vector_shuffle(compiler,
|
2018-10-30 07:22:48 -07:00
|
|
|
reg_val_id, val_id, write_mask, reg_info.component_type, VKD3D_VEC4_SIZE);
|
2017-06-20 04:34:44 -07:00
|
|
|
}
|
|
|
|
|
2018-10-30 07:22:48 -07:00
|
|
|
vkd3d_spirv_build_op_store(builder, reg_info.id, val_id, SpvMemoryAccessMaskNone);
|
2017-06-20 04:34:44 -07:00
|
|
|
}
|
|
|
|
|
2017-06-29 04:40:27 -07:00
|
|
|
static uint32_t vkd3d_dxbc_compiler_emit_sat(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_register *reg, DWORD write_mask, uint32_t val_id)
|
|
|
|
{
|
|
|
|
unsigned int component_count = vkd3d_write_mask_component_count(write_mask);
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
uint32_t type_id, zero_id, one_id;
|
|
|
|
|
2018-02-04 14:58:28 -08:00
|
|
|
zero_id = vkd3d_dxbc_compiler_get_constant_float_vector(compiler, 0.0f, component_count);
|
|
|
|
one_id = vkd3d_dxbc_compiler_get_constant_float_vector(compiler, 1.0f, component_count);
|
2017-06-29 04:40:27 -07:00
|
|
|
|
2018-09-05 04:45:26 -07:00
|
|
|
type_id = vkd3d_dxbc_compiler_get_type_id_for_reg(compiler, reg, write_mask);
|
2017-06-29 04:40:27 -07:00
|
|
|
if (reg->data_type == VKD3D_DATA_FLOAT)
|
|
|
|
return vkd3d_spirv_build_op_glsl_std450_nclamp(builder, type_id, val_id, zero_id, one_id);
|
|
|
|
|
|
|
|
FIXME("Unhandled data type %#x.\n", reg->data_type);
|
|
|
|
return val_id;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void vkd3d_dxbc_compiler_emit_store_dst(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_dst_param *dst, uint32_t val_id)
|
|
|
|
{
|
|
|
|
assert(!(dst->modifiers & ~VKD3DSPDM_SATURATE));
|
|
|
|
if (dst->modifiers & VKD3DSPDM_SATURATE)
|
|
|
|
val_id = vkd3d_dxbc_compiler_emit_sat(compiler, &dst->reg, dst->write_mask, val_id);
|
|
|
|
|
|
|
|
vkd3d_dxbc_compiler_emit_store_reg(compiler, &dst->reg, dst->write_mask, val_id);
|
|
|
|
}
|
|
|
|
|
2017-09-04 09:32:40 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_store_dst_swizzled(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_dst_param *dst, uint32_t val_id,
|
|
|
|
enum vkd3d_component_type component_type, DWORD swizzle)
|
|
|
|
{
|
|
|
|
struct vkd3d_shader_dst_param typed_dst = *dst;
|
|
|
|
val_id = vkd3d_dxbc_compiler_emit_swizzle(compiler,
|
|
|
|
val_id, component_type, swizzle, dst->write_mask);
|
|
|
|
/* XXX: The register data type could be fixed by the shader parser. For SM5
|
|
|
|
* shaders the data types are stored in instructions modifiers.
|
|
|
|
*/
|
|
|
|
typed_dst.reg.data_type = vkd3d_data_type_from_component_type(component_type);
|
|
|
|
vkd3d_dxbc_compiler_emit_store_dst(compiler, &typed_dst, val_id);
|
|
|
|
}
|
|
|
|
|
2017-08-24 06:13:38 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_store_dst_components(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_dst_param *dst, enum vkd3d_component_type component_type,
|
|
|
|
uint32_t *component_ids)
|
|
|
|
{
|
|
|
|
unsigned int component_count = vkd3d_write_mask_component_count(dst->write_mask);
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
uint32_t type_id, val_id;
|
|
|
|
|
|
|
|
if (component_count > 1)
|
|
|
|
{
|
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, component_type, component_count);
|
|
|
|
val_id = vkd3d_spirv_build_op_composite_construct(builder,
|
|
|
|
type_id, component_ids, component_count);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
val_id = *component_ids;
|
|
|
|
}
|
|
|
|
vkd3d_dxbc_compiler_emit_store_dst(compiler, dst, val_id);
|
|
|
|
}
|
|
|
|
|
2017-12-15 06:16:19 -08:00
|
|
|
static void vkd3d_dxbc_compiler_emit_store_dst_scalar(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_dst_param *dst, uint32_t val_id,
|
|
|
|
enum vkd3d_component_type component_type, DWORD swizzle)
|
|
|
|
{
|
|
|
|
unsigned int component_count = vkd3d_write_mask_component_count(dst->write_mask);
|
|
|
|
uint32_t component_ids[VKD3D_VEC4_SIZE];
|
|
|
|
unsigned int component_idx, i;
|
|
|
|
|
|
|
|
component_idx = vkd3d_write_mask_get_component_idx(dst->write_mask);
|
|
|
|
for (i = 0; i < component_count; ++i)
|
|
|
|
{
|
|
|
|
if (vkd3d_swizzle_get_component(swizzle, component_idx + i))
|
|
|
|
ERR("Invalid swizzle %#x for scalar value, write mask %#x.\n", swizzle, dst->write_mask);
|
|
|
|
|
|
|
|
component_ids[i] = val_id;
|
|
|
|
}
|
|
|
|
vkd3d_dxbc_compiler_emit_store_dst_components(compiler, dst, component_type, component_ids);
|
|
|
|
}
|
|
|
|
|
2017-09-12 08:42:42 -07:00
|
|
|
static void vkd3d_dxbc_compiler_decorate_builtin(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
uint32_t target_id, SpvBuiltIn builtin)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
|
2018-06-26 05:41:46 -07:00
|
|
|
switch (builtin)
|
|
|
|
{
|
|
|
|
case SpvBuiltInFragDepth:
|
2018-10-19 07:55:50 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_execution_mode(compiler, SpvExecutionModeDepthReplacing, NULL, 0);
|
2018-06-26 05:41:46 -07:00
|
|
|
break;
|
|
|
|
case SpvBuiltInLayer:
|
|
|
|
vkd3d_spirv_enable_capability(builder, SpvCapabilityGeometry);
|
|
|
|
break;
|
2018-10-21 16:49:18 -07:00
|
|
|
case SpvBuiltInViewportIndex:
|
|
|
|
vkd3d_spirv_enable_capability(builder, SpvCapabilityMultiViewport);
|
|
|
|
break;
|
|
|
|
case SpvBuiltInSampleId:
|
|
|
|
vkd3d_spirv_enable_capability(builder, SpvCapabilitySampleRateShading);
|
|
|
|
break;
|
2018-06-26 05:41:46 -07:00
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
2017-09-12 08:42:42 -07:00
|
|
|
|
|
|
|
vkd3d_spirv_build_op_decorate1(builder, target_id, SpvDecorationBuiltIn, builtin);
|
|
|
|
}
|
|
|
|
|
2017-10-31 07:44:44 -07:00
|
|
|
static uint32_t vkd3d_dxbc_compiler_emit_int_to_bool(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
enum vkd3d_shader_conditional_op condition, unsigned int component_count, uint32_t val_id)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
uint32_t type_id;
|
|
|
|
SpvOp op;
|
|
|
|
|
|
|
|
assert(!(condition & ~(VKD3D_SHADER_CONDITIONAL_OP_NZ | VKD3D_SHADER_CONDITIONAL_OP_Z)));
|
|
|
|
|
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_BOOL, component_count);
|
|
|
|
op = condition & VKD3D_SHADER_CONDITIONAL_OP_Z ? SpvOpIEqual : SpvOpINotEqual;
|
|
|
|
return vkd3d_spirv_build_op_tr2(builder, &builder->function_stream, op, type_id, val_id,
|
2017-12-14 02:45:56 -08:00
|
|
|
vkd3d_dxbc_compiler_get_constant_uint_vector(compiler, 0, component_count));
|
2017-10-31 07:44:44 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
static uint32_t vkd3d_dxbc_compiler_emit_bool_to_int(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
unsigned int component_count, uint32_t val_id)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
uint32_t type_id, true_id, false_id;
|
|
|
|
|
2017-12-14 02:45:56 -08:00
|
|
|
true_id = vkd3d_dxbc_compiler_get_constant_uint_vector(compiler, 0xffffffff, component_count);
|
|
|
|
false_id = vkd3d_dxbc_compiler_get_constant_uint_vector(compiler, 0, component_count);
|
2017-10-31 07:44:44 -07:00
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_UINT, component_count);
|
|
|
|
return vkd3d_spirv_build_op_select(builder, type_id, val_id, true_id, false_id);
|
|
|
|
}
|
|
|
|
|
2017-09-12 08:42:42 -07:00
|
|
|
typedef uint32_t (*vkd3d_spirv_builtin_fixup_pfn)(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
uint32_t val_id);
|
|
|
|
|
2019-01-15 03:09:41 -08:00
|
|
|
static uint32_t vkd3d_dxbc_compiler_emit_draw_parameter_fixup(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
uint32_t index_id, SpvBuiltIn base)
|
2017-09-12 08:42:42 -07:00
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
2019-01-15 03:09:41 -08:00
|
|
|
uint32_t base_var_id, base_id, type_id;
|
2017-09-12 08:42:42 -07:00
|
|
|
|
|
|
|
vkd3d_spirv_enable_capability(builder, SpvCapabilityDrawParameters);
|
|
|
|
|
2019-01-15 03:09:41 -08:00
|
|
|
base_var_id = vkd3d_dxbc_compiler_emit_variable(compiler, &builder->global_stream,
|
2017-09-12 08:42:42 -07:00
|
|
|
SpvStorageClassInput, VKD3D_TYPE_INT, 1);
|
2019-01-15 03:09:41 -08:00
|
|
|
vkd3d_spirv_add_iface_variable(builder, base_var_id);
|
|
|
|
vkd3d_dxbc_compiler_decorate_builtin(compiler, base_var_id, base);
|
2017-09-12 08:42:42 -07:00
|
|
|
|
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_INT, 1);
|
2019-01-15 03:09:41 -08:00
|
|
|
base_id = vkd3d_spirv_build_op_load(builder,
|
|
|
|
type_id, base_var_id, SpvMemoryAccessMaskNone);
|
2017-09-12 08:42:42 -07:00
|
|
|
|
2019-01-15 03:09:41 -08:00
|
|
|
return vkd3d_spirv_build_op_isub(builder, type_id, index_id, base_id);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Substitute "VertexIndex - BaseVertex" for SV_VertexID. */
|
|
|
|
static uint32_t sv_vertex_id_fixup(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
uint32_t vertex_index_id)
|
|
|
|
{
|
|
|
|
return vkd3d_dxbc_compiler_emit_draw_parameter_fixup(compiler,
|
|
|
|
vertex_index_id, SpvBuiltInBaseVertex);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Substitute "InstanceIndex - BaseInstance" for SV_InstanceID. */
|
|
|
|
static uint32_t sv_instance_id_fixup(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
uint32_t instance_index_id)
|
|
|
|
{
|
|
|
|
return vkd3d_dxbc_compiler_emit_draw_parameter_fixup(compiler,
|
|
|
|
instance_index_id, SpvBuiltInBaseInstance);
|
2017-09-12 08:42:42 -07:00
|
|
|
}
|
|
|
|
|
2018-06-26 05:41:42 -07:00
|
|
|
static uint32_t sv_front_face_fixup(struct vkd3d_dxbc_compiler *compiler,
|
2017-10-31 07:44:44 -07:00
|
|
|
uint32_t front_facing_id)
|
|
|
|
{
|
|
|
|
return vkd3d_dxbc_compiler_emit_bool_to_int(compiler, 1, front_facing_id);
|
|
|
|
}
|
|
|
|
|
2018-06-26 05:41:42 -07:00
|
|
|
struct vkd3d_spirv_builtin
|
2017-07-18 08:32:26 -07:00
|
|
|
{
|
|
|
|
enum vkd3d_component_type component_type;
|
|
|
|
unsigned int component_count;
|
|
|
|
SpvBuiltIn spirv_builtin;
|
2017-09-12 08:42:42 -07:00
|
|
|
vkd3d_spirv_builtin_fixup_pfn fixup_pfn;
|
2018-09-05 04:45:27 -07:00
|
|
|
bool is_spirv_array;
|
2018-06-26 05:41:42 -07:00
|
|
|
};
|
|
|
|
|
|
|
|
/*
|
|
|
|
* The following tables are based on the "14.6. Built-In Variables" section
|
|
|
|
* from the Vulkan spec.
|
|
|
|
*/
|
|
|
|
static const struct
|
|
|
|
{
|
|
|
|
enum vkd3d_shader_input_sysval_semantic sysval;
|
|
|
|
struct vkd3d_spirv_builtin builtin;
|
2018-10-11 06:33:34 -07:00
|
|
|
enum vkd3d_shader_target target;
|
2017-07-18 08:32:26 -07:00
|
|
|
}
|
2018-06-26 05:41:42 -07:00
|
|
|
vkd3d_system_value_builtins[] =
|
2017-07-18 08:32:26 -07:00
|
|
|
{
|
2018-10-11 06:33:34 -07:00
|
|
|
{VKD3D_SIV_VERTEX_ID, {VKD3D_TYPE_INT, 1, SpvBuiltInVertexId}, VKD3D_SHADER_TARGET_SPIRV_OPENGL_4_5},
|
|
|
|
{VKD3D_SIV_INSTANCE_ID, {VKD3D_TYPE_INT, 1, SpvBuiltInInstanceId}, VKD3D_SHADER_TARGET_SPIRV_OPENGL_4_5},
|
|
|
|
|
2018-06-26 05:41:42 -07:00
|
|
|
{VKD3D_SIV_POSITION, {VKD3D_TYPE_FLOAT, 4, SpvBuiltInPosition}},
|
2019-01-15 03:09:41 -08:00
|
|
|
{VKD3D_SIV_VERTEX_ID, {VKD3D_TYPE_INT, 1, SpvBuiltInVertexIndex, sv_vertex_id_fixup}},
|
2018-06-26 05:41:42 -07:00
|
|
|
{VKD3D_SIV_INSTANCE_ID, {VKD3D_TYPE_INT, 1, SpvBuiltInInstanceIndex, sv_instance_id_fixup}},
|
2017-07-18 08:32:26 -07:00
|
|
|
|
2018-06-26 05:41:42 -07:00
|
|
|
{VKD3D_SIV_RENDER_TARGET_ARRAY_INDEX, {VKD3D_TYPE_INT, 1, SpvBuiltInLayer}},
|
2018-10-21 16:49:18 -07:00
|
|
|
{VKD3D_SIV_VIEWPORT_ARRAY_INDEX, {VKD3D_TYPE_INT, 1, SpvBuiltInViewportIndex}},
|
2018-02-04 14:58:25 -08:00
|
|
|
|
2018-06-26 05:41:42 -07:00
|
|
|
{VKD3D_SIV_IS_FRONT_FACE, {VKD3D_TYPE_BOOL, 1, SpvBuiltInFrontFacing, sv_front_face_fixup}},
|
2018-09-05 04:45:27 -07:00
|
|
|
|
2018-10-21 16:49:18 -07:00
|
|
|
{VKD3D_SIV_SAMPLE_INDEX, {VKD3D_TYPE_UINT, 1, SpvBuiltInSampleId}},
|
2018-10-08 06:40:15 -07:00
|
|
|
|
2018-09-05 04:45:27 -07:00
|
|
|
{VKD3D_SIV_CLIP_DISTANCE, {VKD3D_TYPE_FLOAT, 1, SpvBuiltInClipDistance, NULL, true}},
|
2018-09-05 04:45:28 -07:00
|
|
|
{VKD3D_SIV_CULL_DISTANCE, {VKD3D_TYPE_FLOAT, 1, SpvBuiltInCullDistance, NULL, true}},
|
2018-06-26 05:41:42 -07:00
|
|
|
};
|
2019-01-25 04:23:30 -08:00
|
|
|
static const struct vkd3d_spirv_builtin vkd3d_pixel_shader_position_builtin =
|
|
|
|
{
|
|
|
|
VKD3D_TYPE_FLOAT, 4, SpvBuiltInFragCoord,
|
|
|
|
};
|
2018-06-26 05:41:42 -07:00
|
|
|
static const struct
|
|
|
|
{
|
|
|
|
enum vkd3d_shader_register_type reg_type;
|
|
|
|
struct vkd3d_spirv_builtin builtin;
|
|
|
|
}
|
|
|
|
vkd3d_register_builtins[] =
|
|
|
|
{
|
|
|
|
{VKD3DSPR_THREADID, {VKD3D_TYPE_INT, 3, SpvBuiltInGlobalInvocationId}},
|
|
|
|
{VKD3DSPR_LOCALTHREADID, {VKD3D_TYPE_INT, 3, SpvBuiltInLocalInvocationId}},
|
|
|
|
{VKD3DSPR_LOCALTHREADINDEX, {VKD3D_TYPE_INT, 1, SpvBuiltInLocalInvocationIndex}},
|
|
|
|
{VKD3DSPR_THREADGROUPID, {VKD3D_TYPE_INT, 3, SpvBuiltInWorkgroupId}},
|
2017-08-18 05:52:40 -07:00
|
|
|
|
2018-06-26 05:41:42 -07:00
|
|
|
{VKD3DSPR_GSINSTID, {VKD3D_TYPE_INT, 1, SpvBuiltInInvocationId}},
|
|
|
|
{VKD3DSPR_OUTPOINTID, {VKD3D_TYPE_INT, 1, SpvBuiltInInvocationId}},
|
2017-10-31 07:44:44 -07:00
|
|
|
|
2018-06-26 05:41:42 -07:00
|
|
|
{VKD3DSPR_TESSCOORD, {VKD3D_TYPE_FLOAT, 3, SpvBuiltInTessCoord}},
|
2018-05-29 03:50:29 -07:00
|
|
|
|
2019-01-24 06:09:23 -08:00
|
|
|
{VKD3DSPR_COVERAGE, {VKD3D_TYPE_UINT, 1, SpvBuiltInSampleMask, NULL, true}},
|
2019-01-23 03:46:51 -08:00
|
|
|
{VKD3DSPR_SAMPLEMASK, {VKD3D_TYPE_UINT, 1, SpvBuiltInSampleMask, NULL, true}},
|
|
|
|
|
2018-06-26 05:41:42 -07:00
|
|
|
{VKD3DSPR_DEPTHOUT, {VKD3D_TYPE_FLOAT, 1, SpvBuiltInFragDepth}},
|
2018-10-19 07:55:49 -07:00
|
|
|
{VKD3DSPR_DEPTHOUTGE, {VKD3D_TYPE_FLOAT, 1, SpvBuiltInFragDepth}},
|
|
|
|
{VKD3DSPR_DEPTHOUTLE, {VKD3D_TYPE_FLOAT, 1, SpvBuiltInFragDepth}},
|
2017-07-18 08:32:26 -07:00
|
|
|
};
|
|
|
|
|
2018-10-19 07:55:49 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_register_execution_mode(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_register *reg)
|
|
|
|
{
|
|
|
|
switch (reg->type)
|
|
|
|
{
|
|
|
|
case VKD3DSPR_DEPTHOUTGE:
|
|
|
|
vkd3d_dxbc_compiler_emit_execution_mode(compiler, SpvExecutionModeDepthGreater, NULL, 0);
|
|
|
|
break;
|
|
|
|
case VKD3DSPR_DEPTHOUTLE:
|
|
|
|
vkd3d_dxbc_compiler_emit_execution_mode(compiler, SpvExecutionModeDepthLess, NULL, 0);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-06-26 05:41:45 -07:00
|
|
|
static const struct vkd3d_spirv_builtin *get_spirv_builtin_for_sysval(
|
2018-10-17 08:59:31 -07:00
|
|
|
const struct vkd3d_dxbc_compiler *compiler, enum vkd3d_shader_input_sysval_semantic sysval)
|
2017-07-10 06:33:34 -07:00
|
|
|
{
|
2018-10-11 06:33:34 -07:00
|
|
|
enum vkd3d_shader_target target;
|
2017-07-18 08:32:26 -07:00
|
|
|
unsigned int i;
|
2017-07-10 06:33:34 -07:00
|
|
|
|
2018-06-26 05:41:45 -07:00
|
|
|
if (!sysval)
|
|
|
|
return NULL;
|
|
|
|
|
2019-01-25 04:23:30 -08:00
|
|
|
/* In pixel shaders, SV_Position is mapped to SpvBuiltInFragCoord. */
|
|
|
|
if (sysval == VKD3D_SIV_POSITION && compiler->shader_type == VKD3D_SHADER_TYPE_PIXEL)
|
|
|
|
return &vkd3d_pixel_shader_position_builtin;
|
|
|
|
|
2018-10-11 06:33:34 -07:00
|
|
|
target = vkd3d_dxbc_compiler_get_target(compiler);
|
2018-06-26 05:41:42 -07:00
|
|
|
for (i = 0; i < ARRAY_SIZE(vkd3d_system_value_builtins); ++i)
|
2017-07-10 06:33:34 -07:00
|
|
|
{
|
2018-10-11 06:33:34 -07:00
|
|
|
if (vkd3d_system_value_builtins[i].sysval == sysval
|
|
|
|
&& (!vkd3d_system_value_builtins[i].target
|
|
|
|
|| vkd3d_system_value_builtins[i].target == target))
|
2018-06-26 05:41:42 -07:00
|
|
|
return &vkd3d_system_value_builtins[i].builtin;
|
|
|
|
}
|
2017-07-18 08:32:26 -07:00
|
|
|
|
2018-06-26 05:41:45 -07:00
|
|
|
FIXME("Unhandled builtin (sysval %#x).\n", sysval);
|
|
|
|
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct vkd3d_spirv_builtin *get_spirv_builtin_for_register(
|
|
|
|
enum vkd3d_shader_register_type reg_type)
|
|
|
|
{
|
|
|
|
unsigned int i;
|
|
|
|
|
2018-06-26 05:41:42 -07:00
|
|
|
for (i = 0; i < ARRAY_SIZE(vkd3d_register_builtins); ++i)
|
|
|
|
{
|
|
|
|
if (vkd3d_register_builtins[i].reg_type == reg_type)
|
|
|
|
return &vkd3d_register_builtins[i].builtin;
|
2017-07-10 06:33:34 -07:00
|
|
|
}
|
2017-07-18 08:32:26 -07:00
|
|
|
|
2018-06-26 05:41:45 -07:00
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2018-10-17 08:59:31 -07:00
|
|
|
static const struct vkd3d_spirv_builtin *vkd3d_get_spirv_builtin(const struct vkd3d_dxbc_compiler *compiler,
|
2018-10-11 06:33:34 -07:00
|
|
|
enum vkd3d_shader_register_type reg_type, enum vkd3d_shader_input_sysval_semantic sysval)
|
2018-06-26 05:41:45 -07:00
|
|
|
{
|
|
|
|
const struct vkd3d_spirv_builtin *builtin;
|
|
|
|
|
2018-10-11 06:33:34 -07:00
|
|
|
if ((builtin = get_spirv_builtin_for_sysval(compiler, sysval)))
|
2018-06-26 05:41:45 -07:00
|
|
|
return builtin;
|
|
|
|
if ((builtin = get_spirv_builtin_for_register(reg_type)))
|
|
|
|
return builtin;
|
|
|
|
|
|
|
|
if (sysval != VKD3D_SIV_NONE || (reg_type != VKD3DSPR_OUTPUT && reg_type != VKD3DSPR_COLOROUT))
|
|
|
|
FIXME("Unhandled builtin (register type %#x, sysval %#x).\n", reg_type, sysval);
|
2017-07-18 08:32:26 -07:00
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2017-07-25 05:23:27 -07:00
|
|
|
static const struct vkd3d_shader_signature_element *vkd3d_find_signature_element_for_reg(
|
|
|
|
const struct vkd3d_shader_signature *signature, unsigned int *signature_element_index,
|
2018-06-26 05:41:48 -07:00
|
|
|
unsigned int reg_idx, DWORD write_mask)
|
2017-07-25 05:23:27 -07:00
|
|
|
{
|
|
|
|
unsigned int signature_idx;
|
|
|
|
|
|
|
|
for (signature_idx = 0; signature_idx < signature->element_count; ++signature_idx)
|
|
|
|
{
|
2018-06-26 05:41:48 -07:00
|
|
|
if (signature->elements[signature_idx].register_index == reg_idx
|
2018-08-01 06:34:41 -07:00
|
|
|
&& (signature->elements[signature_idx].mask & write_mask) == write_mask)
|
2017-07-25 05:23:27 -07:00
|
|
|
{
|
|
|
|
if (signature_element_index)
|
|
|
|
*signature_element_index = signature_idx;
|
|
|
|
return &signature->elements[signature_idx];
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
FIXME("Could not find shader signature element (register %u, write mask %#x).\n",
|
2018-06-26 05:41:48 -07:00
|
|
|
reg_idx, write_mask);
|
2017-07-25 05:23:27 -07:00
|
|
|
if (signature_element_index)
|
|
|
|
*signature_element_index = ~0u;
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2018-10-31 07:26:48 -07:00
|
|
|
static unsigned int vkd3d_count_signature_elements_for_reg(
|
|
|
|
const struct vkd3d_shader_signature *signature, unsigned int reg_idx)
|
|
|
|
{
|
|
|
|
unsigned int i, count;
|
|
|
|
|
|
|
|
count = 0;
|
|
|
|
for (i = 0; i < signature->element_count; ++i)
|
|
|
|
{
|
|
|
|
if (signature->elements[i].register_index == reg_idx)
|
|
|
|
++count;
|
|
|
|
}
|
|
|
|
return count;
|
|
|
|
}
|
|
|
|
|
2019-01-14 08:05:43 -08:00
|
|
|
static void vkd3d_dxbc_compiler_decorate_xfb_output(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
uint32_t id, unsigned int component_count, const struct vkd3d_shader_signature_element *signature_element)
|
|
|
|
{
|
|
|
|
const struct vkd3d_shader_transform_feedback_info *xfb_info = compiler->xfb_info;
|
|
|
|
const struct vkd3d_shader_transform_feedback_element *xfb_element;
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
unsigned int offset, stride, i;
|
|
|
|
|
|
|
|
if (!xfb_info)
|
|
|
|
return;
|
|
|
|
|
|
|
|
offset = 0;
|
|
|
|
xfb_element = NULL;
|
|
|
|
for (i = 0; i < xfb_info->element_count; ++i)
|
|
|
|
{
|
|
|
|
const struct vkd3d_shader_transform_feedback_element *e = &xfb_info->elements[i];
|
|
|
|
|
|
|
|
if (e->stream_index == signature_element->stream_index
|
|
|
|
&& !strcasecmp(e->semantic_name, signature_element->semantic_name)
|
|
|
|
&& e->semantic_index == signature_element->semantic_index)
|
|
|
|
{
|
|
|
|
xfb_element = e;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
offset += 4 * e->component_count;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!xfb_element)
|
|
|
|
return;
|
|
|
|
|
|
|
|
if (xfb_element->component_index || xfb_element->component_count > component_count)
|
|
|
|
{
|
|
|
|
FIXME("Unhandled component range %u, %u.\n", xfb_element->component_index, xfb_element->component_count);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (xfb_element->output_slot < xfb_info->buffer_stride_count)
|
|
|
|
{
|
|
|
|
stride = xfb_info->buffer_strides[xfb_element->output_slot];
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
stride = 0;
|
|
|
|
for (i = 0; i < xfb_info->element_count; ++i)
|
|
|
|
{
|
|
|
|
const struct vkd3d_shader_transform_feedback_element *e = &xfb_info->elements[i];
|
|
|
|
|
|
|
|
if (e->stream_index == xfb_element->stream_index && e->output_slot == xfb_element->output_slot)
|
|
|
|
stride += 4 * e->component_count;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
vkd3d_spirv_build_op_decorate1(builder, id, SpvDecorationXfbBuffer, xfb_element->output_slot);
|
|
|
|
vkd3d_spirv_build_op_decorate1(builder, id, SpvDecorationXfbStride, stride);
|
|
|
|
vkd3d_spirv_build_op_decorate1(builder, id, SpvDecorationOffset, offset);
|
|
|
|
}
|
|
|
|
|
2017-06-27 04:16:47 -07:00
|
|
|
static uint32_t vkd3d_dxbc_compiler_emit_input(struct vkd3d_dxbc_compiler *compiler,
|
2017-06-20 08:09:39 -07:00
|
|
|
const struct vkd3d_shader_dst_param *dst, enum vkd3d_shader_input_sysval_semantic sysval)
|
|
|
|
{
|
2017-07-10 06:33:34 -07:00
|
|
|
unsigned int component_idx, component_count, input_component_count;
|
2017-06-20 08:09:39 -07:00
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
2017-07-25 05:23:27 -07:00
|
|
|
const struct vkd3d_shader_signature_element *signature_element;
|
|
|
|
const struct vkd3d_shader_register *reg = &dst->reg;
|
2018-06-26 05:41:49 -07:00
|
|
|
uint32_t type_id, ptr_type_id, float_type_id;
|
2017-07-18 08:32:26 -07:00
|
|
|
const struct vkd3d_spirv_builtin *builtin;
|
2017-07-10 06:33:34 -07:00
|
|
|
enum vkd3d_component_type component_type;
|
2018-06-26 05:41:47 -07:00
|
|
|
uint32_t val_id, input_id, var_id;
|
2017-06-20 08:09:39 -07:00
|
|
|
struct vkd3d_symbol reg_symbol;
|
|
|
|
SpvStorageClass storage_class;
|
2017-07-10 06:33:34 -07:00
|
|
|
struct rb_entry *entry = NULL;
|
2017-07-10 06:33:34 -07:00
|
|
|
bool use_private_var = false;
|
2018-02-04 14:58:26 -08:00
|
|
|
unsigned int array_size;
|
|
|
|
unsigned int reg_idx;
|
2018-06-26 05:41:49 -07:00
|
|
|
uint32_t i, index;
|
2018-02-04 14:58:26 -08:00
|
|
|
|
|
|
|
assert(!reg->idx[0].rel_addr);
|
|
|
|
assert(!reg->idx[1].rel_addr);
|
|
|
|
|
2018-07-18 03:05:41 -07:00
|
|
|
if (reg->idx[1].offset != ~0u)
|
2018-02-04 14:58:26 -08:00
|
|
|
{
|
|
|
|
array_size = reg->idx[0].offset;
|
|
|
|
reg_idx = reg->idx[1].offset;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
array_size = 0;
|
|
|
|
reg_idx = reg->idx[0].offset;
|
|
|
|
}
|
2017-06-20 08:09:39 -07:00
|
|
|
|
2018-10-30 07:22:52 -07:00
|
|
|
if (!(signature_element = vkd3d_find_signature_element_for_reg(compiler->input_signature,
|
|
|
|
NULL, reg_idx, dst->write_mask)))
|
|
|
|
{
|
|
|
|
FIXME("No signature element for shader input, ignoring shader input.\n");
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2018-10-11 06:33:34 -07:00
|
|
|
builtin = get_spirv_builtin_for_sysval(compiler, sysval);
|
2017-07-25 05:23:27 -07:00
|
|
|
|
2017-08-18 05:52:40 -07:00
|
|
|
component_idx = vkd3d_write_mask_get_component_idx(dst->write_mask);
|
|
|
|
component_count = vkd3d_write_mask_component_count(dst->write_mask);
|
2017-07-18 08:32:26 -07:00
|
|
|
if (builtin)
|
|
|
|
{
|
|
|
|
component_type = builtin->component_type;
|
|
|
|
input_component_count = builtin->component_count;
|
2018-10-31 07:26:47 -07:00
|
|
|
component_idx = 0;
|
2017-07-18 08:32:26 -07:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2018-10-30 07:22:52 -07:00
|
|
|
component_type = signature_element->component_type;
|
2018-10-31 07:26:48 -07:00
|
|
|
input_component_count = vkd3d_write_mask_component_count(signature_element->mask & 0xff);
|
|
|
|
component_idx = vkd3d_write_mask_get_component_idx(signature_element->mask & 0xff);
|
|
|
|
}
|
|
|
|
|
|
|
|
use_private_var = builtin && builtin->fixup_pfn;
|
|
|
|
if (input_component_count != VKD3D_VEC4_SIZE
|
|
|
|
&& vkd3d_count_signature_elements_for_reg(compiler->input_signature, reg_idx) > 1)
|
|
|
|
{
|
|
|
|
use_private_var = true;
|
|
|
|
component_count = VKD3D_VEC4_SIZE;
|
2017-07-18 08:32:26 -07:00
|
|
|
}
|
2017-06-22 04:36:18 -07:00
|
|
|
|
2017-06-20 08:09:39 -07:00
|
|
|
storage_class = SpvStorageClassInput;
|
2018-02-04 14:58:26 -08:00
|
|
|
input_id = vkd3d_dxbc_compiler_emit_array_variable(compiler, &builder->global_stream,
|
|
|
|
storage_class, component_type, input_component_count, array_size);
|
2017-06-27 04:16:47 -07:00
|
|
|
vkd3d_spirv_add_iface_variable(builder, input_id);
|
2017-07-18 08:32:26 -07:00
|
|
|
if (builtin)
|
2017-07-10 06:33:34 -07:00
|
|
|
{
|
2017-07-18 08:32:26 -07:00
|
|
|
vkd3d_dxbc_compiler_decorate_builtin(compiler, input_id, builtin->spirv_builtin);
|
2017-07-10 06:33:34 -07:00
|
|
|
}
|
2017-06-20 08:09:39 -07:00
|
|
|
else
|
2017-07-10 06:33:34 -07:00
|
|
|
{
|
2018-02-04 14:58:26 -08:00
|
|
|
vkd3d_spirv_build_op_decorate1(builder, input_id, SpvDecorationLocation, reg_idx);
|
2017-07-10 06:33:34 -07:00
|
|
|
if (component_idx)
|
|
|
|
vkd3d_spirv_build_op_decorate1(builder, input_id, SpvDecorationComponent, component_idx);
|
|
|
|
}
|
2017-06-20 08:09:39 -07:00
|
|
|
|
2017-07-25 05:23:27 -07:00
|
|
|
vkd3d_symbol_make_register(®_symbol, reg);
|
2017-07-10 06:33:34 -07:00
|
|
|
|
2017-07-10 06:33:34 -07:00
|
|
|
if (!use_private_var)
|
|
|
|
{
|
|
|
|
var_id = input_id;
|
|
|
|
}
|
|
|
|
else if (!(entry = rb_get(&compiler->symbol_table, ®_symbol)))
|
2017-06-20 08:09:39 -07:00
|
|
|
{
|
|
|
|
storage_class = SpvStorageClassPrivate;
|
2018-02-04 14:58:26 -08:00
|
|
|
var_id = vkd3d_dxbc_compiler_emit_array_variable(compiler, &builder->global_stream,
|
2018-10-31 07:26:48 -07:00
|
|
|
storage_class, VKD3D_TYPE_FLOAT, component_count, array_size);
|
2017-06-20 08:09:39 -07:00
|
|
|
}
|
2017-07-10 06:33:34 -07:00
|
|
|
if (!entry)
|
|
|
|
{
|
|
|
|
reg_symbol.id = var_id;
|
2017-08-01 01:51:45 -07:00
|
|
|
reg_symbol.info.reg.storage_class = storage_class;
|
2018-10-29 03:12:15 -07:00
|
|
|
reg_symbol.info.reg.component_type = use_private_var ? VKD3D_TYPE_FLOAT : component_type;
|
2018-10-31 07:26:48 -07:00
|
|
|
reg_symbol.info.reg.write_mask = use_private_var
|
|
|
|
? vkd3d_write_mask_from_component_count(component_count) : signature_element->mask & 0xff;
|
2019-01-25 04:23:29 -08:00
|
|
|
reg_symbol.info.reg.is_aggregate = false;
|
2017-07-10 06:33:34 -07:00
|
|
|
vkd3d_dxbc_compiler_put_symbol(compiler, ®_symbol);
|
2017-06-20 08:09:39 -07:00
|
|
|
|
2017-07-25 05:23:27 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_register_debug_name(builder, var_id, reg);
|
2017-07-10 06:33:34 -07:00
|
|
|
}
|
2017-06-20 08:09:39 -07:00
|
|
|
|
2017-07-10 06:33:34 -07:00
|
|
|
if (use_private_var)
|
|
|
|
{
|
2018-06-26 05:41:47 -07:00
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, component_type, input_component_count);
|
2018-06-26 05:41:49 -07:00
|
|
|
for (i = 0; i < max(array_size, 1); ++i)
|
|
|
|
{
|
|
|
|
struct vkd3d_shader_register dst_reg = *reg;
|
2018-10-30 07:22:48 -07:00
|
|
|
dst_reg.data_type = VKD3D_DATA_FLOAT;
|
2018-06-26 05:41:47 -07:00
|
|
|
|
2018-06-26 05:41:49 -07:00
|
|
|
val_id = input_id;
|
|
|
|
if (array_size)
|
|
|
|
{
|
|
|
|
ptr_type_id = vkd3d_spirv_get_op_type_pointer(builder, SpvStorageClassInput, type_id);
|
|
|
|
index = vkd3d_dxbc_compiler_get_constant_uint(compiler, i);
|
|
|
|
val_id = vkd3d_spirv_build_op_in_bounds_access_chain(builder,
|
|
|
|
ptr_type_id, input_id, &index, 1);
|
|
|
|
dst_reg.idx[0].offset = i;
|
|
|
|
}
|
|
|
|
val_id = vkd3d_spirv_build_op_load(builder, type_id, val_id, SpvMemoryAccessMaskNone);
|
2018-06-26 05:41:47 -07:00
|
|
|
|
2018-06-26 05:41:49 -07:00
|
|
|
if (builtin && builtin->fixup_pfn)
|
|
|
|
val_id = builtin->fixup_pfn(compiler, val_id);
|
2018-06-26 05:41:47 -07:00
|
|
|
|
2018-06-26 05:41:49 -07:00
|
|
|
if (component_type != VKD3D_TYPE_FLOAT)
|
|
|
|
{
|
|
|
|
float_type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_FLOAT, input_component_count);
|
|
|
|
val_id = vkd3d_spirv_build_op_bitcast(builder, float_type_id, val_id);
|
|
|
|
}
|
2018-06-26 05:41:47 -07:00
|
|
|
|
2018-10-31 07:26:47 -07:00
|
|
|
val_id = vkd3d_dxbc_compiler_emit_swizzle_ext(compiler, val_id,
|
|
|
|
vkd3d_write_mask_from_component_count(input_component_count) << component_idx,
|
|
|
|
VKD3D_TYPE_FLOAT, VKD3D_NO_SWIZZLE, dst->write_mask);
|
2018-06-26 05:41:49 -07:00
|
|
|
|
|
|
|
vkd3d_dxbc_compiler_emit_store_reg(compiler, &dst_reg, dst->write_mask, val_id);
|
|
|
|
}
|
2017-07-10 06:33:34 -07:00
|
|
|
}
|
2017-06-27 04:16:47 -07:00
|
|
|
|
|
|
|
return input_id;
|
2017-06-20 08:09:39 -07:00
|
|
|
}
|
|
|
|
|
2018-06-26 05:41:45 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_input_register(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_dst_param *dst)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
const struct vkd3d_shader_register *reg = &dst->reg;
|
|
|
|
const struct vkd3d_spirv_builtin *builtin;
|
|
|
|
struct vkd3d_symbol reg_symbol;
|
2019-01-24 06:09:23 -08:00
|
|
|
unsigned int array_size;
|
2018-06-26 05:41:45 -07:00
|
|
|
uint32_t input_id;
|
|
|
|
|
|
|
|
assert(!reg->idx[0].rel_addr);
|
|
|
|
assert(!reg->idx[1].rel_addr);
|
|
|
|
assert(reg->idx[1].offset == ~0u);
|
|
|
|
|
|
|
|
if (!(builtin = get_spirv_builtin_for_register(reg->type)))
|
|
|
|
{
|
|
|
|
FIXME("Unhandled register %#x.\n", reg->type);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2019-01-24 06:09:23 -08:00
|
|
|
array_size = builtin->is_spirv_array ? 1 : 0;
|
|
|
|
input_id = vkd3d_dxbc_compiler_emit_array_variable(compiler,
|
2018-06-26 05:41:45 -07:00
|
|
|
&builder->global_stream, SpvStorageClassInput,
|
2019-01-24 06:09:23 -08:00
|
|
|
builtin->component_type, builtin->component_count, array_size);
|
2018-06-26 05:41:45 -07:00
|
|
|
vkd3d_spirv_add_iface_variable(builder, input_id);
|
|
|
|
vkd3d_dxbc_compiler_decorate_builtin(compiler, input_id, builtin->spirv_builtin);
|
|
|
|
|
|
|
|
vkd3d_symbol_make_register(®_symbol, reg);
|
|
|
|
reg_symbol.id = input_id;
|
|
|
|
reg_symbol.info.reg.storage_class = SpvStorageClassInput;
|
2019-01-24 06:09:23 -08:00
|
|
|
reg_symbol.info.reg.member_idx = 0;
|
2018-06-26 05:41:45 -07:00
|
|
|
reg_symbol.info.reg.component_type = builtin->component_type;
|
|
|
|
reg_symbol.info.reg.write_mask = vkd3d_write_mask_from_component_count(builtin->component_count);
|
2019-01-25 04:23:29 -08:00
|
|
|
reg_symbol.info.reg.is_aggregate = builtin->is_spirv_array;
|
2018-06-26 05:41:45 -07:00
|
|
|
vkd3d_dxbc_compiler_put_symbol(compiler, ®_symbol);
|
|
|
|
vkd3d_dxbc_compiler_emit_register_debug_name(builder, input_id, reg);
|
|
|
|
}
|
|
|
|
|
2019-02-07 00:59:16 -08:00
|
|
|
static void vkd3d_dxbc_compiler_emit_shader_phase_input(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_phase *phase, const struct vkd3d_shader_dst_param *dst)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
const struct vkd3d_shader_register *reg = &dst->reg;
|
|
|
|
struct vkd3d_symbol reg_symbol;
|
|
|
|
uint32_t val_id;
|
|
|
|
|
|
|
|
switch (reg->type)
|
|
|
|
{
|
|
|
|
case VKD3DSPR_FORKINSTID:
|
2019-02-07 00:59:17 -08:00
|
|
|
case VKD3DSPR_JOININSTID:
|
2019-02-07 00:59:16 -08:00
|
|
|
val_id = phase->instance_id;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
FIXME("Unhandled shader phase input register %#x.\n", reg->type);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
vkd3d_symbol_make_register(®_symbol, reg);
|
|
|
|
reg_symbol.id = val_id;
|
|
|
|
reg_symbol.info.reg.storage_class = SpvStorageClassMax; /* Intermediate value */
|
|
|
|
reg_symbol.info.reg.member_idx = 0;
|
|
|
|
reg_symbol.info.reg.component_type = VKD3D_TYPE_UINT;
|
|
|
|
reg_symbol.info.reg.write_mask = VKD3DSP_WRITEMASK_0;
|
|
|
|
reg_symbol.info.reg.is_aggregate = false;
|
|
|
|
vkd3d_dxbc_compiler_put_symbol(compiler, ®_symbol);
|
|
|
|
vkd3d_dxbc_compiler_emit_register_debug_name(builder, val_id, reg);
|
|
|
|
}
|
|
|
|
|
2017-08-18 05:52:40 -07:00
|
|
|
static unsigned int vkd3d_dxbc_compiler_get_output_variable_index(
|
|
|
|
struct vkd3d_dxbc_compiler *compiler, unsigned int register_idx)
|
|
|
|
{
|
|
|
|
if (register_idx == ~0u) /* oDepth */
|
|
|
|
return ARRAY_SIZE(compiler->private_output_variable) - 1;
|
|
|
|
assert(register_idx < ARRAY_SIZE(compiler->private_output_variable) - 1);
|
|
|
|
return register_idx;
|
|
|
|
}
|
|
|
|
|
2018-10-17 08:59:31 -07:00
|
|
|
static unsigned int get_shader_output_swizzle(const struct vkd3d_dxbc_compiler *compiler,
|
2018-05-24 04:08:35 -07:00
|
|
|
unsigned int register_idx)
|
|
|
|
{
|
|
|
|
const struct vkd3d_shader_compile_arguments *compile_args;
|
|
|
|
|
|
|
|
if (!(compile_args = compiler->compile_args))
|
|
|
|
return VKD3D_NO_SWIZZLE;
|
|
|
|
if (register_idx >= compile_args->output_swizzle_count)
|
|
|
|
return VKD3D_NO_SWIZZLE;
|
|
|
|
return compile_args->output_swizzles[register_idx];
|
|
|
|
}
|
|
|
|
|
2018-12-13 01:28:36 -08:00
|
|
|
static bool is_dual_source_blending(const struct vkd3d_dxbc_compiler *compiler)
|
|
|
|
{
|
|
|
|
const struct vkd3d_shader_compile_arguments *compile_args = compiler->compile_args;
|
|
|
|
|
|
|
|
return compiler->shader_type == VKD3D_SHADER_TYPE_PIXEL
|
|
|
|
&& compile_args && compile_args->dual_source_blending;
|
|
|
|
}
|
|
|
|
|
2018-09-05 04:45:28 -07:00
|
|
|
static void calculate_clip_or_cull_distance_mask(const struct vkd3d_shader_signature_element *e,
|
|
|
|
uint32_t *mask)
|
|
|
|
{
|
|
|
|
if (e->semantic_index >= sizeof(*mask) * CHAR_BIT / VKD3D_VEC4_SIZE)
|
|
|
|
{
|
|
|
|
FIXME("Invalid semantic index %u for clip/cull distance.\n", e->semantic_index);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
*mask |= (e->mask & VKD3DSP_WRITEMASK_ALL) << (VKD3D_VEC4_SIZE * e->semantic_index);
|
|
|
|
}
|
|
|
|
|
2018-09-05 04:45:27 -07:00
|
|
|
/* Emits arrayed SPIR-V built-in variables. */
|
|
|
|
static void vkd3d_dxbc_compiler_emit_shader_signature_outputs(struct vkd3d_dxbc_compiler *compiler)
|
|
|
|
{
|
|
|
|
const struct vkd3d_shader_signature *output_signature = compiler->output_signature;
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
uint32_t clip_distance_mask = 0, clip_distance_id = 0;
|
2018-09-05 04:45:28 -07:00
|
|
|
uint32_t cull_distance_mask = 0, cull_distance_id = 0;
|
2018-09-05 04:45:27 -07:00
|
|
|
const struct vkd3d_spirv_builtin *builtin;
|
|
|
|
unsigned int i, count;
|
|
|
|
|
|
|
|
for (i = 0; i < output_signature->element_count; ++i)
|
|
|
|
{
|
|
|
|
const struct vkd3d_shader_signature_element *e = &output_signature->elements[i];
|
|
|
|
|
|
|
|
switch (e->sysval_semantic)
|
|
|
|
{
|
|
|
|
case VKD3D_SV_CLIP_DISTANCE:
|
2018-09-05 04:45:28 -07:00
|
|
|
calculate_clip_or_cull_distance_mask(e, &clip_distance_mask);
|
|
|
|
break;
|
2018-09-05 04:45:27 -07:00
|
|
|
|
2018-09-05 04:45:28 -07:00
|
|
|
case VKD3D_SV_CULL_DISTANCE:
|
|
|
|
calculate_clip_or_cull_distance_mask(e, &cull_distance_mask);
|
2018-09-05 04:45:27 -07:00
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-09-05 04:45:28 -07:00
|
|
|
if (clip_distance_mask)
|
|
|
|
{
|
|
|
|
count = vkd3d_popcount(clip_distance_mask);
|
2018-10-11 06:33:34 -07:00
|
|
|
builtin = get_spirv_builtin_for_sysval(compiler, VKD3D_SIV_CLIP_DISTANCE);
|
2018-09-05 04:45:28 -07:00
|
|
|
clip_distance_id = vkd3d_dxbc_compiler_emit_array_variable(compiler, &builder->global_stream,
|
|
|
|
SpvStorageClassOutput, builtin->component_type, builtin->component_count, count);
|
|
|
|
vkd3d_spirv_add_iface_variable(builder, clip_distance_id);
|
2018-09-05 04:45:29 -07:00
|
|
|
vkd3d_dxbc_compiler_decorate_builtin(compiler, clip_distance_id, builtin->spirv_builtin);
|
2018-09-05 04:45:28 -07:00
|
|
|
}
|
2018-09-05 04:45:27 -07:00
|
|
|
|
2018-09-05 04:45:28 -07:00
|
|
|
if (cull_distance_mask)
|
|
|
|
{
|
|
|
|
count = vkd3d_popcount(cull_distance_mask);
|
2018-10-11 06:33:34 -07:00
|
|
|
builtin = get_spirv_builtin_for_sysval(compiler, VKD3D_SIV_CULL_DISTANCE);
|
2018-09-05 04:45:28 -07:00
|
|
|
cull_distance_id = vkd3d_dxbc_compiler_emit_array_variable(compiler, &builder->global_stream,
|
|
|
|
SpvStorageClassOutput, builtin->component_type, builtin->component_count, count);
|
|
|
|
vkd3d_spirv_add_iface_variable(builder, cull_distance_id);
|
2018-09-05 04:45:29 -07:00
|
|
|
vkd3d_dxbc_compiler_decorate_builtin(compiler, cull_distance_id, builtin->spirv_builtin);
|
2018-09-05 04:45:28 -07:00
|
|
|
}
|
2018-09-05 04:45:27 -07:00
|
|
|
|
|
|
|
for (i = 0; i < output_signature->element_count; ++i)
|
|
|
|
{
|
|
|
|
const struct vkd3d_shader_signature_element *e = &output_signature->elements[i];
|
|
|
|
|
|
|
|
switch (e->sysval_semantic)
|
|
|
|
{
|
|
|
|
case VKD3D_SV_CLIP_DISTANCE:
|
|
|
|
compiler->output_info[i].id = clip_distance_id;
|
2018-09-05 04:45:29 -07:00
|
|
|
compiler->output_info[i].array_element_mask = clip_distance_mask;
|
2018-09-05 04:45:27 -07:00
|
|
|
break;
|
|
|
|
|
2018-09-05 04:45:28 -07:00
|
|
|
case VKD3D_SV_CULL_DISTANCE:
|
|
|
|
compiler->output_info[i].id = cull_distance_id;
|
2018-09-05 04:45:29 -07:00
|
|
|
compiler->output_info[i].array_element_mask = cull_distance_mask;
|
2018-09-05 04:45:28 -07:00
|
|
|
break;
|
|
|
|
|
2018-09-05 04:45:27 -07:00
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2019-01-23 03:46:50 -08:00
|
|
|
static void vkd3d_dxbc_compiler_emit_output_register(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_dst_param *dst)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
const struct vkd3d_shader_register *reg = &dst->reg;
|
|
|
|
const struct vkd3d_spirv_builtin *builtin;
|
|
|
|
struct vkd3d_symbol reg_symbol;
|
2019-01-23 03:46:51 -08:00
|
|
|
unsigned int array_size;
|
2019-01-23 03:46:50 -08:00
|
|
|
uint32_t output_id;
|
|
|
|
|
|
|
|
assert(!reg->idx[0].rel_addr);
|
|
|
|
assert(!reg->idx[1].rel_addr);
|
|
|
|
assert(reg->idx[1].offset == ~0u);
|
|
|
|
|
|
|
|
if (!(builtin = get_spirv_builtin_for_register(reg->type)))
|
|
|
|
{
|
|
|
|
FIXME("Unhandled register %#x.\n", reg->type);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2019-01-23 03:46:51 -08:00
|
|
|
array_size = builtin->is_spirv_array ? 1 : 0;
|
|
|
|
output_id = vkd3d_dxbc_compiler_emit_array_variable(compiler,
|
2019-01-23 03:46:50 -08:00
|
|
|
&builder->global_stream, SpvStorageClassOutput,
|
2019-01-23 03:46:51 -08:00
|
|
|
builtin->component_type, builtin->component_count, array_size);
|
2019-01-23 03:46:50 -08:00
|
|
|
vkd3d_spirv_add_iface_variable(builder, output_id);
|
|
|
|
vkd3d_dxbc_compiler_decorate_builtin(compiler, output_id, builtin->spirv_builtin);
|
|
|
|
|
|
|
|
vkd3d_symbol_make_register(®_symbol, reg);
|
|
|
|
reg_symbol.id = output_id;
|
|
|
|
reg_symbol.info.reg.storage_class = SpvStorageClassOutput;
|
2019-01-23 03:46:51 -08:00
|
|
|
reg_symbol.info.reg.member_idx = 0;
|
2019-01-23 03:46:50 -08:00
|
|
|
reg_symbol.info.reg.component_type = builtin->component_type;
|
|
|
|
reg_symbol.info.reg.write_mask = vkd3d_write_mask_from_component_count(builtin->component_count);
|
2019-01-25 04:23:29 -08:00
|
|
|
reg_symbol.info.reg.is_aggregate = builtin->is_spirv_array;
|
2019-01-23 03:46:50 -08:00
|
|
|
vkd3d_dxbc_compiler_put_symbol(compiler, ®_symbol);
|
|
|
|
vkd3d_dxbc_compiler_emit_register_debug_name(builder, output_id, reg);
|
|
|
|
}
|
|
|
|
|
2018-08-15 04:57:53 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_output(struct vkd3d_dxbc_compiler *compiler,
|
2017-06-20 04:34:44 -07:00
|
|
|
const struct vkd3d_shader_dst_param *dst, enum vkd3d_shader_input_sysval_semantic sysval)
|
|
|
|
{
|
2017-07-10 06:33:34 -07:00
|
|
|
unsigned int component_idx, component_count, output_component_count;
|
2017-06-20 04:34:44 -07:00
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
2017-07-10 06:33:34 -07:00
|
|
|
const struct vkd3d_shader_signature_element *signature_element;
|
2017-06-20 04:34:44 -07:00
|
|
|
const struct vkd3d_shader_register *reg = &dst->reg;
|
2017-07-18 08:32:26 -07:00
|
|
|
const struct vkd3d_spirv_builtin *builtin;
|
2017-07-10 06:33:34 -07:00
|
|
|
enum vkd3d_component_type component_type;
|
2017-06-20 04:34:44 -07:00
|
|
|
struct vkd3d_symbol reg_symbol;
|
|
|
|
SpvStorageClass storage_class;
|
2017-07-10 06:33:34 -07:00
|
|
|
struct rb_entry *entry = NULL;
|
|
|
|
unsigned int signature_idx;
|
|
|
|
bool use_private_variable;
|
|
|
|
uint32_t id, var_id;
|
2017-06-20 04:34:44 -07:00
|
|
|
|
2018-08-15 04:57:53 -07:00
|
|
|
if (!(signature_element = vkd3d_find_signature_element_for_reg(compiler->output_signature,
|
|
|
|
&signature_idx, reg->idx[0].offset, dst->write_mask)))
|
|
|
|
{
|
|
|
|
FIXME("No signature element for shader output, ignoring shader output.\n");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2018-10-11 06:33:34 -07:00
|
|
|
builtin = vkd3d_get_spirv_builtin(compiler, dst->reg.type, sysval);
|
2017-07-25 05:23:27 -07:00
|
|
|
|
2017-08-18 05:52:40 -07:00
|
|
|
component_idx = vkd3d_write_mask_get_component_idx(dst->write_mask);
|
|
|
|
component_count = vkd3d_write_mask_component_count(dst->write_mask);
|
2018-09-05 04:45:27 -07:00
|
|
|
output_component_count = vkd3d_write_mask_component_count(signature_element->mask & 0xff);
|
2017-07-25 05:23:27 -07:00
|
|
|
if (builtin)
|
|
|
|
{
|
|
|
|
component_type = builtin->component_type;
|
2018-09-05 04:45:27 -07:00
|
|
|
if (!builtin->is_spirv_array)
|
|
|
|
output_component_count = builtin->component_count;
|
2017-07-25 05:23:27 -07:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2018-08-15 04:57:53 -07:00
|
|
|
component_type = signature_element->component_type;
|
2017-07-25 05:23:27 -07:00
|
|
|
}
|
|
|
|
assert(component_count <= output_component_count);
|
|
|
|
|
2017-07-10 06:33:34 -07:00
|
|
|
storage_class = SpvStorageClassOutput;
|
2018-09-05 04:45:27 -07:00
|
|
|
|
|
|
|
if (compiler->output_info[signature_idx].id)
|
|
|
|
{
|
|
|
|
id = compiler->output_info[signature_idx].id;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
id = vkd3d_dxbc_compiler_emit_variable(compiler, &builder->global_stream,
|
|
|
|
storage_class, component_type, output_component_count);
|
|
|
|
vkd3d_spirv_add_iface_variable(builder, id);
|
|
|
|
|
2018-09-05 04:45:29 -07:00
|
|
|
if (builtin)
|
|
|
|
{
|
|
|
|
vkd3d_dxbc_compiler_decorate_builtin(compiler, id, builtin->spirv_builtin);
|
2018-10-19 07:55:49 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_register_execution_mode(compiler, &dst->reg);
|
2018-09-05 04:45:29 -07:00
|
|
|
if (component_idx)
|
|
|
|
FIXME("Unhandled component index %u.\n", component_idx);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2018-12-13 01:28:36 -08:00
|
|
|
if (is_dual_source_blending(compiler) && reg->idx[0].offset < 2)
|
|
|
|
{
|
|
|
|
vkd3d_spirv_build_op_decorate1(builder, id, SpvDecorationLocation, 0);
|
|
|
|
vkd3d_spirv_build_op_decorate1(builder, id, SpvDecorationIndex, reg->idx[0].offset);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
vkd3d_spirv_build_op_decorate1(builder, id, SpvDecorationLocation, reg->idx[0].offset);
|
|
|
|
}
|
|
|
|
|
2018-09-05 04:45:29 -07:00
|
|
|
if (component_idx)
|
|
|
|
vkd3d_spirv_build_op_decorate1(builder, id, SpvDecorationComponent, component_idx);
|
|
|
|
}
|
2019-01-14 08:05:43 -08:00
|
|
|
|
|
|
|
vkd3d_dxbc_compiler_decorate_xfb_output(compiler, id, output_component_count, signature_element);
|
2017-07-10 06:33:34 -07:00
|
|
|
}
|
2018-08-15 04:57:53 -07:00
|
|
|
|
|
|
|
compiler->output_info[signature_idx].id = id;
|
|
|
|
compiler->output_info[signature_idx].component_type = component_type;
|
2017-06-20 04:34:44 -07:00
|
|
|
|
2018-10-30 07:22:48 -07:00
|
|
|
use_private_variable = component_count != VKD3D_VEC4_SIZE
|
2018-09-05 04:45:27 -07:00
|
|
|
|| get_shader_output_swizzle(compiler, signature_element->register_index) != VKD3D_NO_SWIZZLE
|
|
|
|
|| (builtin && builtin->is_spirv_array);
|
2018-05-24 04:08:35 -07:00
|
|
|
if (use_private_variable)
|
2017-07-10 06:33:34 -07:00
|
|
|
storage_class = SpvStorageClassPrivate;
|
2017-06-20 04:34:44 -07:00
|
|
|
|
2017-07-10 06:33:34 -07:00
|
|
|
vkd3d_symbol_make_register(®_symbol, reg);
|
|
|
|
|
|
|
|
if (!use_private_variable)
|
|
|
|
var_id = id;
|
|
|
|
else if ((entry = rb_get(&compiler->symbol_table, ®_symbol)))
|
|
|
|
var_id = RB_ENTRY_VALUE(entry, const struct vkd3d_symbol, entry)->id;
|
|
|
|
else
|
|
|
|
var_id = vkd3d_dxbc_compiler_emit_variable(compiler, &builder->global_stream,
|
|
|
|
storage_class, VKD3D_TYPE_FLOAT, VKD3D_VEC4_SIZE);
|
|
|
|
if (!entry)
|
|
|
|
{
|
|
|
|
reg_symbol.id = var_id;
|
2017-08-01 01:51:45 -07:00
|
|
|
reg_symbol.info.reg.storage_class = storage_class;
|
2018-10-30 07:22:48 -07:00
|
|
|
reg_symbol.info.reg.component_type = use_private_variable ? VKD3D_TYPE_FLOAT : component_type;
|
2018-06-26 05:41:44 -07:00
|
|
|
reg_symbol.info.reg.write_mask = VKD3DSP_WRITEMASK_ALL;
|
2019-01-25 04:23:29 -08:00
|
|
|
reg_symbol.info.reg.is_aggregate = false;
|
2017-07-10 06:33:34 -07:00
|
|
|
vkd3d_dxbc_compiler_put_symbol(compiler, ®_symbol);
|
|
|
|
|
|
|
|
vkd3d_dxbc_compiler_emit_register_debug_name(builder, var_id, reg);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (use_private_variable)
|
|
|
|
{
|
2017-08-18 05:52:40 -07:00
|
|
|
unsigned int idx = vkd3d_dxbc_compiler_get_output_variable_index(compiler, reg->idx[0].offset);
|
|
|
|
compiler->private_output_variable[idx] = var_id;
|
2018-10-30 07:22:47 -07:00
|
|
|
if (!compiler->epilogue_function_id)
|
|
|
|
compiler->epilogue_function_id = vkd3d_spirv_alloc_id(builder);
|
2017-07-10 06:33:34 -07:00
|
|
|
}
|
2017-06-20 04:34:44 -07:00
|
|
|
}
|
|
|
|
|
2019-01-14 08:05:42 -08:00
|
|
|
static void vkd3d_dxbc_compiler_emit_initial_declarations(struct vkd3d_dxbc_compiler *compiler)
|
|
|
|
{
|
2019-01-14 08:05:43 -08:00
|
|
|
const struct vkd3d_shader_transform_feedback_info *xfb_info = compiler->xfb_info;
|
2019-01-14 08:05:42 -08:00
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
|
|
|
|
switch (compiler->shader_type)
|
|
|
|
{
|
|
|
|
case VKD3D_SHADER_TYPE_VERTEX:
|
|
|
|
vkd3d_spirv_set_execution_model(builder, SpvExecutionModelVertex);
|
|
|
|
break;
|
|
|
|
case VKD3D_SHADER_TYPE_HULL:
|
|
|
|
vkd3d_spirv_set_execution_model(builder, SpvExecutionModelTessellationControl);
|
|
|
|
break;
|
|
|
|
case VKD3D_SHADER_TYPE_DOMAIN:
|
|
|
|
vkd3d_spirv_set_execution_model(builder, SpvExecutionModelTessellationEvaluation);
|
|
|
|
break;
|
|
|
|
case VKD3D_SHADER_TYPE_GEOMETRY:
|
|
|
|
vkd3d_spirv_set_execution_model(builder, SpvExecutionModelGeometry);
|
|
|
|
break;
|
|
|
|
case VKD3D_SHADER_TYPE_PIXEL:
|
|
|
|
vkd3d_spirv_set_execution_model(builder, SpvExecutionModelFragment);
|
|
|
|
vkd3d_dxbc_compiler_emit_execution_mode(compiler, SpvExecutionModeOriginUpperLeft, NULL, 0);
|
|
|
|
break;
|
|
|
|
case VKD3D_SHADER_TYPE_COMPUTE:
|
|
|
|
vkd3d_spirv_set_execution_model(builder, SpvExecutionModelGLCompute);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
ERR("Invalid shader type %#x.\n", compiler->shader_type);
|
|
|
|
}
|
|
|
|
|
2019-01-14 08:05:43 -08:00
|
|
|
if (xfb_info && xfb_info->element_count)
|
|
|
|
{
|
|
|
|
vkd3d_spirv_enable_capability(builder, SpvCapabilityTransformFeedback);
|
|
|
|
vkd3d_dxbc_compiler_emit_execution_mode(compiler, SpvExecutionModeXfb, NULL, 0);
|
|
|
|
}
|
|
|
|
|
2019-02-06 03:38:09 -08:00
|
|
|
if (compiler->shader_type != VKD3D_SHADER_TYPE_HULL)
|
|
|
|
vkd3d_spirv_builder_begin_main_function(builder);
|
|
|
|
|
2019-01-14 08:05:42 -08:00
|
|
|
vkd3d_dxbc_compiler_emit_shader_signature_outputs(compiler);
|
|
|
|
}
|
|
|
|
|
2019-02-07 00:59:14 -08:00
|
|
|
static void vkd3d_dxbc_compiler_begin_shader_phase(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
struct vkd3d_shader_phase *phase)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
uint32_t void_id, function_type_id;
|
2019-02-07 00:59:15 -08:00
|
|
|
unsigned int param_count;
|
|
|
|
uint32_t param_type_id;
|
2019-02-07 00:59:14 -08:00
|
|
|
const char *name;
|
|
|
|
|
2019-02-07 00:59:15 -08:00
|
|
|
if (phase->instance_count)
|
|
|
|
{
|
|
|
|
param_type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_UINT, 1);
|
|
|
|
param_count = 1;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
param_count = 0;
|
|
|
|
}
|
|
|
|
|
2019-02-07 00:59:14 -08:00
|
|
|
phase->function_id = vkd3d_spirv_alloc_id(builder);
|
|
|
|
|
|
|
|
void_id = vkd3d_spirv_get_op_type_void(builder);
|
2019-02-07 00:59:15 -08:00
|
|
|
function_type_id = vkd3d_spirv_get_op_type_function(builder, void_id, ¶m_type_id, param_count);
|
2019-02-07 00:59:14 -08:00
|
|
|
vkd3d_spirv_build_op_function(builder, void_id, phase->function_id,
|
|
|
|
SpvFunctionControlMaskNone, function_type_id);
|
|
|
|
|
2019-02-07 00:59:15 -08:00
|
|
|
if (phase->instance_count)
|
|
|
|
phase->instance_id = vkd3d_spirv_build_op_function_parameter(builder, param_type_id);
|
|
|
|
|
|
|
|
vkd3d_spirv_build_op_label(builder, vkd3d_spirv_alloc_id(builder));
|
2019-02-07 00:59:14 -08:00
|
|
|
phase->function_location = vkd3d_spirv_stream_current_location(&builder->function_stream);
|
|
|
|
|
|
|
|
switch (phase->type)
|
|
|
|
{
|
|
|
|
case VKD3DSIH_HS_CONTROL_POINT_PHASE:
|
|
|
|
name = "control";
|
|
|
|
break;
|
|
|
|
case VKD3DSIH_HS_FORK_PHASE:
|
|
|
|
name = "fork";
|
|
|
|
break;
|
|
|
|
case VKD3DSIH_HS_JOIN_PHASE:
|
|
|
|
name = "join";
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
ERR("Invalid phase type %#x.\n", phase->type);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
vkd3d_spirv_build_op_name(builder, phase->function_id, "%s%u", name, phase->idx);
|
|
|
|
}
|
|
|
|
|
2019-02-06 03:38:11 -08:00
|
|
|
static const struct vkd3d_shader_phase *vkd3d_dxbc_compiler_get_current_shader_phase(
|
2019-02-07 00:59:14 -08:00
|
|
|
struct vkd3d_dxbc_compiler *compiler)
|
2019-02-06 03:38:11 -08:00
|
|
|
{
|
2019-02-07 00:59:14 -08:00
|
|
|
struct vkd3d_shader_phase *phase;
|
|
|
|
|
2019-02-06 03:38:11 -08:00
|
|
|
if (!compiler->shader_phase_count)
|
|
|
|
return NULL;
|
|
|
|
|
2019-02-07 00:59:14 -08:00
|
|
|
phase = &compiler->shader_phases[compiler->shader_phase_count - 1];
|
|
|
|
if (!phase->function_id)
|
|
|
|
vkd3d_dxbc_compiler_begin_shader_phase(compiler, phase);
|
|
|
|
return phase;
|
2019-02-06 03:38:11 -08:00
|
|
|
}
|
|
|
|
|
2019-02-07 00:59:14 -08:00
|
|
|
static size_t vkd3d_dxbc_compiler_get_current_function_location(struct vkd3d_dxbc_compiler *compiler)
|
2019-02-06 03:38:11 -08:00
|
|
|
{
|
|
|
|
const struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
const struct vkd3d_shader_phase *phase;
|
|
|
|
|
|
|
|
if ((phase = vkd3d_dxbc_compiler_get_current_shader_phase(compiler)))
|
|
|
|
return phase->function_location;
|
|
|
|
|
|
|
|
return builder->main_function_location;
|
|
|
|
}
|
|
|
|
|
2017-07-21 05:14:42 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_dcl_global_flags(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
2018-10-18 05:59:47 -07:00
|
|
|
unsigned int flags = instruction->flags;
|
|
|
|
|
|
|
|
if (flags & VKD3DSGF_FORCE_EARLY_DEPTH_STENCIL)
|
|
|
|
{
|
|
|
|
vkd3d_dxbc_compiler_emit_execution_mode(compiler, SpvExecutionModeEarlyFragmentTests, NULL, 0);
|
|
|
|
flags &= ~VKD3DSGF_FORCE_EARLY_DEPTH_STENCIL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (flags & ~(VKD3DSGF_REFACTORING_ALLOWED | VKD3DSGF_ENABLE_RAW_AND_STRUCTURED_BUFFERS))
|
|
|
|
FIXME("Unhandled global flags %#x.\n", flags);
|
2017-07-21 05:14:42 -07:00
|
|
|
else
|
2018-10-18 05:59:47 -07:00
|
|
|
WARN("Unhandled global flags %#x.\n", flags);
|
2017-07-21 05:14:42 -07:00
|
|
|
}
|
|
|
|
|
2017-06-20 04:34:44 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_dcl_temps(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
2019-02-06 03:38:11 -08:00
|
|
|
size_t function_location;
|
2017-06-20 04:34:44 -07:00
|
|
|
unsigned int i;
|
2017-07-11 08:23:02 -07:00
|
|
|
uint32_t id;
|
2017-06-20 04:34:44 -07:00
|
|
|
|
2019-02-06 03:38:11 -08:00
|
|
|
function_location = vkd3d_dxbc_compiler_get_current_function_location(compiler);
|
|
|
|
vkd3d_spirv_begin_function_stream_insertion(builder, function_location);
|
2017-10-25 00:58:14 -07:00
|
|
|
|
2017-06-20 04:34:44 -07:00
|
|
|
compiler->temp_count = instruction->declaration.count;
|
|
|
|
for (i = 0; i < compiler->temp_count; ++i)
|
|
|
|
{
|
2017-07-11 08:23:02 -07:00
|
|
|
id = vkd3d_dxbc_compiler_emit_variable(compiler, &builder->function_stream,
|
|
|
|
SpvStorageClassFunction, VKD3D_TYPE_FLOAT, VKD3D_VEC4_SIZE);
|
2017-06-20 04:34:44 -07:00
|
|
|
if (!i)
|
|
|
|
compiler->temp_id = id;
|
|
|
|
assert(id == compiler->temp_id + i);
|
|
|
|
|
2017-06-26 08:03:31 -07:00
|
|
|
vkd3d_spirv_build_op_name(builder, id, "r%u", i);
|
2017-06-20 04:34:44 -07:00
|
|
|
}
|
2017-10-25 00:58:14 -07:00
|
|
|
|
|
|
|
vkd3d_spirv_end_function_stream_insertion(builder);
|
2017-06-20 04:34:44 -07:00
|
|
|
}
|
|
|
|
|
2018-08-01 06:34:39 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_dcl_indexable_temp(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
const struct vkd3d_shader_indexable_temp *temp = &instruction->declaration.indexable_temp;
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
struct vkd3d_shader_register reg;
|
|
|
|
struct vkd3d_symbol reg_symbol;
|
2019-02-06 03:38:11 -08:00
|
|
|
size_t function_location;
|
2018-08-01 06:34:39 -07:00
|
|
|
uint32_t id;
|
|
|
|
|
|
|
|
if (temp->component_count != 4)
|
|
|
|
FIXME("Unhandled component count %u.\n", temp->component_count);
|
|
|
|
|
|
|
|
memset(®, 0, sizeof(reg));
|
|
|
|
reg.type = VKD3DSPR_IDXTEMP;
|
|
|
|
reg.idx[0].offset = temp->register_idx;
|
|
|
|
reg.idx[1].offset = ~0u;
|
|
|
|
|
2019-02-06 03:38:11 -08:00
|
|
|
function_location = vkd3d_dxbc_compiler_get_current_function_location(compiler);
|
|
|
|
vkd3d_spirv_begin_function_stream_insertion(builder, function_location);
|
2018-08-01 06:34:39 -07:00
|
|
|
|
|
|
|
id = vkd3d_dxbc_compiler_emit_array_variable(compiler, &builder->function_stream,
|
|
|
|
SpvStorageClassFunction, VKD3D_TYPE_FLOAT, VKD3D_VEC4_SIZE, temp->register_size);
|
|
|
|
|
|
|
|
vkd3d_dxbc_compiler_emit_register_debug_name(builder, id, ®);
|
|
|
|
|
|
|
|
vkd3d_spirv_end_function_stream_insertion(builder);
|
|
|
|
|
|
|
|
vkd3d_symbol_make_register(®_symbol, ®);
|
|
|
|
reg_symbol.id = id;
|
|
|
|
reg_symbol.info.reg.storage_class = SpvStorageClassFunction;
|
|
|
|
reg_symbol.info.reg.component_type = VKD3D_TYPE_FLOAT;
|
|
|
|
reg_symbol.info.reg.write_mask = VKD3DSP_WRITEMASK_ALL;
|
2019-01-25 04:23:29 -08:00
|
|
|
reg_symbol.info.reg.is_aggregate = false;
|
2018-08-01 06:34:39 -07:00
|
|
|
vkd3d_dxbc_compiler_put_symbol(compiler, ®_symbol);
|
|
|
|
}
|
|
|
|
|
2017-09-07 08:15:54 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_push_constant_buffers(struct vkd3d_dxbc_compiler *compiler)
|
2017-07-27 06:16:49 -07:00
|
|
|
{
|
|
|
|
const SpvStorageClass storage_class = SpvStorageClassPushConstant;
|
|
|
|
uint32_t vec4_id, length_id, struct_id, pointer_type_id, var_id;
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
unsigned int i, j, count, reg_idx, cb_size;
|
|
|
|
struct vkd3d_symbol reg_symbol;
|
|
|
|
uint32_t *member_ids;
|
|
|
|
|
|
|
|
count = 0;
|
2017-09-07 08:15:54 -07:00
|
|
|
for (i = 0; i < compiler->shader_interface.push_constant_buffer_count; ++i)
|
2017-07-27 06:16:49 -07:00
|
|
|
{
|
2017-09-07 08:15:54 -07:00
|
|
|
const struct vkd3d_push_constant_buffer_binding *cb = &compiler->push_constants[i];
|
2017-07-27 06:16:49 -07:00
|
|
|
|
|
|
|
if (cb->reg.type)
|
|
|
|
++count;
|
|
|
|
}
|
|
|
|
if (!count)
|
|
|
|
return;
|
|
|
|
|
|
|
|
if (!(member_ids = vkd3d_calloc(count, sizeof(*member_ids))))
|
|
|
|
return;
|
|
|
|
|
|
|
|
vec4_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_FLOAT, VKD3D_VEC4_SIZE);
|
|
|
|
|
2017-09-07 08:15:54 -07:00
|
|
|
for (i = 0, j = 0; i < compiler->shader_interface.push_constant_buffer_count; ++i)
|
2017-07-27 06:16:49 -07:00
|
|
|
{
|
2017-09-07 08:15:54 -07:00
|
|
|
const struct vkd3d_push_constant_buffer_binding *cb = &compiler->push_constants[i];
|
2017-07-27 06:16:49 -07:00
|
|
|
if (!cb->reg.type)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
cb_size = cb->reg.idx[1].offset;
|
|
|
|
length_id = vkd3d_dxbc_compiler_get_constant_uint(compiler, cb_size);
|
|
|
|
member_ids[j] = vkd3d_spirv_build_op_type_array(builder, vec4_id, length_id);
|
|
|
|
vkd3d_spirv_build_op_decorate1(builder, member_ids[j], SpvDecorationArrayStride, 16);
|
|
|
|
|
|
|
|
++j;
|
|
|
|
}
|
|
|
|
|
|
|
|
struct_id = vkd3d_spirv_build_op_type_struct(builder, member_ids, count);
|
|
|
|
vkd3d_spirv_build_op_decorate(builder, struct_id, SpvDecorationBlock, NULL, 0);
|
|
|
|
vkd3d_spirv_build_op_name(builder, struct_id, "push_cb");
|
|
|
|
vkd3d_free(member_ids);
|
|
|
|
|
|
|
|
pointer_type_id = vkd3d_spirv_get_op_type_pointer(builder, storage_class, struct_id);
|
|
|
|
var_id = vkd3d_spirv_build_op_variable(builder, &builder->global_stream,
|
|
|
|
pointer_type_id, storage_class, 0);
|
|
|
|
|
2017-09-07 08:15:54 -07:00
|
|
|
for (i = 0, j = 0; i < compiler->shader_interface.push_constant_buffer_count; ++i)
|
2017-07-27 06:16:49 -07:00
|
|
|
{
|
2017-09-07 08:15:54 -07:00
|
|
|
const struct vkd3d_push_constant_buffer_binding *cb = &compiler->push_constants[i];
|
2017-07-27 06:16:49 -07:00
|
|
|
if (!cb->reg.type)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
reg_idx = cb->reg.idx[0].offset;
|
|
|
|
vkd3d_spirv_build_op_member_decorate1(builder, struct_id, j,
|
2017-08-01 01:51:45 -07:00
|
|
|
SpvDecorationOffset, cb->pc.offset);
|
2017-07-27 06:16:49 -07:00
|
|
|
vkd3d_spirv_build_op_member_name(builder, struct_id, j, "cb%u", reg_idx);
|
|
|
|
|
|
|
|
vkd3d_symbol_make_register(®_symbol, &cb->reg);
|
|
|
|
reg_symbol.id = var_id;
|
2017-08-01 01:51:45 -07:00
|
|
|
reg_symbol.info.reg.storage_class = storage_class;
|
|
|
|
reg_symbol.info.reg.member_idx = j;
|
2018-06-26 05:41:44 -07:00
|
|
|
reg_symbol.info.reg.component_type = VKD3D_TYPE_FLOAT;
|
|
|
|
reg_symbol.info.reg.write_mask = VKD3DSP_WRITEMASK_ALL;
|
2019-01-25 04:23:29 -08:00
|
|
|
reg_symbol.info.reg.is_aggregate = false;
|
2017-07-27 06:16:49 -07:00
|
|
|
vkd3d_dxbc_compiler_put_symbol(compiler, ®_symbol);
|
|
|
|
|
|
|
|
++j;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2017-06-20 08:09:39 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_dcl_constant_buffer(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
uint32_t vec4_id, array_type_id, length_id, struct_id, pointer_type_id, var_id;
|
2017-07-26 04:45:25 -07:00
|
|
|
const struct vkd3d_shader_register *reg = &instruction->declaration.src.reg;
|
2017-06-20 08:09:39 -07:00
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
2017-07-27 06:16:49 -07:00
|
|
|
const SpvStorageClass storage_class = SpvStorageClassUniform;
|
2017-09-07 08:15:54 -07:00
|
|
|
struct vkd3d_push_constant_buffer_binding *push_cb;
|
2017-06-20 08:09:39 -07:00
|
|
|
struct vkd3d_symbol reg_symbol;
|
2017-07-26 04:45:25 -07:00
|
|
|
unsigned int cb_size;
|
2017-06-20 08:09:39 -07:00
|
|
|
|
|
|
|
assert(!(instruction->flags & ~VKD3DSI_INDEXED_DYNAMIC));
|
|
|
|
|
|
|
|
if (instruction->flags & VKD3DSI_INDEXED_DYNAMIC)
|
|
|
|
vkd3d_spirv_enable_capability(builder, SpvCapabilityUniformBufferArrayDynamicIndexing);
|
|
|
|
|
2017-07-26 04:45:25 -07:00
|
|
|
cb_size = reg->idx[1].offset;
|
2017-06-20 08:09:39 -07:00
|
|
|
|
2017-09-07 08:15:54 -07:00
|
|
|
if ((push_cb = vkd3d_dxbc_compiler_find_push_constant_buffer(compiler, reg)))
|
2017-07-27 06:16:49 -07:00
|
|
|
{
|
2017-09-07 08:15:54 -07:00
|
|
|
/* Push constant buffers are handled in
|
|
|
|
* vkd3d_dxbc_compiler_emit_push_constant_buffers().
|
|
|
|
*/
|
2017-09-07 08:48:43 -07:00
|
|
|
unsigned int cb_size_in_bytes = cb_size * VKD3D_VEC4_SIZE * sizeof(uint32_t);
|
2017-07-27 06:16:49 -07:00
|
|
|
push_cb->reg = *reg;
|
2017-09-07 08:48:43 -07:00
|
|
|
if (cb_size_in_bytes > push_cb->pc.size)
|
2017-08-17 03:13:50 -07:00
|
|
|
WARN("Constant buffer size %u exceeds push constant size %u.\n",
|
2017-09-07 08:48:43 -07:00
|
|
|
cb_size_in_bytes, push_cb->pc.size);
|
2017-07-27 06:16:49 -07:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2017-06-20 08:09:39 -07:00
|
|
|
vec4_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_FLOAT, VKD3D_VEC4_SIZE);
|
|
|
|
length_id = vkd3d_dxbc_compiler_get_constant_uint(compiler, cb_size);
|
|
|
|
array_type_id = vkd3d_spirv_build_op_type_array(builder, vec4_id, length_id);
|
|
|
|
vkd3d_spirv_build_op_decorate1(builder, array_type_id, SpvDecorationArrayStride, 16);
|
|
|
|
|
|
|
|
struct_id = vkd3d_spirv_build_op_type_struct(builder, &array_type_id, 1);
|
|
|
|
vkd3d_spirv_build_op_decorate(builder, struct_id, SpvDecorationBlock, NULL, 0);
|
2017-06-23 13:24:33 -07:00
|
|
|
vkd3d_spirv_build_op_member_decorate1(builder, struct_id, 0, SpvDecorationOffset, 0);
|
2017-06-26 08:03:31 -07:00
|
|
|
vkd3d_spirv_build_op_name(builder, struct_id, "cb%u_struct", cb_size);
|
2017-06-20 08:09:39 -07:00
|
|
|
|
2017-07-27 06:16:49 -07:00
|
|
|
pointer_type_id = vkd3d_spirv_get_op_type_pointer(builder, storage_class, struct_id);
|
2017-06-20 08:09:39 -07:00
|
|
|
var_id = vkd3d_spirv_build_op_variable(builder, &builder->global_stream,
|
2017-07-27 06:16:49 -07:00
|
|
|
pointer_type_id, storage_class, 0);
|
2017-06-20 08:09:39 -07:00
|
|
|
|
2018-10-21 16:49:13 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_descriptor_binding_for_reg(compiler,
|
2017-09-07 08:15:54 -07:00
|
|
|
var_id, reg, VKD3D_SHADER_RESOURCE_BUFFER, false);
|
2017-06-20 08:09:39 -07:00
|
|
|
|
2017-07-26 04:45:25 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_register_debug_name(builder, var_id, reg);
|
2017-06-20 08:09:39 -07:00
|
|
|
|
2017-07-26 04:45:25 -07:00
|
|
|
vkd3d_symbol_make_register(®_symbol, reg);
|
2017-06-20 08:09:39 -07:00
|
|
|
reg_symbol.id = var_id;
|
2017-08-01 01:51:45 -07:00
|
|
|
reg_symbol.info.reg.storage_class = storage_class;
|
|
|
|
reg_symbol.info.reg.member_idx = 0;
|
2018-06-26 05:41:44 -07:00
|
|
|
reg_symbol.info.reg.component_type = VKD3D_TYPE_FLOAT;
|
|
|
|
reg_symbol.info.reg.write_mask = VKD3DSP_WRITEMASK_ALL;
|
2019-01-25 04:23:29 -08:00
|
|
|
reg_symbol.info.reg.is_aggregate = false;
|
2017-06-20 08:09:39 -07:00
|
|
|
vkd3d_dxbc_compiler_put_symbol(compiler, ®_symbol);
|
|
|
|
}
|
|
|
|
|
2017-07-11 08:23:02 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_dcl_immediate_constant_buffer(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
const struct vkd3d_shader_immediate_constant_buffer *icb = instruction->declaration.icb;
|
|
|
|
uint32_t *elements, length_id, type_id, const_id, ptr_type_id, icb_id;
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
struct vkd3d_shader_register reg;
|
|
|
|
struct vkd3d_symbol reg_symbol;
|
|
|
|
unsigned int i;
|
|
|
|
|
|
|
|
if (!(elements = vkd3d_calloc(icb->vec4_count, sizeof(*elements))))
|
|
|
|
return;
|
|
|
|
for (i = 0; i < icb->vec4_count; ++i)
|
|
|
|
elements[i] = vkd3d_dxbc_compiler_get_constant(compiler,
|
|
|
|
VKD3D_TYPE_FLOAT, VKD3D_VEC4_SIZE, &icb->data[4 * i]);
|
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_FLOAT, VKD3D_VEC4_SIZE);
|
|
|
|
length_id = vkd3d_dxbc_compiler_get_constant_uint(compiler, icb->vec4_count);
|
|
|
|
type_id = vkd3d_spirv_build_op_type_array(builder, type_id, length_id);
|
|
|
|
const_id = vkd3d_spirv_build_op_constant_composite(builder, type_id, elements, icb->vec4_count);
|
2017-07-17 09:12:02 -07:00
|
|
|
ptr_type_id = vkd3d_spirv_get_op_type_pointer(builder, SpvStorageClassPrivate, type_id);
|
2017-07-11 08:23:02 -07:00
|
|
|
icb_id = vkd3d_spirv_build_op_variable(builder, &builder->global_stream,
|
|
|
|
ptr_type_id, SpvStorageClassPrivate, const_id);
|
|
|
|
vkd3d_spirv_build_op_name(builder, icb_id, "icb");
|
|
|
|
vkd3d_free(elements);
|
|
|
|
|
|
|
|
memset(®, 0, sizeof(reg));
|
|
|
|
reg.type = VKD3DSPR_IMMCONSTBUFFER;
|
|
|
|
vkd3d_symbol_make_register(®_symbol, ®);
|
|
|
|
reg_symbol.id = icb_id;
|
2017-08-01 01:51:45 -07:00
|
|
|
reg_symbol.info.reg.storage_class = SpvStorageClassPrivate;
|
2018-06-26 05:41:44 -07:00
|
|
|
reg_symbol.info.reg.component_type = VKD3D_TYPE_FLOAT;
|
|
|
|
reg_symbol.info.reg.write_mask = VKD3DSP_WRITEMASK_ALL;
|
2019-01-25 04:23:29 -08:00
|
|
|
reg_symbol.info.reg.is_aggregate = false;
|
2017-07-11 08:23:02 -07:00
|
|
|
vkd3d_dxbc_compiler_put_symbol(compiler, ®_symbol);
|
|
|
|
}
|
|
|
|
|
2017-07-14 04:44:35 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_dcl_sampler(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
const struct vkd3d_shader_register *reg = &instruction->declaration.dst.reg;
|
|
|
|
const SpvStorageClass storage_class = SpvStorageClassUniformConstant;
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
uint32_t type_id, ptr_type_id, var_id;
|
|
|
|
struct vkd3d_symbol reg_symbol;
|
|
|
|
|
2018-10-21 16:49:16 -07:00
|
|
|
if (vkd3d_dxbc_compiler_have_combined_sampler(compiler, NULL, reg))
|
|
|
|
return;
|
|
|
|
|
2017-07-17 09:12:02 -07:00
|
|
|
type_id = vkd3d_spirv_get_op_type_sampler(builder);
|
2017-07-17 09:12:02 -07:00
|
|
|
ptr_type_id = vkd3d_spirv_get_op_type_pointer(builder, storage_class, type_id);
|
2017-07-14 04:44:35 -07:00
|
|
|
var_id = vkd3d_spirv_build_op_variable(builder, &builder->global_stream,
|
|
|
|
ptr_type_id, storage_class, 0);
|
|
|
|
|
2018-10-21 16:49:13 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_descriptor_binding_for_reg(compiler,
|
2017-09-07 08:15:54 -07:00
|
|
|
var_id, reg, VKD3D_SHADER_RESOURCE_NONE, false);
|
2017-07-14 04:44:35 -07:00
|
|
|
|
|
|
|
vkd3d_dxbc_compiler_emit_register_debug_name(builder, var_id, reg);
|
|
|
|
|
|
|
|
vkd3d_symbol_make_register(®_symbol, reg);
|
|
|
|
reg_symbol.id = var_id;
|
2017-08-01 01:51:45 -07:00
|
|
|
reg_symbol.info.reg.storage_class = storage_class;
|
2019-01-25 04:23:29 -08:00
|
|
|
reg_symbol.info.reg.is_aggregate = false;
|
2017-07-14 04:44:35 -07:00
|
|
|
vkd3d_dxbc_compiler_put_symbol(compiler, ®_symbol);
|
|
|
|
}
|
|
|
|
|
2018-05-24 04:08:37 -07:00
|
|
|
static uint32_t vkd3d_dxbc_compiler_get_dummy_sampler_id(struct vkd3d_dxbc_compiler *compiler)
|
2017-08-16 04:11:52 -07:00
|
|
|
{
|
2019-01-16 03:44:59 -08:00
|
|
|
const struct vkd3d_shader_interface_info *shader_interface = &compiler->shader_interface;
|
2017-08-16 04:11:52 -07:00
|
|
|
const SpvStorageClass storage_class = SpvStorageClassUniformConstant;
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
uint32_t type_id, ptr_type_id, var_id;
|
|
|
|
|
2018-05-24 04:08:37 -07:00
|
|
|
if (compiler->dummy_sampler_id)
|
|
|
|
return compiler->dummy_sampler_id;
|
2017-08-16 04:11:52 -07:00
|
|
|
|
|
|
|
type_id = vkd3d_spirv_get_op_type_sampler(builder);
|
|
|
|
ptr_type_id = vkd3d_spirv_get_op_type_pointer(builder, storage_class, type_id);
|
|
|
|
var_id = vkd3d_spirv_build_op_variable(builder, &builder->global_stream,
|
|
|
|
ptr_type_id, storage_class, 0);
|
|
|
|
|
|
|
|
vkd3d_spirv_build_op_decorate1(builder, var_id,
|
2018-05-24 04:08:37 -07:00
|
|
|
SpvDecorationDescriptorSet, shader_interface->dummy_sampler.set);
|
2017-08-16 04:11:52 -07:00
|
|
|
vkd3d_spirv_build_op_decorate1(builder, var_id,
|
2018-05-24 04:08:37 -07:00
|
|
|
SpvDecorationBinding, shader_interface->dummy_sampler.binding);
|
2017-08-16 04:11:52 -07:00
|
|
|
|
2018-05-24 04:08:37 -07:00
|
|
|
vkd3d_spirv_build_op_name(builder, var_id, "dummy_sampler");
|
2017-08-16 04:11:52 -07:00
|
|
|
|
2018-05-24 04:08:37 -07:00
|
|
|
compiler->dummy_sampler_id = var_id;
|
|
|
|
return compiler->dummy_sampler_id;
|
2017-08-16 04:11:52 -07:00
|
|
|
}
|
|
|
|
|
2017-07-24 10:43:50 -07:00
|
|
|
static const struct vkd3d_spirv_resource_type *vkd3d_dxbc_compiler_enable_resource_type(
|
|
|
|
struct vkd3d_dxbc_compiler *compiler, enum vkd3d_shader_resource_type resource_type, bool is_uav)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
const struct vkd3d_spirv_resource_type *resource_type_info;
|
|
|
|
|
|
|
|
if (!(resource_type_info = vkd3d_get_spirv_resource_type(resource_type)))
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
if (resource_type_info->capability)
|
|
|
|
vkd3d_spirv_enable_capability(builder, resource_type_info->capability);
|
|
|
|
if (is_uav && resource_type_info->uav_capability)
|
|
|
|
vkd3d_spirv_enable_capability(builder, resource_type_info->uav_capability);
|
|
|
|
|
|
|
|
return resource_type_info;
|
2017-07-17 07:25:29 -07:00
|
|
|
}
|
|
|
|
|
2017-08-21 03:41:07 -07:00
|
|
|
static SpvImageFormat image_format_for_image_read(enum vkd3d_component_type data_type)
|
|
|
|
{
|
|
|
|
/* The following formats are supported by Direct3D 11 hardware for UAV
|
|
|
|
* typed loads. A newer hardware may support more formats for UAV typed
|
|
|
|
* loads (see StorageImageReadWithoutFormat SPIR-V capability).
|
|
|
|
*/
|
|
|
|
switch (data_type)
|
|
|
|
{
|
|
|
|
case VKD3D_TYPE_FLOAT:
|
|
|
|
return SpvImageFormatR32f;
|
|
|
|
case VKD3D_TYPE_INT:
|
|
|
|
return SpvImageFormatR32i;
|
|
|
|
case VKD3D_TYPE_UINT:
|
|
|
|
return SpvImageFormatR32ui;
|
|
|
|
default:
|
|
|
|
FIXME("Unhandled type %#x.\n", data_type);
|
|
|
|
return SpvImageFormatUnknown;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2017-08-16 08:38:33 -07:00
|
|
|
static uint32_t vkd3d_dxbc_compiler_get_image_type_id(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_register *reg, const struct vkd3d_spirv_resource_type *resource_type_info,
|
2017-09-07 08:48:43 -07:00
|
|
|
enum vkd3d_component_type data_type, bool raw_structured, uint32_t depth)
|
2017-08-16 08:38:33 -07:00
|
|
|
{
|
2017-08-21 03:41:07 -07:00
|
|
|
const struct vkd3d_shader_scan_info *scan_info = compiler->scan_info;
|
2017-08-16 08:38:33 -07:00
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
uint32_t sampled_type_id;
|
2017-08-21 03:41:07 -07:00
|
|
|
SpvImageFormat format;
|
|
|
|
|
|
|
|
format = SpvImageFormatUnknown;
|
2017-09-07 08:48:43 -07:00
|
|
|
if (reg->type == VKD3DSPR_UAV
|
|
|
|
&& (raw_structured || (scan_info->uav_read_mask & (1u << reg->idx[0].offset))))
|
2017-08-21 03:41:07 -07:00
|
|
|
format = image_format_for_image_read(data_type);
|
2017-08-16 08:38:33 -07:00
|
|
|
|
|
|
|
sampled_type_id = vkd3d_spirv_get_type_id(builder, data_type, 1);
|
|
|
|
return vkd3d_spirv_get_op_type_image(builder, sampled_type_id, resource_type_info->dim,
|
|
|
|
depth, resource_type_info->arrayed, resource_type_info->ms,
|
2017-08-21 03:41:07 -07:00
|
|
|
reg->type == VKD3DSPR_UAV ? 2 : 1, format);
|
2017-08-16 08:38:33 -07:00
|
|
|
}
|
|
|
|
|
2018-10-21 16:49:16 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_combined_sampler_declarations(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_register *resource, enum vkd3d_shader_resource_type resource_type,
|
|
|
|
enum vkd3d_component_type sampled_type, unsigned int structure_stride, bool raw,
|
|
|
|
const struct vkd3d_spirv_resource_type *resource_type_info)
|
|
|
|
{
|
2019-01-16 03:44:59 -08:00
|
|
|
const struct vkd3d_shader_interface_info *shader_interface = &compiler->shader_interface;
|
2018-10-21 16:49:16 -07:00
|
|
|
const struct vkd3d_shader_scan_info *scan_info = compiler->scan_info;
|
|
|
|
const SpvStorageClass storage_class = SpvStorageClassUniformConstant;
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
const struct vkd3d_shader_combined_resource_sampler *current;
|
|
|
|
const unsigned int resource_index = resource->idx[0].offset;
|
|
|
|
uint32_t image_type_id, type_id, ptr_type_id, var_id;
|
2018-10-29 03:12:16 -07:00
|
|
|
enum vkd3d_shader_binding_flag resource_type_flag;
|
2018-10-21 16:49:16 -07:00
|
|
|
struct vkd3d_symbol symbol;
|
|
|
|
unsigned int i;
|
2018-10-29 03:12:16 -07:00
|
|
|
bool depth;
|
2018-10-21 16:49:16 -07:00
|
|
|
|
2018-10-29 03:12:16 -07:00
|
|
|
resource_type_flag = resource_type == VKD3D_SHADER_RESOURCE_BUFFER
|
|
|
|
? VKD3D_SHADER_BINDING_FLAG_BUFFER : VKD3D_SHADER_BINDING_FLAG_IMAGE;
|
2018-10-21 16:49:16 -07:00
|
|
|
|
|
|
|
for (i = 0; i < shader_interface->combined_sampler_count; ++i)
|
|
|
|
{
|
|
|
|
current = &shader_interface->combined_samplers[i];
|
|
|
|
|
2018-10-29 03:12:16 -07:00
|
|
|
if (current->resource_index != resource_index)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
if (!(current->flags & resource_type_flag))
|
2018-10-21 16:49:16 -07:00
|
|
|
continue;
|
|
|
|
|
|
|
|
if (!vkd3d_dxbc_compiler_check_shader_visibility(compiler, current->shader_visibility))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
depth = current->sampler_index != VKD3D_DUMMY_SAMPLER_INDEX
|
|
|
|
&& scan_info->sampler_comparison_mode_mask & (1u << current->sampler_index);
|
|
|
|
|
|
|
|
image_type_id = vkd3d_dxbc_compiler_get_image_type_id(compiler,
|
|
|
|
resource, resource_type_info, sampled_type, structure_stride || raw, depth);
|
|
|
|
type_id = vkd3d_spirv_get_op_type_sampled_image(builder, image_type_id);
|
|
|
|
|
|
|
|
ptr_type_id = vkd3d_spirv_get_op_type_pointer(builder, storage_class, type_id);
|
|
|
|
var_id = vkd3d_spirv_build_op_variable(builder, &builder->global_stream,
|
|
|
|
ptr_type_id, storage_class, 0);
|
|
|
|
|
|
|
|
vkd3d_dxbc_compiler_emit_descriptor_binding(compiler, var_id, ¤t->binding);
|
|
|
|
|
|
|
|
if (current->sampler_index == VKD3D_DUMMY_SAMPLER_INDEX)
|
|
|
|
vkd3d_spirv_build_op_name(builder, var_id, "t%u_dummy_sampler", resource_index);
|
|
|
|
else
|
|
|
|
vkd3d_spirv_build_op_name(builder, var_id, "t%u_s%u", resource_index, current->sampler_index);
|
|
|
|
|
|
|
|
vkd3d_symbol_make_combined_sampler(&symbol, resource_index, current->sampler_index);
|
|
|
|
symbol.id = var_id;
|
|
|
|
symbol.info.resource.sampled_type = sampled_type;
|
|
|
|
symbol.info.resource.type_id = image_type_id;
|
|
|
|
symbol.info.resource.resource_type_info = resource_type_info;
|
|
|
|
symbol.info.resource.structure_stride = structure_stride;
|
|
|
|
symbol.info.resource.raw = raw;
|
|
|
|
symbol.info.resource.uav_counter_id = 0;
|
|
|
|
vkd3d_dxbc_compiler_put_symbol(compiler, &symbol);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2017-07-24 10:43:50 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_resource_declaration(struct vkd3d_dxbc_compiler *compiler,
|
2017-08-11 04:58:04 -07:00
|
|
|
const struct vkd3d_shader_register *reg, enum vkd3d_shader_resource_type resource_type,
|
2017-08-24 06:13:38 -07:00
|
|
|
enum vkd3d_data_type resource_data_type, unsigned int structure_stride, bool raw)
|
2017-07-17 07:25:29 -07:00
|
|
|
{
|
2018-10-17 08:59:36 -07:00
|
|
|
uint32_t counter_type_id, type_id, ptr_type_id, var_id, counter_var_id = 0;
|
2017-09-07 08:15:54 -07:00
|
|
|
const struct vkd3d_shader_scan_info *scan_info = compiler->scan_info;
|
2017-07-17 07:25:29 -07:00
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
2018-10-17 08:59:36 -07:00
|
|
|
SpvStorageClass storage_class = SpvStorageClassUniformConstant;
|
2017-07-24 10:43:50 -07:00
|
|
|
const struct vkd3d_spirv_resource_type *resource_type_info;
|
2017-07-17 07:25:29 -07:00
|
|
|
enum vkd3d_component_type sampled_type;
|
2017-07-17 07:25:29 -07:00
|
|
|
struct vkd3d_symbol resource_symbol;
|
2017-07-26 04:45:25 -07:00
|
|
|
bool is_uav;
|
2017-07-24 10:43:50 -07:00
|
|
|
|
2017-07-26 04:45:25 -07:00
|
|
|
is_uav = reg->type == VKD3DSPR_UAV;
|
2017-07-24 10:43:50 -07:00
|
|
|
if (!(resource_type_info = vkd3d_dxbc_compiler_enable_resource_type(compiler,
|
2017-08-11 04:58:04 -07:00
|
|
|
resource_type, is_uav)))
|
2017-07-24 10:43:50 -07:00
|
|
|
{
|
2017-09-07 08:48:43 -07:00
|
|
|
FIXME("Unrecognized resource type.\n");
|
2017-07-24 10:43:50 -07:00
|
|
|
return;
|
|
|
|
}
|
2017-07-17 07:25:29 -07:00
|
|
|
|
2017-08-11 04:58:04 -07:00
|
|
|
sampled_type = vkd3d_component_type_from_data_type(resource_data_type);
|
2017-07-17 07:25:29 -07:00
|
|
|
|
2018-10-21 16:49:16 -07:00
|
|
|
if (vkd3d_dxbc_compiler_have_combined_sampler(compiler, reg, NULL))
|
|
|
|
{
|
|
|
|
vkd3d_dxbc_compiler_emit_combined_sampler_declarations(compiler,
|
|
|
|
reg, resource_type, sampled_type, structure_stride, raw, resource_type_info);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2017-08-16 08:38:33 -07:00
|
|
|
type_id = vkd3d_dxbc_compiler_get_image_type_id(compiler,
|
2017-09-07 08:48:43 -07:00
|
|
|
reg, resource_type_info, sampled_type, structure_stride || raw, 0);
|
2017-07-17 09:12:02 -07:00
|
|
|
ptr_type_id = vkd3d_spirv_get_op_type_pointer(builder, storage_class, type_id);
|
2017-07-17 07:25:29 -07:00
|
|
|
var_id = vkd3d_spirv_build_op_variable(builder, &builder->global_stream,
|
|
|
|
ptr_type_id, storage_class, 0);
|
|
|
|
|
2018-10-21 16:49:13 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_descriptor_binding_for_reg(compiler, var_id, reg, resource_type, false);
|
2017-07-17 07:25:29 -07:00
|
|
|
|
2017-07-26 04:45:25 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_register_debug_name(builder, var_id, reg);
|
2017-07-17 07:25:29 -07:00
|
|
|
|
2017-09-26 01:37:41 -07:00
|
|
|
if (is_uav && !(scan_info->uav_read_mask & (1u << reg->idx[0].offset)))
|
|
|
|
vkd3d_spirv_build_op_decorate(builder, var_id, SpvDecorationNonReadable, NULL, 0);
|
|
|
|
|
2017-09-07 08:15:54 -07:00
|
|
|
if (is_uav && (scan_info->uav_counter_mask & (1u << reg->idx[0].offset)))
|
|
|
|
{
|
|
|
|
assert(structure_stride); /* counters are valid only for structured buffers */
|
2018-10-17 08:59:36 -07:00
|
|
|
|
|
|
|
if (vkd3d_dxbc_compiler_is_opengl_target(compiler))
|
|
|
|
{
|
|
|
|
vkd3d_spirv_enable_capability(builder, SpvCapabilityAtomicStorage);
|
|
|
|
storage_class = SpvStorageClassAtomicCounter;
|
|
|
|
counter_type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_UINT, 1);
|
|
|
|
ptr_type_id = vkd3d_spirv_get_op_type_pointer(builder, storage_class, counter_type_id);
|
|
|
|
}
|
|
|
|
|
2017-09-07 08:15:54 -07:00
|
|
|
counter_var_id = vkd3d_spirv_build_op_variable(builder, &builder->global_stream,
|
|
|
|
ptr_type_id, storage_class, 0);
|
|
|
|
|
2018-10-21 16:49:13 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_descriptor_binding_for_reg(compiler,
|
2017-09-07 08:15:54 -07:00
|
|
|
counter_var_id, reg, resource_type, true);
|
|
|
|
|
|
|
|
vkd3d_spirv_build_op_name(builder, counter_var_id, "u%u_counter", reg->idx[0].offset);
|
|
|
|
}
|
|
|
|
|
2017-07-26 04:45:25 -07:00
|
|
|
vkd3d_symbol_make_resource(&resource_symbol, reg);
|
2017-07-17 07:25:29 -07:00
|
|
|
resource_symbol.id = var_id;
|
|
|
|
resource_symbol.info.resource.sampled_type = sampled_type;
|
|
|
|
resource_symbol.info.resource.type_id = type_id;
|
2017-08-16 08:38:33 -07:00
|
|
|
resource_symbol.info.resource.resource_type_info = resource_type_info;
|
2017-08-22 05:53:33 -07:00
|
|
|
resource_symbol.info.resource.structure_stride = structure_stride;
|
2017-08-24 06:13:38 -07:00
|
|
|
resource_symbol.info.resource.raw = raw;
|
2017-09-07 08:15:54 -07:00
|
|
|
resource_symbol.info.resource.uav_counter_id = counter_var_id;
|
2017-07-17 07:25:29 -07:00
|
|
|
vkd3d_dxbc_compiler_put_symbol(compiler, &resource_symbol);
|
2017-07-17 07:25:29 -07:00
|
|
|
}
|
|
|
|
|
2017-07-24 10:43:50 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_dcl_resource(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
2017-08-11 04:58:04 -07:00
|
|
|
const struct vkd3d_shader_semantic *semantic = &instruction->declaration.semantic;
|
|
|
|
vkd3d_dxbc_compiler_emit_resource_declaration(compiler, &semantic->reg.reg,
|
2017-08-24 06:13:38 -07:00
|
|
|
semantic->resource_type, semantic->resource_data_type, 0, false);
|
2017-08-11 04:58:04 -07:00
|
|
|
}
|
|
|
|
|
2017-08-22 03:39:56 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_dcl_resource_raw(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
vkd3d_dxbc_compiler_emit_resource_declaration(compiler, &instruction->declaration.dst.reg,
|
2017-08-24 06:13:38 -07:00
|
|
|
VKD3D_SHADER_RESOURCE_BUFFER, VKD3D_DATA_UINT, 0, true);
|
2017-08-22 03:39:56 -07:00
|
|
|
}
|
|
|
|
|
2017-08-11 04:58:04 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_dcl_uav_raw(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
if (instruction->flags)
|
|
|
|
FIXME("Unhandled UAV flags %#x.\n", instruction->flags);
|
|
|
|
|
|
|
|
vkd3d_dxbc_compiler_emit_resource_declaration(compiler, &instruction->declaration.dst.reg,
|
2017-08-24 06:13:38 -07:00
|
|
|
VKD3D_SHADER_RESOURCE_BUFFER, VKD3D_DATA_UINT, 0, true);
|
2017-07-24 10:43:50 -07:00
|
|
|
}
|
|
|
|
|
2017-08-22 03:39:56 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_dcl_resource_structured(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
const struct vkd3d_shader_register *reg = &instruction->declaration.structured_resource.reg.reg;
|
|
|
|
unsigned int stride = instruction->declaration.structured_resource.byte_stride;
|
|
|
|
|
|
|
|
vkd3d_dxbc_compiler_emit_resource_declaration(compiler, reg,
|
2017-08-24 06:13:38 -07:00
|
|
|
VKD3D_SHADER_RESOURCE_BUFFER, VKD3D_DATA_UINT, stride / 4, false);
|
2017-08-22 03:39:56 -07:00
|
|
|
}
|
|
|
|
|
2017-08-18 05:52:40 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_dcl_uav_structured(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
2017-08-21 07:30:33 -07:00
|
|
|
const struct vkd3d_shader_register *reg = &instruction->declaration.structured_resource.reg.reg;
|
2017-08-22 03:39:56 -07:00
|
|
|
unsigned int stride = instruction->declaration.structured_resource.byte_stride;
|
2017-08-21 07:30:33 -07:00
|
|
|
|
2017-08-18 05:52:40 -07:00
|
|
|
if (instruction->flags)
|
|
|
|
FIXME("Unhandled UAV flags %#x.\n", instruction->flags);
|
|
|
|
|
2017-08-21 07:30:33 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_resource_declaration(compiler, reg,
|
2017-08-24 06:13:38 -07:00
|
|
|
VKD3D_SHADER_RESOURCE_BUFFER, VKD3D_DATA_UINT, stride / 4, false);
|
2017-08-18 05:52:40 -07:00
|
|
|
}
|
|
|
|
|
2017-07-24 10:43:50 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_dcl_uav_typed(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
2017-08-11 04:58:04 -07:00
|
|
|
const struct vkd3d_shader_semantic *semantic = &instruction->declaration.semantic;
|
|
|
|
|
2017-07-24 10:43:50 -07:00
|
|
|
if (instruction->flags)
|
2017-08-11 04:58:04 -07:00
|
|
|
FIXME("Unhandled UAV flags %#x.\n", instruction->flags);
|
2017-07-24 10:43:50 -07:00
|
|
|
|
2017-08-11 04:58:04 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_resource_declaration(compiler, &semantic->reg.reg,
|
2017-08-24 06:13:38 -07:00
|
|
|
semantic->resource_type, semantic->resource_data_type, 0, false);
|
2017-07-24 10:43:50 -07:00
|
|
|
}
|
|
|
|
|
2017-08-24 02:11:16 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_workgroup_memory(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_register *reg, unsigned int size, unsigned int structure_stride)
|
|
|
|
{
|
|
|
|
uint32_t type_id, array_type_id, length_id, pointer_type_id, var_id;
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
const SpvStorageClass storage_class = SpvStorageClassWorkgroup;
|
|
|
|
struct vkd3d_symbol reg_symbol;
|
|
|
|
|
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_UINT, 1);
|
|
|
|
length_id = vkd3d_dxbc_compiler_get_constant_uint(compiler, size);
|
|
|
|
array_type_id = vkd3d_spirv_get_op_type_array(builder, type_id, length_id);
|
|
|
|
|
|
|
|
pointer_type_id = vkd3d_spirv_get_op_type_pointer(builder, storage_class, array_type_id);
|
|
|
|
var_id = vkd3d_spirv_build_op_variable(builder, &builder->global_stream,
|
|
|
|
pointer_type_id, storage_class, 0);
|
|
|
|
|
|
|
|
vkd3d_dxbc_compiler_emit_register_debug_name(builder, var_id, reg);
|
|
|
|
|
|
|
|
vkd3d_symbol_make_register(®_symbol, reg);
|
|
|
|
reg_symbol.id = var_id;
|
|
|
|
reg_symbol.info.reg.storage_class = storage_class;
|
|
|
|
reg_symbol.info.reg.member_idx = 0;
|
2018-06-26 05:41:44 -07:00
|
|
|
reg_symbol.info.reg.component_type = VKD3D_TYPE_UINT;
|
|
|
|
reg_symbol.info.reg.write_mask = VKD3DSP_WRITEMASK_0;
|
2017-08-24 02:11:16 -07:00
|
|
|
reg_symbol.info.reg.structure_stride = structure_stride;
|
2019-01-25 04:23:29 -08:00
|
|
|
reg_symbol.info.reg.is_aggregate = false;
|
2017-08-24 02:11:16 -07:00
|
|
|
vkd3d_dxbc_compiler_put_symbol(compiler, ®_symbol);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void vkd3d_dxbc_compiler_emit_dcl_tgsm_raw(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
const struct vkd3d_shader_tgsm_raw *tgsm_raw = &instruction->declaration.tgsm_raw;
|
|
|
|
vkd3d_dxbc_compiler_emit_workgroup_memory(compiler, &tgsm_raw->reg.reg,
|
|
|
|
tgsm_raw->byte_count / 4, 0);
|
|
|
|
}
|
|
|
|
|
2017-08-24 02:11:16 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_dcl_tgsm_structured(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
const struct vkd3d_shader_tgsm_structured *tgsm_structured = &instruction->declaration.tgsm_structured;
|
|
|
|
unsigned int stride = tgsm_structured->byte_stride / 4;
|
|
|
|
vkd3d_dxbc_compiler_emit_workgroup_memory(compiler, &tgsm_structured->reg.reg,
|
|
|
|
tgsm_structured->structure_count * stride, stride);
|
|
|
|
}
|
|
|
|
|
2017-06-20 08:09:39 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_dcl_input(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
2018-06-26 05:41:45 -07:00
|
|
|
const struct vkd3d_shader_dst_param *dst = &instruction->declaration.dst;
|
2019-02-07 00:59:16 -08:00
|
|
|
const struct vkd3d_shader_phase *phase;
|
2018-06-26 05:41:45 -07:00
|
|
|
|
2019-02-07 00:59:16 -08:00
|
|
|
if ((phase = vkd3d_dxbc_compiler_get_current_shader_phase(compiler)))
|
|
|
|
vkd3d_dxbc_compiler_emit_shader_phase_input(compiler, phase, dst);
|
|
|
|
else if (vkd3d_shader_register_is_input(&dst->reg))
|
2018-06-26 05:41:45 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_input(compiler, dst, VKD3D_SIV_NONE);
|
2018-07-18 03:05:42 -07:00
|
|
|
else
|
|
|
|
vkd3d_dxbc_compiler_emit_input_register(compiler, dst);
|
2017-06-20 08:09:39 -07:00
|
|
|
}
|
|
|
|
|
2017-06-27 04:16:47 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_interpolation_decorations(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
uint32_t id, enum vkd3d_shader_interpolation_mode mode)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
|
|
|
|
switch (mode)
|
|
|
|
{
|
|
|
|
case VKD3DSIM_CONSTANT:
|
|
|
|
vkd3d_spirv_build_op_decorate(builder, id, SpvDecorationFlat, NULL, 0);
|
|
|
|
break;
|
|
|
|
case VKD3DSIM_LINEAR:
|
|
|
|
break;
|
2018-09-13 02:25:56 -07:00
|
|
|
case VKD3DSIM_LINEAR_CENTROID:
|
|
|
|
vkd3d_spirv_build_op_decorate(builder, id, SpvDecorationCentroid, NULL, 0);
|
|
|
|
break;
|
|
|
|
case VKD3DSIM_LINEAR_NOPERSPECTIVE:
|
|
|
|
vkd3d_spirv_build_op_decorate(builder, id, SpvDecorationNoPerspective, NULL, 0);
|
|
|
|
break;
|
2017-09-14 06:38:19 -07:00
|
|
|
case VKD3DSIM_LINEAR_SAMPLE:
|
|
|
|
vkd3d_spirv_enable_capability(builder, SpvCapabilitySampleRateShading);
|
|
|
|
vkd3d_spirv_build_op_decorate(builder, id, SpvDecorationSample, NULL, 0);
|
|
|
|
break;
|
2017-06-27 04:16:47 -07:00
|
|
|
default:
|
|
|
|
FIXME("Unhandled interpolation mode %#x.\n", mode);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2017-06-20 08:09:39 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_dcl_input_ps(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
2017-06-27 04:16:47 -07:00
|
|
|
uint32_t input_id;
|
|
|
|
|
2018-10-30 07:22:52 -07:00
|
|
|
if ((input_id = vkd3d_dxbc_compiler_emit_input(compiler, &instruction->declaration.dst, VKD3D_SIV_NONE)))
|
|
|
|
vkd3d_dxbc_compiler_emit_interpolation_decorations(compiler, input_id, instruction->flags);
|
2017-06-20 08:09:39 -07:00
|
|
|
}
|
|
|
|
|
2017-10-31 07:44:44 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_dcl_input_ps_sysval(struct vkd3d_dxbc_compiler *compiler,
|
2017-06-21 13:00:19 -07:00
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
2018-10-30 07:22:52 -07:00
|
|
|
const struct vkd3d_shader_register_semantic *semantic = &instruction->declaration.register_semantic;
|
2017-06-27 04:16:47 -07:00
|
|
|
uint32_t input_id;
|
|
|
|
|
2018-10-30 07:22:52 -07:00
|
|
|
input_id = vkd3d_dxbc_compiler_emit_input(compiler, &semantic->reg, semantic->sysval_semantic);
|
|
|
|
if (input_id && !semantic->sysval_semantic)
|
2017-06-27 04:16:47 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_interpolation_decorations(compiler, input_id, instruction->flags);
|
2017-06-21 13:00:19 -07:00
|
|
|
}
|
|
|
|
|
2018-02-04 14:58:22 -08:00
|
|
|
static void vkd3d_dxbc_compiler_emit_dcl_input_sysval(struct vkd3d_dxbc_compiler *compiler,
|
2017-06-20 08:09:39 -07:00
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
2017-06-21 13:00:19 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_input(compiler, &instruction->declaration.register_semantic.reg,
|
2017-06-20 08:09:39 -07:00
|
|
|
instruction->declaration.register_semantic.sysval_semantic);
|
|
|
|
}
|
|
|
|
|
2017-06-20 04:34:44 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_dcl_output(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
2019-01-23 03:46:50 -08:00
|
|
|
const struct vkd3d_shader_dst_param *dst = &instruction->declaration.dst;
|
|
|
|
|
|
|
|
if (vkd3d_shader_register_is_output(&dst->reg))
|
|
|
|
vkd3d_dxbc_compiler_emit_output(compiler, dst, VKD3D_SIV_NONE);
|
|
|
|
else
|
|
|
|
vkd3d_dxbc_compiler_emit_output_register(compiler, dst);
|
2017-06-20 04:34:44 -07:00
|
|
|
}
|
|
|
|
|
2017-06-20 04:34:44 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_dcl_output_siv(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
2017-06-27 13:21:43 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_output(compiler, &instruction->declaration.register_semantic.reg,
|
2017-06-20 04:34:44 -07:00
|
|
|
instruction->declaration.register_semantic.sysval_semantic);
|
|
|
|
}
|
|
|
|
|
2018-01-11 08:03:53 -08:00
|
|
|
static void vkd3d_dxbc_compiler_emit_dcl_stream(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
unsigned int stream_idx = instruction->src[0].reg.idx[0].offset;
|
|
|
|
|
|
|
|
if (stream_idx)
|
|
|
|
FIXME("Multiple streams are not supported yet.\n");
|
|
|
|
}
|
|
|
|
|
2018-01-11 08:03:51 -08:00
|
|
|
static void vkd3d_dxbc_compiler_emit_dcl_vertices_out(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
2018-01-11 08:03:52 -08:00
|
|
|
vkd3d_dxbc_compiler_emit_execution_mode1(compiler,
|
|
|
|
SpvExecutionModeOutputVertices, instruction->declaration.count);
|
2018-01-11 08:03:51 -08:00
|
|
|
}
|
|
|
|
|
2018-01-11 08:03:55 -08:00
|
|
|
static void vkd3d_dxbc_compiler_emit_dcl_input_primitive(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
enum vkd3d_primitive_type primitive_type = instruction->declaration.primitive_type.type;
|
|
|
|
SpvExecutionMode mode;
|
|
|
|
|
|
|
|
switch (primitive_type)
|
|
|
|
{
|
|
|
|
case VKD3D_PT_POINTLIST:
|
|
|
|
mode = SpvExecutionModeInputPoints;
|
|
|
|
break;
|
|
|
|
case VKD3D_PT_LINELIST:
|
|
|
|
mode = SpvExecutionModeInputLines;
|
|
|
|
break;
|
|
|
|
case VKD3D_PT_LINELIST_ADJ:
|
|
|
|
mode = SpvExecutionModeInputLinesAdjacency;
|
|
|
|
break;
|
|
|
|
case VKD3D_PT_TRIANGLELIST:
|
|
|
|
mode = SpvExecutionModeTriangles;
|
|
|
|
break;
|
|
|
|
case VKD3D_PT_TRIANGLELIST_ADJ:
|
|
|
|
mode = SpvExecutionModeInputTrianglesAdjacency;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
FIXME("Unhandled primitive type %#x.\n", primitive_type);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
vkd3d_dxbc_compiler_emit_execution_mode(compiler, mode, NULL, 0);
|
|
|
|
}
|
|
|
|
|
2018-01-11 08:03:54 -08:00
|
|
|
static void vkd3d_dxbc_compiler_emit_dcl_output_topology(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
enum vkd3d_primitive_type primitive_type = instruction->declaration.primitive_type.type;
|
|
|
|
SpvExecutionMode mode;
|
|
|
|
|
|
|
|
switch (primitive_type)
|
|
|
|
{
|
|
|
|
case VKD3D_PT_POINTLIST:
|
|
|
|
mode = SpvExecutionModeOutputPoints;
|
|
|
|
break;
|
|
|
|
case VKD3D_PT_LINESTRIP:
|
|
|
|
mode = SpvExecutionModeOutputLineStrip;
|
|
|
|
break;
|
|
|
|
case VKD3D_PT_TRIANGLESTRIP:
|
|
|
|
mode = SpvExecutionModeOutputTriangleStrip;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
ERR("Unexpected primitive type %#x.\n", primitive_type);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
vkd3d_dxbc_compiler_emit_execution_mode(compiler, mode, NULL, 0);
|
|
|
|
}
|
|
|
|
|
2018-02-04 14:58:24 -08:00
|
|
|
static void vkd3d_dxbc_compiler_emit_dcl_gs_instances(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
vkd3d_dxbc_compiler_emit_execution_mode1(compiler,
|
|
|
|
SpvExecutionModeInvocations, instruction->declaration.count);
|
|
|
|
}
|
|
|
|
|
2018-02-06 04:03:00 -08:00
|
|
|
static void vkd3d_dxbc_compiler_emit_dcl_tessellator_domain(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
enum vkd3d_tessellator_domain domain = instruction->declaration.tessellator_domain;
|
|
|
|
SpvExecutionMode mode;
|
|
|
|
|
|
|
|
switch (domain)
|
|
|
|
{
|
|
|
|
case VKD3D_TESSELLATOR_DOMAIN_LINE:
|
|
|
|
mode = SpvExecutionModeIsolines;
|
|
|
|
break;
|
|
|
|
case VKD3D_TESSELLATOR_DOMAIN_TRIANGLE:
|
|
|
|
mode = SpvExecutionModeTriangles;
|
|
|
|
break;
|
|
|
|
case VKD3D_TESSELLATOR_DOMAIN_QUAD:
|
|
|
|
mode = SpvExecutionModeQuads;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
FIXME("Invalid tessellator domain %#x.\n", domain);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
vkd3d_dxbc_compiler_emit_execution_mode(compiler, mode, NULL, 0);
|
|
|
|
}
|
|
|
|
|
2019-01-25 04:23:28 -08:00
|
|
|
static void vkd3d_dxbc_compiler_emit_dcl_tessellator_output_primitive(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
enum vkd3d_tessellator_output_primitive primitive = instruction->declaration.tessellator_output_primitive;
|
|
|
|
SpvExecutionMode mode;
|
|
|
|
|
|
|
|
switch (primitive)
|
|
|
|
{
|
|
|
|
case VKD3D_TESSELLATOR_OUTPUT_POINT:
|
|
|
|
mode = SpvExecutionModePointMode;
|
|
|
|
break;
|
|
|
|
case VKD3D_TESSELLATOR_OUTPUT_LINE:
|
|
|
|
return;
|
|
|
|
case VKD3D_TESSELLATOR_OUTPUT_TRIANGLE_CW:
|
|
|
|
mode = SpvExecutionModeVertexOrderCw;
|
|
|
|
break;
|
|
|
|
case VKD3D_TESSELLATOR_OUTPUT_TRIANGLE_CCW:
|
|
|
|
mode = SpvExecutionModeVertexOrderCcw;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
FIXME("Invalid tessellator output primitive %#x.\n", primitive);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
vkd3d_dxbc_compiler_emit_execution_mode(compiler, mode, NULL, 0);
|
|
|
|
}
|
|
|
|
|
2018-02-06 04:03:01 -08:00
|
|
|
static void vkd3d_dxbc_compiler_emit_dcl_tessellator_partitioning(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
enum vkd3d_tessellator_partitioning partitioning = instruction->declaration.tessellator_partitioning;
|
|
|
|
SpvExecutionMode mode;
|
|
|
|
|
|
|
|
switch (partitioning)
|
|
|
|
{
|
|
|
|
case VKD3D_TESSELLATOR_PARTITIONING_INTEGER:
|
|
|
|
case VKD3D_TESSELLATOR_PARTITIONING_POW2:
|
|
|
|
mode = SpvExecutionModeSpacingEqual;
|
|
|
|
break;
|
|
|
|
case VKD3D_TESSELLATOR_PARTITIONING_FRACTIONAL_ODD:
|
|
|
|
mode = SpvExecutionModeSpacingFractionalOdd;
|
|
|
|
break;
|
|
|
|
case VKD3D_TESSELLATOR_PARTITIONING_FRACTIONAL_EVEN:
|
|
|
|
mode = SpvExecutionModeSpacingFractionalEven;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
FIXME("Invalid tessellator partitioning %#x.\n", partitioning);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
vkd3d_dxbc_compiler_emit_execution_mode(compiler, mode, NULL, 0);
|
|
|
|
}
|
|
|
|
|
2017-06-19 10:49:11 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_dcl_thread_group(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
const struct vkd3d_shader_thread_group_size *group_size = &instruction->declaration.thread_group_size;
|
2018-01-11 08:03:52 -08:00
|
|
|
const uint32_t local_size[] = {group_size->x, group_size->y, group_size->z};
|
2017-06-19 10:49:11 -07:00
|
|
|
|
2018-01-11 08:03:52 -08:00
|
|
|
vkd3d_dxbc_compiler_emit_execution_mode(compiler,
|
|
|
|
SpvExecutionModeLocalSize, local_size, ARRAY_SIZE(local_size));
|
2017-06-19 10:49:11 -07:00
|
|
|
}
|
|
|
|
|
2019-02-06 03:38:09 -08:00
|
|
|
static void vkd3d_dxbc_compiler_enter_shader_phase(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
struct vkd3d_shader_phase *phase;
|
2019-02-07 00:59:14 -08:00
|
|
|
unsigned int idx;
|
2019-02-06 03:38:09 -08:00
|
|
|
|
2019-02-07 00:59:14 -08:00
|
|
|
if ((idx = compiler->shader_phase_count))
|
2019-02-06 03:38:09 -08:00
|
|
|
vkd3d_spirv_build_op_function_end(builder);
|
|
|
|
|
|
|
|
if (!vkd3d_array_reserve((void **)&compiler->shader_phases, &compiler->shader_phases_size,
|
|
|
|
compiler->shader_phase_count + 1, sizeof(*compiler->shader_phases)))
|
|
|
|
return;
|
|
|
|
phase = &compiler->shader_phases[compiler->shader_phase_count++];
|
|
|
|
|
|
|
|
phase->type = instruction->handler_idx;
|
2019-02-07 00:59:14 -08:00
|
|
|
phase->idx = idx;
|
|
|
|
phase->instance_count = 0;
|
|
|
|
phase->function_id = 0;
|
2019-02-07 00:59:15 -08:00
|
|
|
phase->instance_id = 0;
|
2019-02-07 00:59:14 -08:00
|
|
|
phase->function_location = 0;
|
2019-02-06 03:38:09 -08:00
|
|
|
}
|
|
|
|
|
2019-02-07 00:59:17 -08:00
|
|
|
static int vkd3d_dxbc_compiler_emit_shader_phase_instance_count(struct vkd3d_dxbc_compiler *compiler,
|
2019-02-07 00:59:15 -08:00
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
struct vkd3d_shader_phase *phase = &compiler->shader_phases[compiler->shader_phase_count - 1];
|
|
|
|
|
|
|
|
if (!compiler->shader_phase_count
|
2019-02-07 00:59:17 -08:00
|
|
|
|| (phase->type != VKD3DSIH_HS_FORK_PHASE && phase->type != VKD3DSIH_HS_JOIN_PHASE)
|
2019-02-07 00:59:15 -08:00
|
|
|
|| phase->function_id)
|
|
|
|
{
|
2019-02-07 00:59:17 -08:00
|
|
|
WARN("Unexpected dcl_hs_{fork,join}_phase_instance_count instruction.\n");
|
2019-02-07 00:59:15 -08:00
|
|
|
return VKD3D_ERROR_INVALID_SHADER;
|
|
|
|
}
|
|
|
|
|
|
|
|
phase->instance_count = instruction->declaration.count;
|
|
|
|
|
|
|
|
vkd3d_dxbc_compiler_begin_shader_phase(compiler, phase);
|
|
|
|
|
|
|
|
return VKD3D_OK;
|
|
|
|
}
|
|
|
|
|
2019-02-07 00:59:18 -08:00
|
|
|
static const struct vkd3d_shader_phase *vkd3d_dxbc_compiler_get_control_point_phase(
|
|
|
|
struct vkd3d_dxbc_compiler *compiler)
|
|
|
|
{
|
|
|
|
const struct vkd3d_shader_phase *phase;
|
|
|
|
|
|
|
|
if (compiler->shader_phase_count < 1)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
phase = &compiler->shader_phases[0];
|
|
|
|
if (phase->type == VKD3DSIH_HS_CONTROL_POINT_PHASE)
|
|
|
|
return phase;
|
|
|
|
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void vkd3d_dxbc_compiler_emit_barrier(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
SpvScope execution_scope, SpvScope memory_scope, SpvMemorySemanticsMask semantics)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
uint32_t execution_id, memory_id, semantics_id;
|
|
|
|
|
|
|
|
memory_id = vkd3d_dxbc_compiler_get_constant_uint(compiler, memory_scope);
|
|
|
|
semantics_id = vkd3d_dxbc_compiler_get_constant_uint(compiler, semantics);
|
|
|
|
|
|
|
|
if (execution_scope != SpvScopeMax)
|
|
|
|
{
|
|
|
|
execution_id = vkd3d_dxbc_compiler_get_constant_uint(compiler, execution_scope);
|
|
|
|
vkd3d_spirv_build_op_control_barrier(builder, execution_id, memory_id, semantics_id);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
vkd3d_spirv_build_op_memory_barrier(builder, memory_id, semantics_id);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void vkd3d_dxbc_compiler_emit_hull_shader_barrier(struct vkd3d_dxbc_compiler *compiler)
|
|
|
|
{
|
|
|
|
vkd3d_dxbc_compiler_emit_barrier(compiler,
|
|
|
|
SpvScopeWorkgroup, SpvScopeInvocation, SpvMemorySemanticsMaskNone);
|
|
|
|
}
|
|
|
|
|
2019-02-06 03:38:09 -08:00
|
|
|
static void vkd3d_dxbc_compiler_emit_hull_shader_main(struct vkd3d_dxbc_compiler *compiler)
|
|
|
|
{
|
2019-02-07 00:59:18 -08:00
|
|
|
const struct vkd3d_shader_scan_info *scan_info = compiler->scan_info;
|
2019-02-06 03:38:09 -08:00
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
2019-02-07 00:59:18 -08:00
|
|
|
const struct vkd3d_shader_phase *control_point_phase, *phase;
|
2019-02-07 00:59:15 -08:00
|
|
|
uint32_t phase_instance_id;
|
|
|
|
unsigned int i, j;
|
2019-02-06 03:38:09 -08:00
|
|
|
uint32_t void_id;
|
|
|
|
|
|
|
|
vkd3d_spirv_builder_begin_main_function(builder);
|
|
|
|
|
|
|
|
void_id = vkd3d_spirv_get_op_type_void(builder);
|
2019-02-07 00:59:18 -08:00
|
|
|
|
|
|
|
if ((control_point_phase = vkd3d_dxbc_compiler_get_control_point_phase(compiler)))
|
|
|
|
vkd3d_spirv_build_op_function_call(builder, void_id, control_point_phase->function_id, NULL, 0);
|
|
|
|
|
|
|
|
if (scan_info->use_vocp)
|
|
|
|
vkd3d_dxbc_compiler_emit_hull_shader_barrier(compiler);
|
|
|
|
|
2019-02-06 03:38:09 -08:00
|
|
|
for (i = 0; i < compiler->shader_phase_count; ++i)
|
|
|
|
{
|
|
|
|
phase = &compiler->shader_phases[i];
|
2019-02-07 00:59:18 -08:00
|
|
|
if (phase->type == VKD3DSIH_HS_CONTROL_POINT_PHASE)
|
|
|
|
continue;
|
2019-02-07 00:59:15 -08:00
|
|
|
|
|
|
|
if (phase->instance_count)
|
|
|
|
{
|
|
|
|
for (j = 0; j < phase->instance_count; ++j)
|
|
|
|
{
|
|
|
|
phase_instance_id = vkd3d_dxbc_compiler_get_constant_uint(compiler, j);
|
|
|
|
vkd3d_spirv_build_op_function_call(builder,
|
|
|
|
void_id, phase->function_id, &phase_instance_id, 1);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
vkd3d_spirv_build_op_function_call(builder, void_id, phase->function_id, NULL, 0);
|
|
|
|
}
|
2019-02-06 03:38:09 -08:00
|
|
|
}
|
|
|
|
|
|
|
|
vkd3d_spirv_build_op_return(builder);
|
|
|
|
vkd3d_spirv_build_op_function_end(builder);
|
|
|
|
}
|
|
|
|
|
2017-06-20 05:14:44 -07:00
|
|
|
static SpvOp vkd3d_dxbc_compiler_map_alu_instruction(const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
static const struct
|
|
|
|
{
|
|
|
|
enum VKD3D_SHADER_INSTRUCTION_HANDLER handler_idx;
|
|
|
|
SpvOp spirv_op;
|
|
|
|
}
|
|
|
|
alu_ops[] =
|
|
|
|
{
|
2017-06-29 00:02:50 -07:00
|
|
|
{VKD3DSIH_ADD, SpvOpFAdd},
|
|
|
|
{VKD3DSIH_AND, SpvOpBitwiseAnd},
|
|
|
|
{VKD3DSIH_BFREV, SpvOpBitReverse},
|
|
|
|
{VKD3DSIH_COUNTBITS, SpvOpBitCount},
|
|
|
|
{VKD3DSIH_DIV, SpvOpFDiv},
|
|
|
|
{VKD3DSIH_FTOI, SpvOpConvertFToS},
|
|
|
|
{VKD3DSIH_FTOU, SpvOpConvertFToU},
|
|
|
|
{VKD3DSIH_IADD, SpvOpIAdd},
|
2018-09-24 01:25:18 -07:00
|
|
|
{VKD3DSIH_INEG, SpvOpSNegate},
|
2017-06-29 00:02:50 -07:00
|
|
|
{VKD3DSIH_ISHL, SpvOpShiftLeftLogical},
|
|
|
|
{VKD3DSIH_ISHR, SpvOpShiftRightArithmetic},
|
|
|
|
{VKD3DSIH_ITOF, SpvOpConvertSToF},
|
|
|
|
{VKD3DSIH_MUL, SpvOpFMul},
|
2017-07-06 09:11:57 -07:00
|
|
|
{VKD3DSIH_NOT, SpvOpNot},
|
|
|
|
{VKD3DSIH_OR, SpvOpBitwiseOr},
|
2017-06-29 00:02:50 -07:00
|
|
|
{VKD3DSIH_USHR, SpvOpShiftRightLogical},
|
|
|
|
{VKD3DSIH_UTOF, SpvOpConvertUToF},
|
2017-07-06 09:11:57 -07:00
|
|
|
{VKD3DSIH_XOR, SpvOpBitwiseXor},
|
2017-06-20 05:14:44 -07:00
|
|
|
};
|
|
|
|
unsigned int i;
|
|
|
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE(alu_ops); ++i)
|
|
|
|
{
|
|
|
|
if (alu_ops[i].handler_idx == instruction->handler_idx)
|
|
|
|
return alu_ops[i].spirv_op;
|
|
|
|
}
|
|
|
|
|
|
|
|
return SpvOpMax;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void vkd3d_dxbc_compiler_emit_alu_instruction(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
const struct vkd3d_shader_dst_param *dst = instruction->dst;
|
|
|
|
const struct vkd3d_shader_src_param *src = instruction->src;
|
|
|
|
uint32_t src_ids[VKD3D_DXBC_MAX_SOURCE_COUNT];
|
|
|
|
uint32_t type_id, val_id;
|
|
|
|
unsigned int i;
|
|
|
|
SpvOp op;
|
|
|
|
|
|
|
|
op = vkd3d_dxbc_compiler_map_alu_instruction(instruction);
|
|
|
|
if (op == SpvOpMax)
|
|
|
|
{
|
2017-07-06 09:11:57 -07:00
|
|
|
ERR("Unexpected instruction %#x.\n", instruction->handler_idx);
|
2017-06-20 05:14:44 -07:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
assert(instruction->dst_count == 1);
|
|
|
|
assert(instruction->src_count <= VKD3D_DXBC_MAX_SOURCE_COUNT);
|
|
|
|
|
2018-09-05 04:45:26 -07:00
|
|
|
type_id = vkd3d_dxbc_compiler_get_type_id_for_dst(compiler, dst);
|
2017-06-20 05:14:44 -07:00
|
|
|
|
|
|
|
for (i = 0; i < instruction->src_count; ++i)
|
2017-06-21 13:00:19 -07:00
|
|
|
src_ids[i] = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[i], dst->write_mask);
|
2017-06-20 05:14:44 -07:00
|
|
|
|
|
|
|
val_id = vkd3d_spirv_build_op_trv(builder, &builder->function_stream, op, type_id,
|
|
|
|
src_ids, instruction->src_count);
|
|
|
|
|
2017-06-29 04:40:27 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_store_dst(compiler, dst, val_id);
|
2017-06-20 05:14:44 -07:00
|
|
|
}
|
|
|
|
|
2017-06-20 05:59:25 -07:00
|
|
|
static enum GLSLstd450 vkd3d_dxbc_compiler_map_ext_glsl_instruction(
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
static const struct
|
|
|
|
{
|
|
|
|
enum VKD3D_SHADER_INSTRUCTION_HANDLER handler_idx;
|
|
|
|
enum GLSLstd450 glsl_inst;
|
|
|
|
}
|
|
|
|
glsl_insts[] =
|
|
|
|
{
|
2017-07-19 04:51:44 -07:00
|
|
|
{VKD3DSIH_EXP, GLSLstd450Exp2},
|
2017-06-29 00:02:50 -07:00
|
|
|
{VKD3DSIH_FIRSTBIT_HI, GLSLstd450FindUMsb},
|
|
|
|
{VKD3DSIH_FIRSTBIT_LO, GLSLstd450FindILsb},
|
|
|
|
{VKD3DSIH_FIRSTBIT_SHI, GLSLstd450FindSMsb},
|
2017-07-19 04:51:44 -07:00
|
|
|
{VKD3DSIH_FRC, GLSLstd450Fract},
|
2017-07-19 04:51:44 -07:00
|
|
|
{VKD3DSIH_IMAX, GLSLstd450SMax},
|
|
|
|
{VKD3DSIH_IMIN, GLSLstd450SMin},
|
2017-07-19 04:51:44 -07:00
|
|
|
{VKD3DSIH_LOG, GLSLstd450Log2},
|
2017-06-29 00:02:50 -07:00
|
|
|
{VKD3DSIH_MAD, GLSLstd450Fma},
|
2018-01-25 03:04:27 -08:00
|
|
|
{VKD3DSIH_MAX, GLSLstd450NMax},
|
|
|
|
{VKD3DSIH_MIN, GLSLstd450NMin},
|
2018-08-01 06:34:34 -07:00
|
|
|
{VKD3DSIH_ROUND_NE, GLSLstd450RoundEven},
|
2017-07-19 04:51:44 -07:00
|
|
|
{VKD3DSIH_ROUND_NI, GLSLstd450Floor},
|
|
|
|
{VKD3DSIH_ROUND_PI, GLSLstd450Ceil},
|
2017-08-22 03:39:56 -07:00
|
|
|
{VKD3DSIH_ROUND_Z, GLSLstd450Trunc},
|
2017-06-29 00:02:50 -07:00
|
|
|
{VKD3DSIH_RSQ, GLSLstd450InverseSqrt},
|
|
|
|
{VKD3DSIH_SQRT, GLSLstd450Sqrt},
|
2017-07-19 04:51:44 -07:00
|
|
|
{VKD3DSIH_UMAX, GLSLstd450UMax},
|
|
|
|
{VKD3DSIH_UMIN, GLSLstd450UMin},
|
2017-06-20 05:59:25 -07:00
|
|
|
};
|
|
|
|
unsigned int i;
|
|
|
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE(glsl_insts); ++i)
|
|
|
|
{
|
|
|
|
if (glsl_insts[i].handler_idx == instruction->handler_idx)
|
|
|
|
return glsl_insts[i].glsl_inst;
|
|
|
|
}
|
|
|
|
|
|
|
|
return GLSLstd450Bad;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void vkd3d_dxbc_compiler_emit_ext_glsl_instruction(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
const struct vkd3d_shader_dst_param *dst = instruction->dst;
|
|
|
|
const struct vkd3d_shader_src_param *src = instruction->src;
|
|
|
|
uint32_t src_id[VKD3D_DXBC_MAX_SOURCE_COUNT];
|
|
|
|
uint32_t instr_set_id, type_id, val_id;
|
|
|
|
enum GLSLstd450 glsl_inst;
|
|
|
|
unsigned int i;
|
|
|
|
|
|
|
|
glsl_inst = vkd3d_dxbc_compiler_map_ext_glsl_instruction(instruction);
|
|
|
|
if (glsl_inst == GLSLstd450Bad)
|
|
|
|
{
|
2017-07-10 06:33:34 -07:00
|
|
|
ERR("Unexpected instruction %#x.\n", instruction->handler_idx);
|
2017-06-20 05:59:25 -07:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2017-06-27 13:21:43 -07:00
|
|
|
instr_set_id = vkd3d_spirv_get_glsl_std450_instr_set(builder);
|
2017-06-20 05:59:25 -07:00
|
|
|
|
|
|
|
assert(instruction->dst_count == 1);
|
|
|
|
assert(instruction->src_count <= VKD3D_DXBC_MAX_SOURCE_COUNT);
|
|
|
|
|
2018-09-05 04:45:26 -07:00
|
|
|
type_id = vkd3d_dxbc_compiler_get_type_id_for_dst(compiler, dst);
|
2017-06-20 05:59:25 -07:00
|
|
|
|
|
|
|
for (i = 0; i < instruction->src_count; ++i)
|
2017-06-21 13:00:19 -07:00
|
|
|
src_id[i] = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[i], dst->write_mask);
|
2017-06-20 05:59:25 -07:00
|
|
|
|
|
|
|
val_id = vkd3d_spirv_build_op_ext_inst(builder, type_id,
|
2017-06-27 13:21:43 -07:00
|
|
|
instr_set_id, glsl_inst, src_id, instruction->src_count);
|
2017-06-20 05:59:25 -07:00
|
|
|
|
2017-06-29 00:02:50 -07:00
|
|
|
if (instruction->handler_idx == VKD3DSIH_FIRSTBIT_HI
|
|
|
|
|| instruction->handler_idx == VKD3DSIH_FIRSTBIT_SHI)
|
|
|
|
{
|
|
|
|
/* In D3D bits are numbered from the most significant bit. */
|
2017-06-29 04:40:27 -07:00
|
|
|
val_id = vkd3d_spirv_build_op_isub(builder, type_id,
|
2017-06-29 00:02:50 -07:00
|
|
|
vkd3d_dxbc_compiler_get_constant_uint(compiler, 31), val_id);
|
|
|
|
}
|
|
|
|
|
2017-06-29 04:40:27 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_store_dst(compiler, dst, val_id);
|
2017-06-20 05:59:25 -07:00
|
|
|
}
|
|
|
|
|
2017-06-20 04:34:44 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_mov(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
2018-10-30 07:22:48 -07:00
|
|
|
struct vkd3d_shader_register_info dst_reg_info, src_reg_info;
|
2017-06-29 00:02:50 -07:00
|
|
|
const struct vkd3d_shader_dst_param *dst = instruction->dst;
|
|
|
|
const struct vkd3d_shader_src_param *src = instruction->src;
|
2017-06-22 04:36:18 -07:00
|
|
|
uint32_t val_id, dst_val_id, type_id, dst_id, src_id;
|
|
|
|
uint32_t components[VKD3D_VEC4_SIZE];
|
|
|
|
unsigned int i, component_count;
|
2017-06-20 04:34:44 -07:00
|
|
|
|
2017-06-22 04:36:18 -07:00
|
|
|
component_count = vkd3d_write_mask_component_count(dst->write_mask);
|
|
|
|
|
2018-10-30 07:22:48 -07:00
|
|
|
vkd3d_dxbc_compiler_get_register_info(compiler, &dst->reg, &dst_reg_info);
|
|
|
|
memset(&src_reg_info, 0, sizeof(src_reg_info));
|
2018-06-26 05:41:44 -07:00
|
|
|
if (src->reg.type != VKD3DSPR_IMMCONST)
|
2018-10-30 07:22:48 -07:00
|
|
|
vkd3d_dxbc_compiler_get_register_info(compiler, &src->reg, &src_reg_info);
|
2018-06-26 05:41:44 -07:00
|
|
|
|
2017-06-22 04:36:18 -07:00
|
|
|
if (component_count == 1 || component_count == VKD3D_VEC4_SIZE
|
2018-06-26 05:41:44 -07:00
|
|
|
|| dst->modifiers || src->modifiers || src->reg.type == VKD3DSPR_IMMCONST
|
2018-10-30 07:22:48 -07:00
|
|
|
|| dst_reg_info.component_type != src_reg_info.component_type
|
|
|
|
|| dst_reg_info.write_mask != VKD3DSP_WRITEMASK_ALL
|
|
|
|
|| src_reg_info.write_mask != VKD3DSP_WRITEMASK_ALL)
|
2017-06-22 04:36:18 -07:00
|
|
|
{
|
|
|
|
val_id = vkd3d_dxbc_compiler_emit_load_src(compiler, src, dst->write_mask);
|
2017-06-29 04:40:27 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_store_dst(compiler, dst, val_id);
|
2017-06-22 04:36:18 -07:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
|
2018-10-30 07:22:48 -07:00
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, dst_reg_info.component_type, VKD3D_VEC4_SIZE);
|
2017-06-22 04:36:18 -07:00
|
|
|
dst_id = vkd3d_dxbc_compiler_get_register_id(compiler, &dst->reg);
|
|
|
|
src_id = vkd3d_dxbc_compiler_get_register_id(compiler, &src->reg);
|
|
|
|
|
|
|
|
val_id = vkd3d_spirv_build_op_load(builder, type_id, src_id, SpvMemoryAccessMaskNone);
|
|
|
|
dst_val_id = vkd3d_spirv_build_op_load(builder, type_id, dst_id, SpvMemoryAccessMaskNone);
|
|
|
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE(components); ++i)
|
|
|
|
{
|
|
|
|
if (dst->write_mask & (VKD3DSP_WRITEMASK_0 << i))
|
|
|
|
components[i] = VKD3D_VEC4_SIZE + vkd3d_swizzle_get_component(src->swizzle, i);
|
|
|
|
else
|
|
|
|
components[i] = i;
|
|
|
|
}
|
|
|
|
|
|
|
|
val_id = vkd3d_spirv_build_op_vector_shuffle(builder,
|
|
|
|
type_id, dst_val_id, val_id, components, VKD3D_VEC4_SIZE);
|
|
|
|
|
|
|
|
vkd3d_spirv_build_op_store(builder, dst_id, val_id, SpvMemoryAccessMaskNone);
|
|
|
|
}
|
2017-06-20 04:34:44 -07:00
|
|
|
}
|
|
|
|
|
2017-06-29 00:02:50 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_movc(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
const struct vkd3d_shader_dst_param *dst = instruction->dst;
|
|
|
|
const struct vkd3d_shader_src_param *src = instruction->src;
|
|
|
|
uint32_t condition_id, src1_id, src2_id, type_id, val_id;
|
|
|
|
unsigned int component_count;
|
|
|
|
|
|
|
|
condition_id = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[0], dst->write_mask);
|
|
|
|
src1_id = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[1], dst->write_mask);
|
|
|
|
src2_id = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[2], dst->write_mask);
|
|
|
|
|
|
|
|
component_count = vkd3d_write_mask_component_count(dst->write_mask);
|
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_FLOAT, component_count);
|
|
|
|
|
|
|
|
condition_id = vkd3d_dxbc_compiler_emit_int_to_bool(compiler,
|
|
|
|
VKD3D_SHADER_CONDITIONAL_OP_NZ, component_count, condition_id);
|
|
|
|
val_id = vkd3d_spirv_build_op_select(builder, type_id, condition_id, src1_id, src2_id);
|
|
|
|
|
2017-06-29 04:40:27 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_store_dst(compiler, dst, val_id);
|
2017-06-29 00:02:50 -07:00
|
|
|
}
|
|
|
|
|
2017-07-18 04:31:46 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_swapc(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
const struct vkd3d_shader_dst_param *dst = instruction->dst;
|
|
|
|
const struct vkd3d_shader_src_param *src = instruction->src;
|
|
|
|
uint32_t condition_id, src1_id, src2_id, type_id, val_id;
|
|
|
|
unsigned int component_count;
|
|
|
|
|
|
|
|
assert(dst[0].write_mask == dst[1].write_mask);
|
|
|
|
|
|
|
|
condition_id = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[0], dst->write_mask);
|
|
|
|
src1_id = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[1], dst->write_mask);
|
|
|
|
src2_id = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[2], dst->write_mask);
|
|
|
|
|
|
|
|
component_count = vkd3d_write_mask_component_count(dst->write_mask);
|
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_FLOAT, component_count);
|
|
|
|
|
|
|
|
condition_id = vkd3d_dxbc_compiler_emit_int_to_bool(compiler,
|
|
|
|
VKD3D_SHADER_CONDITIONAL_OP_NZ, component_count, condition_id);
|
|
|
|
|
|
|
|
val_id = vkd3d_spirv_build_op_select(builder, type_id, condition_id, src2_id, src1_id);
|
|
|
|
vkd3d_dxbc_compiler_emit_store_dst(compiler, &dst[0], val_id);
|
|
|
|
val_id = vkd3d_spirv_build_op_select(builder, type_id, condition_id, src1_id, src2_id);
|
|
|
|
vkd3d_dxbc_compiler_emit_store_dst(compiler, &dst[1], val_id);
|
|
|
|
}
|
|
|
|
|
2017-06-20 08:09:39 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_dot(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
const struct vkd3d_shader_dst_param *dst = instruction->dst;
|
|
|
|
const struct vkd3d_shader_src_param *src = instruction->src;
|
2018-06-26 05:41:53 -07:00
|
|
|
enum vkd3d_component_type component_type;
|
2017-06-20 08:09:39 -07:00
|
|
|
uint32_t type_id, val_id, src_ids[2];
|
2018-06-26 05:41:53 -07:00
|
|
|
unsigned int component_count, i;
|
2017-06-20 08:09:39 -07:00
|
|
|
DWORD write_mask;
|
|
|
|
|
2018-06-26 05:41:53 -07:00
|
|
|
component_count = vkd3d_write_mask_component_count(dst->write_mask);
|
|
|
|
component_type = vkd3d_component_type_from_data_type(dst->reg.data_type);
|
2017-06-20 08:09:39 -07:00
|
|
|
|
|
|
|
if (instruction->handler_idx == VKD3DSIH_DP4)
|
|
|
|
write_mask = VKD3DSP_WRITEMASK_ALL;
|
|
|
|
else if (instruction->handler_idx == VKD3DSIH_DP3)
|
|
|
|
write_mask = VKD3DSP_WRITEMASK_0 | VKD3DSP_WRITEMASK_1 | VKD3DSP_WRITEMASK_2;
|
|
|
|
else
|
|
|
|
write_mask = VKD3DSP_WRITEMASK_0 | VKD3DSP_WRITEMASK_1;
|
|
|
|
|
|
|
|
assert(instruction->src_count == ARRAY_SIZE(src_ids));
|
2017-12-14 02:45:59 -08:00
|
|
|
for (i = 0; i < ARRAY_SIZE(src_ids); ++i)
|
2017-07-14 08:21:23 -07:00
|
|
|
src_ids[i] = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[i], write_mask);
|
2017-06-20 08:09:39 -07:00
|
|
|
|
2018-06-26 05:41:53 -07:00
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, component_type, 1);
|
2017-06-20 08:09:39 -07:00
|
|
|
|
|
|
|
val_id = vkd3d_spirv_build_op_tr2(builder, &builder->function_stream,
|
|
|
|
SpvOpDot, type_id, src_ids[0], src_ids[1]);
|
2018-06-26 05:41:53 -07:00
|
|
|
if (component_count > 1)
|
|
|
|
{
|
|
|
|
val_id = vkd3d_dxbc_compiler_emit_construct_vector(compiler,
|
|
|
|
component_type, component_count, val_id, 0, 1);
|
|
|
|
}
|
2017-06-20 08:09:39 -07:00
|
|
|
|
2017-06-29 04:40:27 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_store_dst(compiler, dst, val_id);
|
2017-06-20 08:09:39 -07:00
|
|
|
}
|
|
|
|
|
2017-07-19 04:51:44 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_rcp(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
const struct vkd3d_shader_dst_param *dst = instruction->dst;
|
|
|
|
const struct vkd3d_shader_src_param *src = instruction->src;
|
|
|
|
uint32_t type_id, src_id, val_id;
|
|
|
|
unsigned int component_count;
|
|
|
|
|
|
|
|
component_count = vkd3d_write_mask_component_count(dst->write_mask);
|
2018-09-05 04:45:26 -07:00
|
|
|
type_id = vkd3d_dxbc_compiler_get_type_id_for_dst(compiler, dst);
|
2017-07-19 04:51:44 -07:00
|
|
|
|
|
|
|
src_id = vkd3d_dxbc_compiler_emit_load_src(compiler, src, dst->write_mask);
|
|
|
|
val_id = vkd3d_spirv_build_op_fdiv(builder, type_id,
|
2017-10-18 03:14:32 -07:00
|
|
|
vkd3d_dxbc_compiler_get_constant_float_vector(compiler, 1.0f, component_count), src_id);
|
2017-07-19 04:51:44 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_store_dst(compiler, dst, val_id);
|
|
|
|
}
|
|
|
|
|
2018-08-01 06:34:36 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_sincos(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
const struct vkd3d_shader_dst_param *dst_sin = &instruction->dst[0];
|
|
|
|
const struct vkd3d_shader_dst_param *dst_cos = &instruction->dst[1];
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
const struct vkd3d_shader_src_param *src = instruction->src;
|
|
|
|
uint32_t type_id, src_id, sin_id = 0, cos_id = 0;
|
|
|
|
|
|
|
|
if (dst_sin->reg.type != VKD3DSPR_NULL)
|
|
|
|
{
|
2018-09-05 04:45:26 -07:00
|
|
|
type_id = vkd3d_dxbc_compiler_get_type_id_for_dst(compiler, dst_sin);
|
2018-08-01 06:34:36 -07:00
|
|
|
src_id = vkd3d_dxbc_compiler_emit_load_src(compiler, src, dst_sin->write_mask);
|
|
|
|
|
|
|
|
sin_id = vkd3d_spirv_build_op_glsl_std450_sin(builder, type_id, src_id);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (dst_cos->reg.type != VKD3DSPR_NULL)
|
|
|
|
{
|
|
|
|
if (dst_sin->reg.type == VKD3DSPR_NULL || dst_cos->write_mask != dst_sin->write_mask)
|
|
|
|
{
|
2018-09-05 04:45:26 -07:00
|
|
|
type_id = vkd3d_dxbc_compiler_get_type_id_for_dst(compiler, dst_cos);
|
2018-08-01 06:34:36 -07:00
|
|
|
src_id = vkd3d_dxbc_compiler_emit_load_src(compiler, src, dst_cos->write_mask);
|
|
|
|
}
|
|
|
|
|
|
|
|
cos_id = vkd3d_spirv_build_op_glsl_std450_cos(builder, type_id, src_id);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (sin_id)
|
|
|
|
vkd3d_dxbc_compiler_emit_store_dst(compiler, dst_sin, sin_id);
|
|
|
|
|
|
|
|
if (cos_id)
|
|
|
|
vkd3d_dxbc_compiler_emit_store_dst(compiler, dst_cos, cos_id);
|
|
|
|
}
|
|
|
|
|
2017-07-19 04:51:44 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_imul(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
const struct vkd3d_shader_dst_param *dst = instruction->dst;
|
|
|
|
const struct vkd3d_shader_src_param *src = instruction->src;
|
|
|
|
uint32_t type_id, val_id, src0_id, src1_id;
|
|
|
|
|
|
|
|
if (dst[0].reg.type != VKD3DSPR_NULL)
|
|
|
|
FIXME("Extended multiplies not implemented.\n"); /* SpvOpSMulExtended */
|
|
|
|
|
|
|
|
if (dst[1].reg.type == VKD3DSPR_NULL)
|
|
|
|
return;
|
|
|
|
|
2018-09-05 04:45:26 -07:00
|
|
|
type_id = vkd3d_dxbc_compiler_get_type_id_for_dst(compiler, &dst[1]);
|
2017-07-19 04:51:44 -07:00
|
|
|
|
|
|
|
src0_id = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[0], dst[1].write_mask);
|
|
|
|
src1_id = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[1], dst[1].write_mask);
|
|
|
|
|
|
|
|
val_id = vkd3d_spirv_build_op_imul(builder, type_id, src0_id, src1_id);
|
|
|
|
|
|
|
|
vkd3d_dxbc_compiler_emit_store_dst(compiler, &dst[1], val_id);
|
|
|
|
}
|
|
|
|
|
2017-07-19 04:51:44 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_imad(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
const struct vkd3d_shader_dst_param *dst = instruction->dst;
|
|
|
|
const struct vkd3d_shader_src_param *src = instruction->src;
|
|
|
|
uint32_t type_id, val_id, src_ids[3];
|
|
|
|
unsigned int i, component_count;
|
|
|
|
|
|
|
|
component_count = vkd3d_write_mask_component_count(dst->write_mask);
|
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_INT, component_count);
|
|
|
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE(src_ids); ++i)
|
|
|
|
src_ids[i] = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[i], dst->write_mask);
|
|
|
|
|
|
|
|
val_id = vkd3d_spirv_build_op_imul(builder, type_id, src_ids[0], src_ids[1]);
|
|
|
|
val_id = vkd3d_spirv_build_op_iadd(builder, type_id, val_id, src_ids[2]);
|
|
|
|
|
|
|
|
vkd3d_dxbc_compiler_emit_store_dst(compiler, dst, val_id);
|
|
|
|
}
|
|
|
|
|
2017-07-21 05:14:42 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_udiv(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
2017-12-14 02:45:56 -08:00
|
|
|
uint32_t type_id, val_id, src0_id, src1_id, condition_id, uint_max_id;
|
2017-07-21 05:14:42 -07:00
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
const struct vkd3d_shader_dst_param *dst = instruction->dst;
|
|
|
|
const struct vkd3d_shader_src_param *src = instruction->src;
|
|
|
|
unsigned int component_count = 0;
|
|
|
|
|
|
|
|
if (dst[0].reg.type != VKD3DSPR_NULL)
|
|
|
|
{
|
|
|
|
component_count = vkd3d_write_mask_component_count(dst[0].write_mask);
|
2018-09-05 04:45:26 -07:00
|
|
|
type_id = vkd3d_dxbc_compiler_get_type_id_for_dst(compiler, &dst[0]);
|
2017-07-21 05:14:42 -07:00
|
|
|
|
|
|
|
src0_id = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[0], dst[0].write_mask);
|
|
|
|
src1_id = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[1], dst[0].write_mask);
|
|
|
|
|
|
|
|
condition_id = vkd3d_dxbc_compiler_emit_int_to_bool(compiler,
|
|
|
|
VKD3D_SHADER_CONDITIONAL_OP_NZ, component_count, src1_id);
|
2017-12-14 02:45:56 -08:00
|
|
|
uint_max_id = vkd3d_dxbc_compiler_get_constant_uint_vector(compiler,
|
|
|
|
0xffffffff, component_count);
|
2017-07-21 05:14:42 -07:00
|
|
|
|
|
|
|
val_id = vkd3d_spirv_build_op_udiv(builder, type_id, src0_id, src1_id);
|
|
|
|
/* The SPIR-V spec says: "The resulting value is undefined if Operand 2 is 0." */
|
2017-12-14 02:45:56 -08:00
|
|
|
val_id = vkd3d_spirv_build_op_select(builder, type_id, condition_id, val_id, uint_max_id);
|
2017-07-21 05:14:42 -07:00
|
|
|
|
|
|
|
vkd3d_dxbc_compiler_emit_store_dst(compiler, &dst[0], val_id);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (dst[1].reg.type != VKD3DSPR_NULL)
|
|
|
|
{
|
|
|
|
if (!component_count || dst[0].write_mask != dst[1].write_mask)
|
|
|
|
{
|
|
|
|
component_count = vkd3d_write_mask_component_count(dst[1].write_mask);
|
2018-09-05 04:45:26 -07:00
|
|
|
type_id = vkd3d_dxbc_compiler_get_type_id_for_dst(compiler, &dst[1]);
|
2017-07-21 05:14:42 -07:00
|
|
|
|
|
|
|
src0_id = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[0], dst[1].write_mask);
|
|
|
|
src1_id = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[1], dst[1].write_mask);
|
|
|
|
|
|
|
|
condition_id = vkd3d_dxbc_compiler_emit_int_to_bool(compiler,
|
|
|
|
VKD3D_SHADER_CONDITIONAL_OP_NZ, component_count, src1_id);
|
2017-12-14 02:45:56 -08:00
|
|
|
uint_max_id = vkd3d_dxbc_compiler_get_constant_uint_vector(compiler,
|
|
|
|
0xffffffff, component_count);
|
2017-07-21 05:14:42 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
val_id = vkd3d_spirv_build_op_umod(builder, type_id, src0_id, src1_id);
|
|
|
|
/* The SPIR-V spec says: "The resulting value is undefined if Operand 2 is 0." */
|
2017-12-14 02:45:56 -08:00
|
|
|
val_id = vkd3d_spirv_build_op_select(builder, type_id, condition_id, val_id, uint_max_id);
|
2017-07-21 05:14:42 -07:00
|
|
|
|
|
|
|
vkd3d_dxbc_compiler_emit_store_dst(compiler, &dst[1], val_id);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2017-06-20 08:09:39 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_bitfield_instruction(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
2018-10-18 05:59:42 -07:00
|
|
|
uint32_t src_ids[4], constituents[VKD3D_VEC4_SIZE], type_id, mask_id;
|
2017-06-20 08:09:39 -07:00
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
const struct vkd3d_shader_dst_param *dst = instruction->dst;
|
|
|
|
const struct vkd3d_shader_src_param *src = instruction->src;
|
2019-01-15 03:09:46 -08:00
|
|
|
enum vkd3d_component_type component_type;
|
2018-10-18 05:59:42 -07:00
|
|
|
unsigned int i, j, k, src_count;
|
2017-06-20 08:09:39 -07:00
|
|
|
DWORD write_mask;
|
|
|
|
SpvOp op;
|
|
|
|
|
|
|
|
src_count = instruction->src_count;
|
|
|
|
assert(2 <= src_count && src_count <= ARRAY_SIZE(src_ids));
|
|
|
|
|
2019-01-15 03:09:46 -08:00
|
|
|
component_type = vkd3d_component_type_from_data_type(dst->reg.data_type);
|
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, component_type, 1);
|
2017-06-20 08:09:39 -07:00
|
|
|
mask_id = vkd3d_dxbc_compiler_get_constant_uint(compiler, 0x1f);
|
|
|
|
|
2017-06-28 03:28:09 -07:00
|
|
|
switch (instruction->handler_idx)
|
|
|
|
{
|
|
|
|
case VKD3DSIH_BFI: op = SpvOpBitFieldInsert; break;
|
|
|
|
case VKD3DSIH_IBFE: op = SpvOpBitFieldSExtract; break;
|
|
|
|
case VKD3DSIH_UBFE: op = SpvOpBitFieldUExtract; break;
|
|
|
|
default:
|
|
|
|
ERR("Unexpected instruction %#x.\n", instruction->handler_idx);
|
|
|
|
return;
|
|
|
|
}
|
2017-06-20 08:09:39 -07:00
|
|
|
|
2018-10-18 05:59:42 -07:00
|
|
|
for (i = 0, k = 0; i < VKD3D_VEC4_SIZE; ++i)
|
2017-06-20 08:09:39 -07:00
|
|
|
{
|
|
|
|
if (!(write_mask = dst->write_mask & (VKD3DSP_WRITEMASK_0 << i)))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
for (j = 0; j < src_count; ++j)
|
2019-01-15 03:09:46 -08:00
|
|
|
{
|
|
|
|
src_ids[src_count - j - 1] = vkd3d_dxbc_compiler_emit_load_src_with_type(compiler,
|
|
|
|
&src[j], write_mask, component_type);
|
|
|
|
}
|
2017-06-20 08:09:39 -07:00
|
|
|
|
2019-01-15 03:09:46 -08:00
|
|
|
/* In SPIR-V, the last two operands are Offset and Count. */
|
2017-06-20 08:09:39 -07:00
|
|
|
for (j = src_count - 2; j < src_count; ++j)
|
|
|
|
{
|
2019-01-15 03:09:46 -08:00
|
|
|
src_ids[j] = vkd3d_spirv_build_op_and(builder, type_id, src_ids[j], mask_id);
|
2017-06-20 08:09:39 -07:00
|
|
|
}
|
|
|
|
|
2018-10-18 05:59:42 -07:00
|
|
|
constituents[k++] = vkd3d_spirv_build_op_trv(builder, &builder->function_stream,
|
2017-06-20 08:09:39 -07:00
|
|
|
op, type_id, src_ids, src_count);
|
|
|
|
}
|
2018-10-18 05:59:42 -07:00
|
|
|
|
2019-01-15 03:09:46 -08:00
|
|
|
vkd3d_dxbc_compiler_emit_store_dst_components(compiler, dst, component_type, constituents);
|
2017-06-20 08:09:39 -07:00
|
|
|
}
|
|
|
|
|
2017-07-06 09:11:57 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_f16tof32(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
uint32_t instr_set_id, type_id, scalar_type_id, src_id, result_id;
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
const struct vkd3d_shader_dst_param *dst = instruction->dst;
|
|
|
|
const struct vkd3d_shader_src_param *src = instruction->src;
|
2018-10-18 05:59:43 -07:00
|
|
|
uint32_t components[VKD3D_VEC4_SIZE];
|
|
|
|
unsigned int i, j;
|
2017-07-06 09:11:57 -07:00
|
|
|
DWORD write_mask;
|
|
|
|
|
|
|
|
instr_set_id = vkd3d_spirv_get_glsl_std450_instr_set(builder);
|
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_FLOAT, 2);
|
|
|
|
scalar_type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_FLOAT, 1);
|
|
|
|
|
|
|
|
/* FIXME: Consider a single UnpackHalf2x16 intruction per 2 components. */
|
2018-10-18 05:59:43 -07:00
|
|
|
for (i = 0, j = 0; i < VKD3D_VEC4_SIZE; ++i)
|
2017-07-06 09:11:57 -07:00
|
|
|
{
|
|
|
|
if (!(write_mask = dst->write_mask & (VKD3DSP_WRITEMASK_0 << i)))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
src_id = vkd3d_dxbc_compiler_emit_load_src(compiler, src, write_mask);
|
|
|
|
result_id = vkd3d_spirv_build_op_ext_inst(builder, type_id,
|
|
|
|
instr_set_id, GLSLstd450UnpackHalf2x16, &src_id, 1);
|
2018-10-18 05:59:43 -07:00
|
|
|
components[j++] = vkd3d_spirv_build_op_composite_extract1(builder,
|
2017-08-24 02:11:16 -07:00
|
|
|
scalar_type_id, result_id, 0);
|
2017-07-06 09:11:57 -07:00
|
|
|
}
|
2018-10-18 05:59:43 -07:00
|
|
|
|
|
|
|
vkd3d_dxbc_compiler_emit_store_dst_components(compiler,
|
|
|
|
dst, vkd3d_component_type_from_data_type(dst->reg.data_type), components);
|
2017-07-06 09:11:57 -07:00
|
|
|
}
|
|
|
|
|
2017-07-06 09:11:57 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_f32tof16(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
2018-10-18 05:59:44 -07:00
|
|
|
uint32_t instr_set_id, type_id, scalar_type_id, src_id, zero_id, constituents[2];
|
2017-07-06 09:11:57 -07:00
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
const struct vkd3d_shader_dst_param *dst = instruction->dst;
|
|
|
|
const struct vkd3d_shader_src_param *src = instruction->src;
|
2018-10-18 05:59:44 -07:00
|
|
|
uint32_t components[VKD3D_VEC4_SIZE];
|
|
|
|
unsigned int i, j;
|
2017-07-06 09:11:57 -07:00
|
|
|
DWORD write_mask;
|
|
|
|
|
|
|
|
instr_set_id = vkd3d_spirv_get_glsl_std450_instr_set(builder);
|
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_FLOAT, 2);
|
|
|
|
scalar_type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_UINT, 1);
|
|
|
|
zero_id = vkd3d_dxbc_compiler_get_constant_float(compiler, 0.0f);
|
|
|
|
|
|
|
|
/* FIXME: Consider a single PackHalf2x16 intruction per 2 components. */
|
2018-10-18 05:59:44 -07:00
|
|
|
for (i = 0, j = 0; i < VKD3D_VEC4_SIZE; ++i)
|
2017-07-06 09:11:57 -07:00
|
|
|
{
|
|
|
|
if (!(write_mask = dst->write_mask & (VKD3DSP_WRITEMASK_0 << i)))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
src_id = vkd3d_dxbc_compiler_emit_load_src(compiler, src, write_mask);
|
|
|
|
constituents[0] = src_id;
|
|
|
|
constituents[1] = zero_id;
|
|
|
|
src_id = vkd3d_spirv_build_op_composite_construct(builder,
|
|
|
|
type_id, constituents, ARRAY_SIZE(constituents));
|
2018-10-18 05:59:44 -07:00
|
|
|
components[j++] = vkd3d_spirv_build_op_ext_inst(builder, scalar_type_id,
|
2017-07-06 09:11:57 -07:00
|
|
|
instr_set_id, GLSLstd450PackHalf2x16, &src_id, 1);
|
|
|
|
}
|
2018-10-18 05:59:44 -07:00
|
|
|
|
|
|
|
vkd3d_dxbc_compiler_emit_store_dst_components(compiler,
|
|
|
|
dst, vkd3d_component_type_from_data_type(dst->reg.data_type), components);
|
2017-07-06 09:11:57 -07:00
|
|
|
}
|
|
|
|
|
2017-06-26 08:03:31 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_comparison_instruction(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
const struct vkd3d_shader_dst_param *dst = instruction->dst;
|
|
|
|
const struct vkd3d_shader_src_param *src = instruction->src;
|
2017-10-31 07:44:44 -07:00
|
|
|
uint32_t src0_id, src1_id, type_id, result_id;
|
2017-06-26 08:03:31 -07:00
|
|
|
unsigned int component_count;
|
|
|
|
SpvOp op;
|
|
|
|
|
|
|
|
switch (instruction->handler_idx)
|
|
|
|
{
|
2017-06-28 03:28:09 -07:00
|
|
|
case VKD3DSIH_EQ: op = SpvOpFOrdEqual; break;
|
|
|
|
case VKD3DSIH_GE: op = SpvOpFOrdGreaterThanEqual; break;
|
|
|
|
case VKD3DSIH_IEQ: op = SpvOpIEqual; break;
|
2017-07-19 04:51:44 -07:00
|
|
|
case VKD3DSIH_IGE: op = SpvOpSGreaterThanEqual; break;
|
|
|
|
case VKD3DSIH_ILT: op = SpvOpSLessThan; break;
|
|
|
|
case VKD3DSIH_INE: op = SpvOpINotEqual; break;
|
2017-06-28 03:28:09 -07:00
|
|
|
case VKD3DSIH_LT: op = SpvOpFOrdLessThan; break;
|
|
|
|
case VKD3DSIH_NE: op = SpvOpFUnordNotEqual; break;
|
2017-07-19 04:51:44 -07:00
|
|
|
case VKD3DSIH_UGE: op = SpvOpUGreaterThanEqual; break;
|
|
|
|
case VKD3DSIH_ULT: op = SpvOpULessThan; break;
|
2017-06-26 08:03:31 -07:00
|
|
|
default:
|
|
|
|
ERR("Unexpected instruction %#x.\n", instruction->handler_idx);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
component_count = vkd3d_write_mask_component_count(dst->write_mask);
|
|
|
|
|
|
|
|
src0_id = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[0], dst->write_mask);
|
|
|
|
src1_id = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[1], dst->write_mask);
|
|
|
|
|
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_BOOL, component_count);
|
|
|
|
result_id = vkd3d_spirv_build_op_tr2(builder, &builder->function_stream,
|
|
|
|
op, type_id, src0_id, src1_id);
|
|
|
|
|
2017-10-31 07:44:44 -07:00
|
|
|
result_id = vkd3d_dxbc_compiler_emit_bool_to_int(compiler, component_count, result_id);
|
2017-06-26 08:03:31 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_store_reg(compiler, &dst->reg, dst->write_mask, result_id);
|
|
|
|
}
|
|
|
|
|
2018-09-27 04:30:52 -07:00
|
|
|
static uint32_t vkd3d_dxbc_compiler_emit_conditional_branch(struct vkd3d_dxbc_compiler *compiler,
|
2017-07-20 04:32:40 -07:00
|
|
|
const struct vkd3d_shader_instruction *instruction, uint32_t target_block_id)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
const struct vkd3d_shader_src_param *src = instruction->src;
|
|
|
|
uint32_t condition_id, merge_block_id;
|
|
|
|
|
|
|
|
condition_id = vkd3d_dxbc_compiler_emit_load_src(compiler, src, VKD3DSP_WRITEMASK_0);
|
|
|
|
condition_id = vkd3d_dxbc_compiler_emit_int_to_bool(compiler, instruction->flags, 1, condition_id);
|
|
|
|
|
|
|
|
merge_block_id = vkd3d_spirv_alloc_id(builder);
|
|
|
|
|
|
|
|
vkd3d_spirv_build_op_selection_merge(builder, merge_block_id, SpvSelectionControlMaskNone);
|
|
|
|
vkd3d_spirv_build_op_branch_conditional(builder, condition_id, target_block_id, merge_block_id);
|
2018-09-27 04:30:52 -07:00
|
|
|
|
|
|
|
return merge_block_id;
|
2017-07-20 04:32:40 -07:00
|
|
|
}
|
|
|
|
|
2018-10-30 07:22:47 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_shader_epilogue_invocation(struct vkd3d_dxbc_compiler *compiler)
|
2017-06-21 03:22:20 -07:00
|
|
|
{
|
2017-07-10 06:33:34 -07:00
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
uint32_t void_id, function_id, arguments[MAX_REG_OUTPUT];
|
2017-07-28 03:56:18 -07:00
|
|
|
unsigned int i, count;
|
2017-07-10 06:33:34 -07:00
|
|
|
|
2018-10-30 07:22:47 -07:00
|
|
|
if ((function_id = compiler->epilogue_function_id))
|
2017-07-10 06:33:34 -07:00
|
|
|
{
|
2017-07-17 09:12:02 -07:00
|
|
|
void_id = vkd3d_spirv_get_op_type_void(builder);
|
2017-07-10 06:33:34 -07:00
|
|
|
for (i = 0, count = 0; i < ARRAY_SIZE(compiler->private_output_variable); ++i)
|
|
|
|
{
|
|
|
|
if (compiler->private_output_variable[i])
|
|
|
|
arguments[count++] = compiler->private_output_variable[i];
|
|
|
|
}
|
|
|
|
|
|
|
|
vkd3d_spirv_build_op_function_call(builder, void_id, function_id, arguments, count);
|
|
|
|
}
|
2018-01-11 08:03:53 -08:00
|
|
|
}
|
|
|
|
|
|
|
|
static void vkd3d_dxbc_compiler_emit_return(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
2019-02-06 03:38:10 -08:00
|
|
|
const struct vkd3d_shader_phase *phase;
|
2017-07-10 06:33:34 -07:00
|
|
|
|
2019-02-06 03:38:10 -08:00
|
|
|
if (compiler->shader_type != VKD3D_SHADER_TYPE_GEOMETRY
|
|
|
|
&& (!(phase = vkd3d_dxbc_compiler_get_current_shader_phase(compiler))
|
|
|
|
|| phase->type == VKD3DSIH_HS_CONTROL_POINT_PHASE))
|
2018-10-30 07:22:47 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_shader_epilogue_invocation(compiler);
|
2019-02-06 03:38:10 -08:00
|
|
|
|
2017-07-10 06:33:34 -07:00
|
|
|
vkd3d_spirv_build_op_return(builder);
|
2017-06-21 03:22:20 -07:00
|
|
|
}
|
|
|
|
|
2018-09-27 04:30:53 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_retc(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
uint32_t target_id, merge_block_id;
|
|
|
|
|
|
|
|
target_id = vkd3d_spirv_alloc_id(builder);
|
|
|
|
merge_block_id = vkd3d_dxbc_compiler_emit_conditional_branch(compiler, instruction, target_id);
|
|
|
|
|
|
|
|
vkd3d_spirv_build_op_label(builder, target_id);
|
|
|
|
vkd3d_dxbc_compiler_emit_return(compiler, instruction);
|
|
|
|
vkd3d_spirv_build_op_label(builder, merge_block_id);
|
|
|
|
}
|
|
|
|
|
2017-08-30 07:41:15 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_kill(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
2018-09-27 04:30:52 -07:00
|
|
|
uint32_t target_id, merge_block_id;
|
2017-08-30 07:41:15 -07:00
|
|
|
|
2018-09-27 04:30:52 -07:00
|
|
|
target_id = vkd3d_spirv_alloc_id(builder);
|
|
|
|
merge_block_id = vkd3d_dxbc_compiler_emit_conditional_branch(compiler, instruction, target_id);
|
2017-08-30 07:41:15 -07:00
|
|
|
|
2018-09-27 04:30:52 -07:00
|
|
|
vkd3d_spirv_build_op_label(builder, target_id);
|
2017-08-30 07:41:15 -07:00
|
|
|
vkd3d_spirv_build_op_kill(builder);
|
|
|
|
vkd3d_spirv_build_op_label(builder, merge_block_id);
|
|
|
|
}
|
|
|
|
|
2017-07-21 05:14:42 -07:00
|
|
|
static struct vkd3d_control_flow_info *vkd3d_dxbc_compiler_push_control_flow_level(
|
|
|
|
struct vkd3d_dxbc_compiler *compiler)
|
|
|
|
{
|
|
|
|
if (!vkd3d_array_reserve((void **)&compiler->control_flow_info, &compiler->control_flow_info_size,
|
|
|
|
compiler->control_flow_depth + 1, sizeof(*compiler->control_flow_info)))
|
|
|
|
{
|
|
|
|
ERR("Failed to allocate control flow info structure.\n");
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return &compiler->control_flow_info[compiler->control_flow_depth++];
|
|
|
|
}
|
|
|
|
|
|
|
|
static void vkd3d_dxbc_compiler_pop_control_flow_level(struct vkd3d_dxbc_compiler *compiler)
|
|
|
|
{
|
|
|
|
struct vkd3d_control_flow_info *cf_info;
|
|
|
|
|
|
|
|
assert(compiler->control_flow_depth);
|
|
|
|
|
|
|
|
cf_info = &compiler->control_flow_info[--compiler->control_flow_depth];
|
|
|
|
memset(cf_info, 0, sizeof(*cf_info));
|
|
|
|
}
|
|
|
|
|
2018-09-24 01:25:19 -07:00
|
|
|
static struct vkd3d_control_flow_info *vkd3d_dxbc_compiler_find_innermost_loop(
|
|
|
|
struct vkd3d_dxbc_compiler *compiler)
|
|
|
|
{
|
|
|
|
int depth;
|
|
|
|
|
|
|
|
for (depth = compiler->control_flow_depth - 1; depth >= 0; --depth)
|
|
|
|
{
|
|
|
|
if (compiler->control_flow_info[depth].current_block == VKD3D_BLOCK_LOOP)
|
|
|
|
return &compiler->control_flow_info[depth];
|
|
|
|
}
|
|
|
|
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2017-08-01 04:55:49 -07:00
|
|
|
static struct vkd3d_control_flow_info *vkd3d_dxbc_compiler_find_innermost_breakable_cf_construct(
|
2017-07-21 05:14:42 -07:00
|
|
|
struct vkd3d_dxbc_compiler *compiler)
|
|
|
|
{
|
|
|
|
int depth;
|
|
|
|
|
|
|
|
for (depth = compiler->control_flow_depth - 1; depth >= 0; --depth)
|
|
|
|
{
|
2017-08-01 04:55:49 -07:00
|
|
|
if (compiler->control_flow_info[depth].current_block == VKD3D_BLOCK_LOOP
|
|
|
|
|| compiler->control_flow_info[depth].current_block == VKD3D_BLOCK_SWITCH)
|
2017-07-21 05:14:42 -07:00
|
|
|
return &compiler->control_flow_info[depth];
|
|
|
|
}
|
|
|
|
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2018-10-26 06:06:53 -07:00
|
|
|
static int vkd3d_dxbc_compiler_emit_control_flow_instruction(struct vkd3d_dxbc_compiler *compiler,
|
2017-06-26 08:03:31 -07:00
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
2017-07-20 04:32:40 -07:00
|
|
|
uint32_t loop_header_block_id, loop_body_block_id, continue_block_id;
|
2017-06-26 08:03:31 -07:00
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
const struct vkd3d_shader_src_param *src = instruction->src;
|
2017-10-18 10:02:46 -07:00
|
|
|
uint32_t merge_block_id, val_id, condition_id, true_label;
|
2017-07-20 04:32:40 -07:00
|
|
|
struct vkd3d_control_flow_info *cf_info;
|
|
|
|
|
|
|
|
cf_info = compiler->control_flow_depth
|
|
|
|
? &compiler->control_flow_info[compiler->control_flow_depth - 1] : NULL;
|
2017-06-26 08:03:31 -07:00
|
|
|
|
|
|
|
switch (instruction->handler_idx)
|
|
|
|
{
|
|
|
|
case VKD3DSIH_IF:
|
2017-07-21 05:14:42 -07:00
|
|
|
if (!(cf_info = vkd3d_dxbc_compiler_push_control_flow_level(compiler)))
|
2018-10-26 06:06:53 -07:00
|
|
|
return VKD3D_ERROR_OUT_OF_MEMORY;
|
2017-07-20 04:32:40 -07:00
|
|
|
|
2017-08-01 01:51:45 -07:00
|
|
|
val_id = vkd3d_dxbc_compiler_emit_load_src(compiler, src, VKD3DSP_WRITEMASK_0);
|
2017-06-29 00:02:50 -07:00
|
|
|
condition_id = vkd3d_dxbc_compiler_emit_int_to_bool(compiler, instruction->flags, 1, val_id);
|
2017-06-26 08:03:31 -07:00
|
|
|
|
|
|
|
true_label = vkd3d_spirv_alloc_id(builder);
|
|
|
|
merge_block_id = vkd3d_spirv_alloc_id(builder);
|
|
|
|
vkd3d_spirv_build_op_selection_merge(builder, merge_block_id, SpvSelectionControlMaskNone);
|
2017-10-18 10:02:46 -07:00
|
|
|
cf_info->u.if_.stream_location = vkd3d_spirv_stream_current_location(&builder->function_stream);
|
|
|
|
vkd3d_spirv_build_op_branch_conditional(builder, condition_id, true_label, merge_block_id);
|
2017-06-26 08:03:31 -07:00
|
|
|
|
|
|
|
vkd3d_spirv_build_op_label(builder, true_label);
|
|
|
|
|
2017-10-18 10:02:46 -07:00
|
|
|
cf_info->u.if_.id = compiler->branch_id;
|
2017-10-18 10:02:46 -07:00
|
|
|
cf_info->u.if_.merge_block_id = merge_block_id;
|
2017-10-18 10:02:46 -07:00
|
|
|
cf_info->u.if_.else_block_id = 0;
|
2017-10-18 10:02:46 -07:00
|
|
|
cf_info->inside_block = true;
|
2017-06-28 03:28:09 -07:00
|
|
|
cf_info->current_block = VKD3D_BLOCK_IF;
|
2017-06-26 08:03:31 -07:00
|
|
|
|
|
|
|
vkd3d_spirv_build_op_name(builder, merge_block_id, "branch%u_merge", compiler->branch_id);
|
|
|
|
vkd3d_spirv_build_op_name(builder, true_label, "branch%u_true", compiler->branch_id);
|
|
|
|
++compiler->branch_id;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case VKD3DSIH_ELSE:
|
2017-07-20 04:32:40 -07:00
|
|
|
assert(compiler->control_flow_depth);
|
2017-10-18 10:02:46 -07:00
|
|
|
assert(cf_info->current_block == VKD3D_BLOCK_IF);
|
2017-07-20 04:32:40 -07:00
|
|
|
|
2017-10-18 10:02:46 -07:00
|
|
|
if (cf_info->inside_block)
|
2017-10-18 10:02:46 -07:00
|
|
|
vkd3d_spirv_build_op_branch(builder, cf_info->u.if_.merge_block_id);
|
2017-06-26 08:03:31 -07:00
|
|
|
|
2017-10-18 10:02:46 -07:00
|
|
|
cf_info->u.if_.else_block_id = vkd3d_spirv_alloc_id(builder);
|
|
|
|
vkd3d_spirv_as_op_branch_conditional(&builder->function_stream,
|
|
|
|
cf_info->u.if_.stream_location)->false_label = cf_info->u.if_.else_block_id;
|
|
|
|
vkd3d_spirv_build_op_name(builder,
|
|
|
|
cf_info->u.if_.else_block_id, "branch%u_false", cf_info->u.if_.id);
|
|
|
|
vkd3d_spirv_build_op_label(builder, cf_info->u.if_.else_block_id);
|
2017-10-18 10:02:46 -07:00
|
|
|
cf_info->inside_block = true;
|
2017-06-26 08:03:31 -07:00
|
|
|
break;
|
|
|
|
|
|
|
|
case VKD3DSIH_ENDIF:
|
2017-07-20 04:32:40 -07:00
|
|
|
assert(compiler->control_flow_depth);
|
2017-10-18 10:02:46 -07:00
|
|
|
assert(cf_info->current_block == VKD3D_BLOCK_IF);
|
2017-06-28 03:28:09 -07:00
|
|
|
|
2017-10-18 10:02:46 -07:00
|
|
|
if (cf_info->inside_block)
|
2017-10-18 10:02:46 -07:00
|
|
|
vkd3d_spirv_build_op_branch(builder, cf_info->u.if_.merge_block_id);
|
2017-06-26 08:03:31 -07:00
|
|
|
|
2017-10-18 10:02:46 -07:00
|
|
|
vkd3d_spirv_build_op_label(builder, cf_info->u.if_.merge_block_id);
|
2017-07-20 04:32:40 -07:00
|
|
|
|
2017-07-21 05:14:42 -07:00
|
|
|
vkd3d_dxbc_compiler_pop_control_flow_level(compiler);
|
2017-07-20 04:32:40 -07:00
|
|
|
break;
|
|
|
|
|
|
|
|
case VKD3DSIH_LOOP:
|
2017-07-21 05:14:42 -07:00
|
|
|
if (!(cf_info = vkd3d_dxbc_compiler_push_control_flow_level(compiler)))
|
2018-10-26 06:06:53 -07:00
|
|
|
return VKD3D_ERROR_OUT_OF_MEMORY;
|
2017-07-20 04:32:40 -07:00
|
|
|
|
|
|
|
loop_header_block_id = vkd3d_spirv_alloc_id(builder);
|
|
|
|
loop_body_block_id = vkd3d_spirv_alloc_id(builder);
|
|
|
|
continue_block_id = vkd3d_spirv_alloc_id(builder);
|
|
|
|
merge_block_id = vkd3d_spirv_alloc_id(builder);
|
|
|
|
|
|
|
|
vkd3d_spirv_build_op_branch(builder, loop_header_block_id);
|
|
|
|
vkd3d_spirv_build_op_label(builder, loop_header_block_id);
|
|
|
|
vkd3d_spirv_build_op_loop_merge(builder, merge_block_id, continue_block_id, SpvLoopControlMaskNone);
|
|
|
|
vkd3d_spirv_build_op_branch(builder, loop_body_block_id);
|
|
|
|
|
|
|
|
vkd3d_spirv_build_op_label(builder, loop_body_block_id);
|
|
|
|
|
|
|
|
cf_info->u.loop.header_block_id = loop_header_block_id;
|
|
|
|
cf_info->u.loop.continue_block_id = continue_block_id;
|
|
|
|
cf_info->u.loop.merge_block_id = merge_block_id;
|
|
|
|
cf_info->current_block = VKD3D_BLOCK_LOOP;
|
|
|
|
|
|
|
|
vkd3d_spirv_build_op_name(builder, loop_header_block_id, "loop%u_header", compiler->loop_id);
|
|
|
|
vkd3d_spirv_build_op_name(builder, loop_body_block_id, "loop%u_body", compiler->loop_id);
|
|
|
|
vkd3d_spirv_build_op_name(builder, continue_block_id, "loop%u_continue", compiler->loop_id);
|
|
|
|
vkd3d_spirv_build_op_name(builder, merge_block_id, "loop%u_merge", compiler->loop_id);
|
|
|
|
++compiler->loop_id;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case VKD3DSIH_ENDLOOP:
|
|
|
|
assert(compiler->control_flow_depth);
|
|
|
|
assert(cf_info->current_block == VKD3D_BLOCK_LOOP);
|
|
|
|
|
|
|
|
vkd3d_spirv_build_op_branch(builder, cf_info->u.loop.continue_block_id);
|
|
|
|
|
|
|
|
vkd3d_spirv_build_op_label(builder, cf_info->u.loop.continue_block_id);
|
|
|
|
vkd3d_spirv_build_op_branch(builder, cf_info->u.loop.header_block_id);
|
|
|
|
vkd3d_spirv_build_op_label(builder, cf_info->u.loop.merge_block_id);
|
2017-06-26 08:03:31 -07:00
|
|
|
|
2017-07-21 05:14:42 -07:00
|
|
|
vkd3d_dxbc_compiler_pop_control_flow_level(compiler);
|
2017-06-26 08:03:31 -07:00
|
|
|
break;
|
|
|
|
|
2017-08-01 01:51:45 -07:00
|
|
|
case VKD3DSIH_SWITCH:
|
|
|
|
if (!(cf_info = vkd3d_dxbc_compiler_push_control_flow_level(compiler)))
|
2018-10-26 06:06:53 -07:00
|
|
|
return VKD3D_ERROR_OUT_OF_MEMORY;
|
2017-08-01 01:51:45 -07:00
|
|
|
|
|
|
|
merge_block_id = vkd3d_spirv_alloc_id(builder);
|
|
|
|
|
|
|
|
assert(src->reg.data_type == VKD3D_DATA_INT);
|
|
|
|
val_id = vkd3d_dxbc_compiler_emit_load_src(compiler, src, VKD3DSP_WRITEMASK_0);
|
|
|
|
|
|
|
|
vkd3d_spirv_build_op_selection_merge(builder, merge_block_id, SpvSelectionControlMaskNone);
|
|
|
|
|
|
|
|
cf_info->u.switch_.id = compiler->switch_id;
|
|
|
|
cf_info->u.switch_.merge_block_id = merge_block_id;
|
|
|
|
cf_info->u.switch_.stream_location = vkd3d_spirv_stream_current_location(&builder->function_stream);
|
|
|
|
cf_info->u.switch_.selector_id = val_id;
|
2017-08-01 02:38:10 -07:00
|
|
|
cf_info->u.switch_.case_blocks = NULL;
|
|
|
|
cf_info->u.switch_.case_blocks_size = 0;
|
2017-08-01 01:51:45 -07:00
|
|
|
cf_info->u.switch_.case_block_count = 0;
|
|
|
|
cf_info->u.switch_.default_block_id = 0;
|
2017-10-18 10:02:46 -07:00
|
|
|
cf_info->inside_block = false;
|
2017-08-01 01:51:45 -07:00
|
|
|
cf_info->current_block = VKD3D_BLOCK_SWITCH;
|
|
|
|
|
|
|
|
vkd3d_spirv_build_op_name(builder, merge_block_id, "switch%u_merge", compiler->switch_id);
|
|
|
|
|
|
|
|
++compiler->switch_id;
|
2018-10-26 06:06:53 -07:00
|
|
|
|
|
|
|
if (!vkd3d_array_reserve((void **)&cf_info->u.switch_.case_blocks, &cf_info->u.switch_.case_blocks_size,
|
|
|
|
10, sizeof(*cf_info->u.switch_.case_blocks)))
|
|
|
|
return VKD3D_ERROR_OUT_OF_MEMORY;
|
|
|
|
|
2017-08-01 01:51:45 -07:00
|
|
|
break;
|
|
|
|
|
|
|
|
case VKD3DSIH_ENDSWITCH:
|
|
|
|
assert(compiler->control_flow_depth);
|
|
|
|
assert(cf_info->current_block == VKD3D_BLOCK_SWITCH);
|
2017-10-18 10:02:46 -07:00
|
|
|
assert(!cf_info->inside_block);
|
2017-10-05 06:58:51 -07:00
|
|
|
|
|
|
|
if (!cf_info->u.switch_.default_block_id)
|
2017-10-20 09:27:17 -07:00
|
|
|
cf_info->u.switch_.default_block_id = cf_info->u.switch_.merge_block_id;
|
2017-08-01 01:51:45 -07:00
|
|
|
|
|
|
|
vkd3d_spirv_build_op_label(builder, cf_info->u.switch_.merge_block_id);
|
|
|
|
|
|
|
|
/* The OpSwitch instruction is inserted when the endswitch
|
|
|
|
* instruction is processed because we do not know the number
|
|
|
|
* of case statments in advance.*/
|
|
|
|
vkd3d_spirv_begin_function_stream_insertion(builder, cf_info->u.switch_.stream_location);
|
|
|
|
vkd3d_spirv_build_op_switch(builder, cf_info->u.switch_.selector_id,
|
|
|
|
cf_info->u.switch_.default_block_id, cf_info->u.switch_.case_blocks,
|
|
|
|
cf_info->u.switch_.case_block_count);
|
|
|
|
vkd3d_spirv_end_function_stream_insertion(builder);
|
|
|
|
|
2017-08-01 02:38:10 -07:00
|
|
|
vkd3d_free(cf_info->u.switch_.case_blocks);
|
2017-08-01 01:51:45 -07:00
|
|
|
vkd3d_dxbc_compiler_pop_control_flow_level(compiler);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case VKD3DSIH_CASE:
|
|
|
|
{
|
|
|
|
uint32_t label_id, value;
|
|
|
|
|
|
|
|
assert(compiler->control_flow_depth);
|
|
|
|
assert(cf_info->current_block == VKD3D_BLOCK_SWITCH);
|
|
|
|
|
2018-05-24 04:08:34 -07:00
|
|
|
assert(src->swizzle == VKD3D_NO_SWIZZLE && src->reg.type == VKD3DSPR_IMMCONST);
|
2018-05-29 03:50:32 -07:00
|
|
|
value = *src->reg.u.immconst_uint;
|
2017-08-01 01:51:45 -07:00
|
|
|
|
2017-08-01 02:38:10 -07:00
|
|
|
if (!vkd3d_array_reserve((void **)&cf_info->u.switch_.case_blocks, &cf_info->u.switch_.case_blocks_size,
|
|
|
|
2 * (cf_info->u.switch_.case_block_count + 1), sizeof(*cf_info->u.switch_.case_blocks)))
|
2018-10-26 06:06:53 -07:00
|
|
|
return VKD3D_ERROR_OUT_OF_MEMORY;
|
2017-08-01 02:38:10 -07:00
|
|
|
|
2017-08-01 01:51:45 -07:00
|
|
|
label_id = vkd3d_spirv_alloc_id(builder);
|
2017-10-18 10:02:46 -07:00
|
|
|
if (cf_info->inside_block) /* fall-through */
|
2017-08-01 04:55:49 -07:00
|
|
|
vkd3d_spirv_build_op_branch(builder, label_id);
|
2017-08-01 01:51:45 -07:00
|
|
|
|
|
|
|
cf_info->u.switch_.case_blocks[2 * cf_info->u.switch_.case_block_count + 0] = value;
|
|
|
|
cf_info->u.switch_.case_blocks[2 * cf_info->u.switch_.case_block_count + 1] = label_id;
|
|
|
|
++cf_info->u.switch_.case_block_count;
|
|
|
|
|
|
|
|
vkd3d_spirv_build_op_label(builder, label_id);
|
2017-10-18 10:02:46 -07:00
|
|
|
cf_info->inside_block = true;
|
2017-08-01 01:51:45 -07:00
|
|
|
vkd3d_spirv_build_op_name(builder, label_id, "switch%u_case%u", cf_info->u.switch_.id, value);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
case VKD3DSIH_DEFAULT:
|
|
|
|
assert(compiler->control_flow_depth);
|
|
|
|
assert(cf_info->current_block == VKD3D_BLOCK_SWITCH);
|
2017-10-20 09:27:17 -07:00
|
|
|
assert(!cf_info->u.switch_.default_block_id);
|
|
|
|
|
|
|
|
cf_info->u.switch_.default_block_id = vkd3d_spirv_alloc_id(builder);
|
|
|
|
if (cf_info->inside_block) /* fall-through */
|
|
|
|
vkd3d_spirv_build_op_branch(builder, cf_info->u.switch_.default_block_id);
|
2017-08-01 01:51:45 -07:00
|
|
|
|
2017-10-20 09:27:17 -07:00
|
|
|
vkd3d_spirv_build_op_label(builder, cf_info->u.switch_.default_block_id);
|
|
|
|
vkd3d_spirv_build_op_name(builder, cf_info->u.switch_.default_block_id,
|
|
|
|
"switch%u_default", cf_info->u.switch_.id);
|
2017-10-18 10:02:46 -07:00
|
|
|
cf_info->inside_block = true;
|
2017-08-01 01:51:45 -07:00
|
|
|
break;
|
|
|
|
|
2017-07-20 04:32:40 -07:00
|
|
|
case VKD3DSIH_BREAK:
|
|
|
|
{
|
2017-08-01 04:55:49 -07:00
|
|
|
struct vkd3d_control_flow_info *breakable_cf_info;
|
2017-08-01 04:55:49 -07:00
|
|
|
|
2018-10-26 06:06:52 -07:00
|
|
|
assert(compiler->control_flow_depth);
|
|
|
|
|
2017-08-01 04:55:49 -07:00
|
|
|
if (!(breakable_cf_info = vkd3d_dxbc_compiler_find_innermost_breakable_cf_construct(compiler)))
|
2017-07-20 04:32:40 -07:00
|
|
|
{
|
|
|
|
FIXME("Unhandled break instruction.\n");
|
2018-10-26 06:06:53 -07:00
|
|
|
return VKD3D_ERROR_INVALID_SHADER;
|
2017-07-20 04:32:40 -07:00
|
|
|
}
|
2017-07-21 05:14:42 -07:00
|
|
|
|
2017-08-01 04:55:49 -07:00
|
|
|
if (breakable_cf_info->current_block == VKD3D_BLOCK_LOOP)
|
|
|
|
{
|
|
|
|
vkd3d_spirv_build_op_branch(builder, breakable_cf_info->u.loop.merge_block_id);
|
|
|
|
}
|
|
|
|
else if (breakable_cf_info->current_block == VKD3D_BLOCK_SWITCH)
|
|
|
|
{
|
2017-10-18 10:02:46 -07:00
|
|
|
assert(breakable_cf_info->inside_block);
|
|
|
|
vkd3d_spirv_build_op_branch(builder, breakable_cf_info->u.switch_.merge_block_id);
|
2017-08-01 04:55:49 -07:00
|
|
|
}
|
2017-07-20 04:32:40 -07:00
|
|
|
|
2017-10-18 10:02:46 -07:00
|
|
|
cf_info->inside_block = false;
|
2017-07-20 04:32:40 -07:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2017-07-20 04:32:40 -07:00
|
|
|
case VKD3DSIH_BREAKP:
|
2018-09-24 01:25:22 -07:00
|
|
|
{
|
|
|
|
struct vkd3d_control_flow_info *loop_cf_info;
|
|
|
|
|
2018-10-26 06:06:52 -07:00
|
|
|
assert(compiler->control_flow_depth);
|
|
|
|
|
2018-09-24 01:25:22 -07:00
|
|
|
if (!(loop_cf_info = vkd3d_dxbc_compiler_find_innermost_loop(compiler)))
|
|
|
|
{
|
|
|
|
ERR("Invalid 'breakc' instruction outside loop.\n");
|
2018-10-26 06:06:53 -07:00
|
|
|
return VKD3D_ERROR_INVALID_SHADER;
|
2018-09-24 01:25:22 -07:00
|
|
|
}
|
2017-07-20 04:32:40 -07:00
|
|
|
|
2018-09-27 04:30:52 -07:00
|
|
|
merge_block_id = vkd3d_dxbc_compiler_emit_conditional_branch(compiler,
|
2018-09-24 01:25:22 -07:00
|
|
|
instruction, loop_cf_info->u.loop.merge_block_id);
|
2018-09-27 04:30:52 -07:00
|
|
|
vkd3d_spirv_build_op_label(builder, merge_block_id);
|
2017-07-20 04:32:40 -07:00
|
|
|
break;
|
2018-09-24 01:25:22 -07:00
|
|
|
}
|
2017-07-20 04:32:40 -07:00
|
|
|
|
2018-09-24 01:25:19 -07:00
|
|
|
case VKD3DSIH_CONTINUE:
|
|
|
|
{
|
|
|
|
struct vkd3d_control_flow_info *loop_cf_info;
|
|
|
|
|
2018-10-26 06:06:52 -07:00
|
|
|
assert(compiler->control_flow_depth);
|
|
|
|
|
2018-09-24 01:25:19 -07:00
|
|
|
if (!(loop_cf_info = vkd3d_dxbc_compiler_find_innermost_loop(compiler)))
|
|
|
|
{
|
|
|
|
ERR("Invalid 'continue' instruction outside loop.\n");
|
2018-10-26 06:06:53 -07:00
|
|
|
return VKD3D_ERROR_INVALID_SHADER;
|
2018-09-24 01:25:19 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
vkd3d_spirv_build_op_branch(builder, loop_cf_info->u.loop.continue_block_id);
|
|
|
|
|
|
|
|
cf_info->inside_block = false;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2018-09-24 01:25:20 -07:00
|
|
|
case VKD3DSIH_CONTINUEP:
|
|
|
|
{
|
|
|
|
struct vkd3d_control_flow_info *loop_cf_info;
|
|
|
|
|
|
|
|
if (!(loop_cf_info = vkd3d_dxbc_compiler_find_innermost_loop(compiler)))
|
|
|
|
{
|
|
|
|
ERR("Invalid 'continuec' instruction outside loop.\n");
|
2018-10-26 06:06:53 -07:00
|
|
|
return VKD3D_ERROR_INVALID_SHADER;
|
2018-09-24 01:25:20 -07:00
|
|
|
}
|
|
|
|
|
2018-09-27 04:30:52 -07:00
|
|
|
merge_block_id = vkd3d_dxbc_compiler_emit_conditional_branch(compiler,
|
2018-09-24 01:25:20 -07:00
|
|
|
instruction, loop_cf_info->u.loop.continue_block_id);
|
2018-09-27 04:30:52 -07:00
|
|
|
vkd3d_spirv_build_op_label(builder, merge_block_id);
|
2018-09-24 01:25:20 -07:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2017-06-28 03:28:09 -07:00
|
|
|
case VKD3DSIH_RET:
|
|
|
|
vkd3d_dxbc_compiler_emit_return(compiler, instruction);
|
|
|
|
|
2017-10-18 10:02:46 -07:00
|
|
|
if (cf_info)
|
|
|
|
cf_info->inside_block = false;
|
2017-06-28 03:28:09 -07:00
|
|
|
break;
|
|
|
|
|
2018-09-27 04:30:53 -07:00
|
|
|
case VKD3DSIH_RETP:
|
|
|
|
vkd3d_dxbc_compiler_emit_retc(compiler, instruction);
|
|
|
|
break;
|
|
|
|
|
2017-08-30 07:41:15 -07:00
|
|
|
case VKD3DSIH_TEXKILL:
|
|
|
|
vkd3d_dxbc_compiler_emit_kill(compiler, instruction);
|
|
|
|
break;
|
|
|
|
|
2017-06-26 08:03:31 -07:00
|
|
|
default:
|
|
|
|
ERR("Unexpected instruction %#x.\n", instruction->handler_idx);
|
|
|
|
break;
|
|
|
|
}
|
2018-10-26 06:06:53 -07:00
|
|
|
|
|
|
|
return VKD3D_OK;
|
2017-06-26 08:03:31 -07:00
|
|
|
}
|
|
|
|
|
2018-08-01 06:34:38 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_deriv_instruction(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
const struct vkd3d_shader_dst_param *dst = instruction->dst;
|
|
|
|
const struct vkd3d_shader_src_param *src = instruction->src;
|
|
|
|
const struct instruction_info *info;
|
|
|
|
uint32_t type_id, src_id, val_id;
|
|
|
|
unsigned int i;
|
|
|
|
|
|
|
|
static const struct instruction_info
|
|
|
|
{
|
|
|
|
enum VKD3D_SHADER_INSTRUCTION_HANDLER handler_idx;
|
|
|
|
SpvOp op;
|
|
|
|
bool needs_derivative_control;
|
|
|
|
}
|
|
|
|
deriv_instructions[] =
|
|
|
|
{
|
|
|
|
{VKD3DSIH_DSX, SpvOpDPdx},
|
|
|
|
{VKD3DSIH_DSX_COARSE, SpvOpDPdxCoarse, true},
|
|
|
|
{VKD3DSIH_DSX_FINE, SpvOpDPdxFine, true},
|
|
|
|
{VKD3DSIH_DSY, SpvOpDPdy},
|
|
|
|
{VKD3DSIH_DSY_COARSE, SpvOpDPdyCoarse, true},
|
|
|
|
{VKD3DSIH_DSY_FINE, SpvOpDPdyFine, true},
|
|
|
|
};
|
|
|
|
|
|
|
|
info = NULL;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(deriv_instructions); ++i)
|
|
|
|
{
|
|
|
|
if (deriv_instructions[i].handler_idx == instruction->handler_idx)
|
|
|
|
{
|
|
|
|
info = &deriv_instructions[i];
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (!info)
|
|
|
|
{
|
|
|
|
ERR("Unexpected instruction %#x.\n", instruction->handler_idx);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (info->needs_derivative_control)
|
|
|
|
vkd3d_spirv_enable_capability(builder, SpvCapabilityDerivativeControl);
|
|
|
|
|
|
|
|
assert(instruction->dst_count == 1);
|
|
|
|
assert(instruction->src_count == 1);
|
|
|
|
|
2018-09-05 04:45:26 -07:00
|
|
|
type_id = vkd3d_dxbc_compiler_get_type_id_for_dst(compiler, dst);
|
2018-08-01 06:34:38 -07:00
|
|
|
src_id = vkd3d_dxbc_compiler_emit_load_src(compiler, src, dst->write_mask);
|
|
|
|
val_id = vkd3d_spirv_build_op_tr1(builder, &builder->function_stream, info->op, type_id, src_id);
|
|
|
|
vkd3d_dxbc_compiler_emit_store_dst(compiler, dst, val_id);
|
|
|
|
}
|
|
|
|
|
2017-08-16 08:38:33 -07:00
|
|
|
struct vkd3d_shader_image
|
|
|
|
{
|
2017-08-21 03:41:07 -07:00
|
|
|
uint32_t id;
|
2017-08-16 08:38:33 -07:00
|
|
|
uint32_t image_id;
|
|
|
|
uint32_t sampled_image_id;
|
|
|
|
|
|
|
|
enum vkd3d_component_type sampled_type;
|
|
|
|
uint32_t image_type_id;
|
|
|
|
const struct vkd3d_spirv_resource_type *resource_type_info;
|
2017-08-22 05:53:33 -07:00
|
|
|
unsigned int structure_stride;
|
2017-08-24 06:13:38 -07:00
|
|
|
bool raw;
|
2017-08-16 08:38:33 -07:00
|
|
|
};
|
|
|
|
|
2017-08-21 03:41:07 -07:00
|
|
|
#define VKD3D_IMAGE_FLAG_NONE 0x0
|
|
|
|
#define VKD3D_IMAGE_FLAG_DEPTH 0x1
|
|
|
|
#define VKD3D_IMAGE_FLAG_NO_LOAD 0x2
|
2018-10-21 16:49:14 -07:00
|
|
|
#define VKD3D_IMAGE_FLAG_SAMPLED 0x4
|
2017-08-21 03:41:07 -07:00
|
|
|
|
2017-09-07 08:15:54 -07:00
|
|
|
static const struct vkd3d_symbol *vkd3d_dxbc_compiler_find_resource(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_register *resource_reg)
|
|
|
|
{
|
|
|
|
struct vkd3d_symbol resource_key;
|
|
|
|
struct rb_entry *entry;
|
|
|
|
|
|
|
|
vkd3d_symbol_make_resource(&resource_key, resource_reg);
|
|
|
|
entry = rb_get(&compiler->symbol_table, &resource_key);
|
|
|
|
assert(entry);
|
|
|
|
return RB_ENTRY_VALUE(entry, struct vkd3d_symbol, entry);
|
|
|
|
}
|
|
|
|
|
2018-10-21 16:49:16 -07:00
|
|
|
static const struct vkd3d_symbol *vkd3d_dxbc_compiler_find_combined_sampler(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_register *resource_reg, const struct vkd3d_shader_register *sampler_reg)
|
|
|
|
{
|
2019-01-16 03:44:59 -08:00
|
|
|
const struct vkd3d_shader_interface_info *shader_interface = &compiler->shader_interface;
|
2018-10-21 16:49:16 -07:00
|
|
|
unsigned int resource_index, sampler_index;
|
|
|
|
struct vkd3d_symbol key;
|
|
|
|
struct rb_entry *entry;
|
|
|
|
|
|
|
|
if (!shader_interface->combined_sampler_count)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
resource_index = resource_reg->idx[0].offset;
|
|
|
|
sampler_index = sampler_reg ? sampler_reg->idx[0].offset : VKD3D_DUMMY_SAMPLER_INDEX;
|
|
|
|
|
|
|
|
vkd3d_symbol_make_combined_sampler(&key, resource_index, sampler_index);
|
|
|
|
if ((entry = rb_get(&compiler->symbol_table, &key)))
|
|
|
|
return RB_ENTRY_VALUE(entry, struct vkd3d_symbol, entry);
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2017-08-16 08:38:33 -07:00
|
|
|
static void vkd3d_dxbc_compiler_prepare_image(struct vkd3d_dxbc_compiler *compiler,
|
2017-08-16 08:38:33 -07:00
|
|
|
struct vkd3d_shader_image *image, const struct vkd3d_shader_register *resource_reg,
|
2018-10-21 16:49:14 -07:00
|
|
|
const struct vkd3d_shader_register *sampler_reg, unsigned int flags)
|
2017-07-24 10:43:50 -07:00
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
2018-10-21 16:49:14 -07:00
|
|
|
uint32_t sampler_var_id, sampler_id, sampled_image_type_id;
|
2018-10-21 16:49:17 -07:00
|
|
|
const struct vkd3d_symbol *symbol = NULL;
|
|
|
|
bool load, sampled, depth_comparison;
|
2017-07-24 10:43:50 -07:00
|
|
|
|
2017-08-21 03:41:07 -07:00
|
|
|
load = !(flags & VKD3D_IMAGE_FLAG_NO_LOAD);
|
2018-10-21 16:49:17 -07:00
|
|
|
sampled = flags & VKD3D_IMAGE_FLAG_SAMPLED;
|
2017-08-21 03:41:07 -07:00
|
|
|
depth_comparison = flags & VKD3D_IMAGE_FLAG_DEPTH;
|
|
|
|
|
2018-10-21 16:49:17 -07:00
|
|
|
if (resource_reg->type == VKD3DSPR_RESOURCE)
|
|
|
|
symbol = vkd3d_dxbc_compiler_find_combined_sampler(compiler, resource_reg, sampler_reg);
|
2018-10-21 16:49:16 -07:00
|
|
|
if (!symbol)
|
|
|
|
symbol = vkd3d_dxbc_compiler_find_resource(compiler, resource_reg);
|
|
|
|
|
|
|
|
image->id = symbol->id;
|
|
|
|
image->sampled_type = symbol->info.resource.sampled_type;
|
|
|
|
image->image_type_id = symbol->info.resource.type_id;
|
|
|
|
image->resource_type_info = symbol->info.resource.resource_type_info;
|
|
|
|
image->structure_stride = symbol->info.resource.structure_stride;
|
|
|
|
image->raw = symbol->info.resource.raw;
|
2017-07-24 10:43:50 -07:00
|
|
|
|
2018-10-21 16:49:17 -07:00
|
|
|
if (symbol->type == VKD3D_SYMBOL_COMBINED_SAMPLER)
|
2018-10-21 16:49:16 -07:00
|
|
|
{
|
|
|
|
sampled_image_type_id = vkd3d_spirv_get_op_type_sampled_image(builder, image->image_type_id);
|
|
|
|
image->sampled_image_id = vkd3d_spirv_build_op_load(builder,
|
|
|
|
sampled_image_type_id, image->id, SpvMemoryAccessMaskNone);
|
2018-10-21 16:49:17 -07:00
|
|
|
image->image_id = !sampled ? vkd3d_spirv_build_op_image(builder,
|
|
|
|
image->image_type_id, image->sampled_image_id) : 0;
|
2018-10-21 16:49:16 -07:00
|
|
|
return;
|
|
|
|
}
|
2017-07-24 10:43:50 -07:00
|
|
|
|
2017-08-21 03:41:07 -07:00
|
|
|
image->image_id = load ? vkd3d_spirv_build_op_load(builder,
|
|
|
|
image->image_type_id, image->id, SpvMemoryAccessMaskNone) : 0;
|
2017-08-16 08:38:33 -07:00
|
|
|
|
|
|
|
image->image_type_id = vkd3d_dxbc_compiler_get_image_type_id(compiler,
|
2017-09-07 08:48:43 -07:00
|
|
|
resource_reg, image->resource_type_info, image->sampled_type,
|
|
|
|
image->structure_stride || image->raw, depth_comparison);
|
2017-08-16 08:38:33 -07:00
|
|
|
|
2018-10-21 16:49:17 -07:00
|
|
|
if (sampled)
|
2018-10-21 16:49:14 -07:00
|
|
|
{
|
2018-10-21 16:49:17 -07:00
|
|
|
assert(image->image_id);
|
|
|
|
|
2018-10-21 16:49:14 -07:00
|
|
|
if (sampler_reg)
|
|
|
|
sampler_var_id = vkd3d_dxbc_compiler_get_register_id(compiler, sampler_reg);
|
|
|
|
else
|
|
|
|
sampler_var_id = vkd3d_dxbc_compiler_get_dummy_sampler_id(compiler);
|
2017-08-16 04:11:52 -07:00
|
|
|
|
2018-10-21 16:49:14 -07:00
|
|
|
sampler_id = vkd3d_spirv_build_op_load(builder,
|
|
|
|
vkd3d_spirv_get_op_type_sampler(builder), sampler_var_id, SpvMemoryAccessMaskNone);
|
|
|
|
sampled_image_type_id = vkd3d_spirv_get_op_type_sampled_image(builder, image->image_type_id);
|
|
|
|
image->sampled_image_id = vkd3d_spirv_build_op_sampled_image(builder,
|
|
|
|
sampled_image_type_id, image->image_id, sampler_id);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
image->sampled_image_id = 0;
|
|
|
|
}
|
2017-08-16 04:11:52 -07:00
|
|
|
}
|
|
|
|
|
2018-09-13 02:25:57 -07:00
|
|
|
static uint32_t vkd3d_dxbc_compiler_emit_texel_offset(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction,
|
|
|
|
const struct vkd3d_spirv_resource_type *resource_type_info)
|
|
|
|
{
|
|
|
|
const struct vkd3d_shader_texel_offset *offset = &instruction->texel_offset;
|
|
|
|
unsigned int component_count = resource_type_info->offset_component_count;
|
|
|
|
int32_t data[4] = {offset->u, offset->v, offset->w, 0};
|
|
|
|
return vkd3d_dxbc_compiler_get_constant(compiler,
|
|
|
|
VKD3D_TYPE_INT, component_count, (const uint32_t *)data);
|
|
|
|
}
|
|
|
|
|
2017-08-16 04:11:52 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_ld(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
2017-09-04 09:32:40 -07:00
|
|
|
const struct vkd3d_shader_dst_param *dst = instruction->dst;
|
2017-08-16 04:11:52 -07:00
|
|
|
const struct vkd3d_shader_src_param *src = instruction->src;
|
|
|
|
uint32_t image_id, type_id, coordinate_id, val_id;
|
|
|
|
SpvImageOperandsMask operands_mask = 0;
|
|
|
|
unsigned int image_operand_count = 0;
|
2017-08-16 08:38:33 -07:00
|
|
|
struct vkd3d_shader_image image;
|
2017-08-16 04:11:52 -07:00
|
|
|
uint32_t image_operands[2];
|
|
|
|
DWORD coordinate_mask;
|
2018-10-18 05:59:46 -07:00
|
|
|
bool multisample;
|
|
|
|
|
|
|
|
multisample = instruction->handler_idx == VKD3DSIH_LD2DMS;
|
2017-08-16 04:11:52 -07:00
|
|
|
|
|
|
|
/* OpImageFetch must be used with a sampled image. */
|
2018-10-21 16:49:14 -07:00
|
|
|
vkd3d_dxbc_compiler_prepare_image(compiler, &image, &src[1].reg, NULL, VKD3D_IMAGE_FLAG_SAMPLED);
|
2017-08-16 08:38:33 -07:00
|
|
|
image_id = vkd3d_spirv_build_op_image(builder, image.image_type_id, image.sampled_image_id);
|
2017-08-16 04:11:52 -07:00
|
|
|
|
2017-08-16 08:38:33 -07:00
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, image.sampled_type, VKD3D_VEC4_SIZE);
|
|
|
|
coordinate_mask = (1u << image.resource_type_info->coordinate_component_count) - 1;
|
2017-08-16 04:11:52 -07:00
|
|
|
coordinate_id = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[0], coordinate_mask);
|
2018-10-18 05:59:46 -07:00
|
|
|
if (image.resource_type_info->resource_type != VKD3D_SHADER_RESOURCE_BUFFER && !multisample)
|
2017-08-16 04:11:52 -07:00
|
|
|
{
|
|
|
|
operands_mask |= SpvImageOperandsLodMask;
|
|
|
|
image_operands[image_operand_count++] = vkd3d_dxbc_compiler_emit_load_src(compiler,
|
|
|
|
&src[0], VKD3DSP_WRITEMASK_3);
|
|
|
|
}
|
2018-09-13 02:25:57 -07:00
|
|
|
if (vkd3d_shader_instruction_has_texel_offset(instruction))
|
|
|
|
{
|
|
|
|
operands_mask |= SpvImageOperandsConstOffsetMask;
|
|
|
|
image_operands[image_operand_count++] = vkd3d_dxbc_compiler_emit_texel_offset(compiler,
|
|
|
|
instruction, image.resource_type_info);
|
|
|
|
}
|
2018-10-18 05:59:46 -07:00
|
|
|
if (multisample)
|
|
|
|
{
|
|
|
|
operands_mask |= SpvImageOperandsSampleMask;
|
|
|
|
image_operands[image_operand_count++] = vkd3d_dxbc_compiler_emit_load_src(compiler,
|
|
|
|
&src[2], VKD3DSP_WRITEMASK_0);
|
|
|
|
}
|
|
|
|
assert(image_operand_count <= ARRAY_SIZE(image_operands));
|
2017-08-16 04:11:52 -07:00
|
|
|
val_id = vkd3d_spirv_build_op_image_fetch(builder, type_id,
|
|
|
|
image_id, coordinate_id, operands_mask, image_operands, image_operand_count);
|
|
|
|
|
2017-09-04 09:32:40 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_store_dst_swizzled(compiler,
|
|
|
|
dst, val_id, image.sampled_type, src[1].swizzle);
|
2017-08-16 04:11:52 -07:00
|
|
|
}
|
|
|
|
|
2017-07-17 07:25:29 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_sample(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
2017-09-04 09:32:40 -07:00
|
|
|
const struct vkd3d_shader_dst_param *dst = instruction->dst;
|
2017-07-17 07:25:29 -07:00
|
|
|
const struct vkd3d_shader_src_param *src = instruction->src;
|
2018-10-21 16:49:14 -07:00
|
|
|
const struct vkd3d_shader_src_param *resource, *sampler;
|
2017-08-16 08:38:33 -07:00
|
|
|
uint32_t sampled_type_id, coordinate_id, val_id;
|
2017-08-30 07:41:15 -07:00
|
|
|
SpvImageOperandsMask operands_mask = 0;
|
|
|
|
unsigned int image_operand_count = 0;
|
2017-08-16 08:38:33 -07:00
|
|
|
struct vkd3d_shader_image image;
|
2018-10-17 08:59:34 -07:00
|
|
|
uint32_t image_operands[3];
|
|
|
|
DWORD coordinate_mask;
|
2017-08-30 07:41:15 -07:00
|
|
|
SpvOp op;
|
|
|
|
|
2018-10-21 16:49:14 -07:00
|
|
|
resource = &src[1];
|
|
|
|
sampler = &src[2];
|
|
|
|
vkd3d_dxbc_compiler_prepare_image(compiler, &image,
|
|
|
|
&resource->reg, &sampler->reg, VKD3D_IMAGE_FLAG_SAMPLED);
|
2018-10-17 08:59:34 -07:00
|
|
|
|
2017-08-30 07:41:15 -07:00
|
|
|
switch (instruction->handler_idx)
|
|
|
|
{
|
|
|
|
case VKD3DSIH_SAMPLE:
|
|
|
|
op = SpvOpImageSampleImplicitLod;
|
|
|
|
break;
|
2018-10-17 08:59:35 -07:00
|
|
|
case VKD3DSIH_SAMPLE_B:
|
|
|
|
op = SpvOpImageSampleImplicitLod;
|
|
|
|
operands_mask |= SpvImageOperandsBiasMask;
|
|
|
|
image_operands[image_operand_count++] = vkd3d_dxbc_compiler_emit_load_src(compiler,
|
|
|
|
&src[3], VKD3DSP_WRITEMASK_0);
|
|
|
|
break;
|
2018-10-17 08:59:34 -07:00
|
|
|
case VKD3DSIH_SAMPLE_GRAD:
|
|
|
|
op = SpvOpImageSampleExplicitLod;
|
|
|
|
operands_mask |= SpvImageOperandsGradMask;
|
|
|
|
coordinate_mask = (1u << image.resource_type_info->offset_component_count) - 1;
|
|
|
|
image_operands[image_operand_count++] = vkd3d_dxbc_compiler_emit_load_src(compiler,
|
|
|
|
&src[3], coordinate_mask);
|
|
|
|
image_operands[image_operand_count++] = vkd3d_dxbc_compiler_emit_load_src(compiler,
|
|
|
|
&src[4], coordinate_mask);
|
|
|
|
break;
|
2017-08-30 07:41:15 -07:00
|
|
|
case VKD3DSIH_SAMPLE_LOD:
|
|
|
|
op = SpvOpImageSampleExplicitLod;
|
|
|
|
operands_mask |= SpvImageOperandsLodMask;
|
|
|
|
image_operands[image_operand_count++] = vkd3d_dxbc_compiler_emit_load_src(compiler,
|
|
|
|
&src[3], VKD3DSP_WRITEMASK_0);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
ERR("Unexpected instruction %#x.\n", instruction->handler_idx);
|
|
|
|
return;
|
|
|
|
}
|
2017-07-17 07:25:29 -07:00
|
|
|
|
2018-09-13 02:25:58 -07:00
|
|
|
if (vkd3d_shader_instruction_has_texel_offset(instruction))
|
|
|
|
{
|
|
|
|
operands_mask |= SpvImageOperandsConstOffsetMask;
|
|
|
|
image_operands[image_operand_count++] = vkd3d_dxbc_compiler_emit_texel_offset(compiler,
|
|
|
|
instruction, image.resource_type_info);
|
|
|
|
}
|
|
|
|
|
2017-08-16 08:38:33 -07:00
|
|
|
sampled_type_id = vkd3d_spirv_get_type_id(builder, image.sampled_type, VKD3D_VEC4_SIZE);
|
2017-07-17 07:25:29 -07:00
|
|
|
coordinate_id = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[0], VKD3DSP_WRITEMASK_ALL);
|
2018-10-17 08:59:34 -07:00
|
|
|
assert(image_operand_count <= ARRAY_SIZE(image_operands));
|
2017-08-30 07:41:15 -07:00
|
|
|
val_id = vkd3d_spirv_build_op_image_sample(builder, op, sampled_type_id,
|
|
|
|
image.sampled_image_id, coordinate_id, operands_mask, image_operands, image_operand_count);
|
2017-07-17 07:25:29 -07:00
|
|
|
|
2017-09-04 09:32:40 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_store_dst_swizzled(compiler,
|
2018-10-21 16:49:14 -07:00
|
|
|
dst, val_id, image.sampled_type, resource->swizzle);
|
2017-07-17 07:25:29 -07:00
|
|
|
}
|
|
|
|
|
2017-08-16 08:38:33 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_sample_c(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
2018-09-24 01:25:23 -07:00
|
|
|
uint32_t sampled_type_id, coordinate_id, dref_id, val_id, type_id;
|
2017-08-16 08:38:33 -07:00
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
2017-09-04 09:32:40 -07:00
|
|
|
const struct vkd3d_shader_dst_param *dst = instruction->dst;
|
2017-08-16 08:38:33 -07:00
|
|
|
const struct vkd3d_shader_src_param *src = instruction->src;
|
2017-08-30 07:41:15 -07:00
|
|
|
SpvImageOperandsMask operands_mask = 0;
|
|
|
|
unsigned int image_operand_count = 0;
|
2017-08-16 08:38:33 -07:00
|
|
|
struct vkd3d_shader_image image;
|
2017-08-30 07:41:15 -07:00
|
|
|
uint32_t image_operands[1];
|
|
|
|
SpvOp op;
|
2017-08-16 08:38:33 -07:00
|
|
|
|
|
|
|
if (vkd3d_shader_instruction_has_texel_offset(instruction))
|
|
|
|
FIXME("Texel offset not supported.\n");
|
|
|
|
|
2017-08-30 07:41:15 -07:00
|
|
|
if (instruction->handler_idx == VKD3DSIH_SAMPLE_C_LZ)
|
|
|
|
{
|
|
|
|
op = SpvOpImageSampleDrefExplicitLod;
|
|
|
|
operands_mask |= SpvImageOperandsLodMask;
|
|
|
|
image_operands[image_operand_count++]
|
|
|
|
= vkd3d_dxbc_compiler_get_constant_float(compiler, 0.0f);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
op = SpvOpImageSampleDrefImplicitLod;
|
|
|
|
}
|
|
|
|
|
2018-10-21 16:49:14 -07:00
|
|
|
vkd3d_dxbc_compiler_prepare_image(compiler,
|
|
|
|
&image, &src[1].reg, &src[2].reg, VKD3D_IMAGE_FLAG_SAMPLED | VKD3D_IMAGE_FLAG_DEPTH);
|
2017-12-15 06:16:19 -08:00
|
|
|
sampled_type_id = vkd3d_spirv_get_type_id(builder, image.sampled_type, 1);
|
2017-08-16 08:38:33 -07:00
|
|
|
coordinate_id = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[0], VKD3DSP_WRITEMASK_ALL);
|
2018-09-24 01:25:23 -07:00
|
|
|
dref_id = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[3], VKD3DSP_WRITEMASK_0);
|
2017-08-16 08:38:33 -07:00
|
|
|
/* XXX: Nvidia is broken and expects that the D_ref is packed together with coordinates. */
|
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_FLOAT, VKD3D_VEC4_SIZE);
|
|
|
|
coordinate_id = vkd3d_spirv_build_op_composite_insert(builder,
|
2018-09-24 01:25:23 -07:00
|
|
|
type_id, dref_id, coordinate_id, &image.resource_type_info->coordinate_component_count, 1);
|
2017-08-30 07:41:15 -07:00
|
|
|
val_id = vkd3d_spirv_build_op_image_sample_dref(builder, op, sampled_type_id,
|
2018-09-24 01:25:23 -07:00
|
|
|
image.sampled_image_id, coordinate_id, dref_id, operands_mask,
|
2017-08-30 07:41:15 -07:00
|
|
|
image_operands, image_operand_count);
|
2017-08-16 08:38:33 -07:00
|
|
|
|
2017-12-15 06:16:19 -08:00
|
|
|
vkd3d_dxbc_compiler_emit_store_dst_scalar(compiler,
|
2017-09-04 09:32:40 -07:00
|
|
|
dst, val_id, image.sampled_type, src[1].swizzle);
|
2017-08-16 08:38:33 -07:00
|
|
|
}
|
|
|
|
|
2017-09-04 03:46:52 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_gather4(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
2018-09-24 01:25:24 -07:00
|
|
|
const struct vkd3d_shader_src_param *addr, *offset, *resource, *sampler;
|
2018-09-24 01:25:23 -07:00
|
|
|
uint32_t sampled_type_id, coordinate_id, component_id, dref_id, val_id;
|
2017-09-04 03:46:52 -07:00
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
2017-09-04 09:32:40 -07:00
|
|
|
const struct vkd3d_shader_dst_param *dst = instruction->dst;
|
2017-09-04 03:46:52 -07:00
|
|
|
const struct vkd3d_shader_src_param *src = instruction->src;
|
2018-10-21 16:49:14 -07:00
|
|
|
unsigned int image_flags = VKD3D_IMAGE_FLAG_SAMPLED;
|
2017-09-04 03:46:52 -07:00
|
|
|
SpvImageOperandsMask operands_mask = 0;
|
|
|
|
unsigned int image_operand_count = 0;
|
2017-09-04 03:46:52 -07:00
|
|
|
struct vkd3d_shader_image image;
|
|
|
|
unsigned int component_idx;
|
2017-09-04 03:46:52 -07:00
|
|
|
uint32_t image_operands[1];
|
2017-09-04 03:46:52 -07:00
|
|
|
DWORD coordinate_mask;
|
2018-09-24 01:25:24 -07:00
|
|
|
bool extended_offset;
|
2017-09-04 03:46:52 -07:00
|
|
|
|
2018-09-27 04:30:54 -07:00
|
|
|
if (instruction->handler_idx == VKD3DSIH_GATHER4_C
|
|
|
|
|| instruction->handler_idx == VKD3DSIH_GATHER4_PO_C)
|
|
|
|
image_flags |= VKD3D_IMAGE_FLAG_DEPTH;
|
|
|
|
|
2018-09-24 01:25:24 -07:00
|
|
|
extended_offset = instruction->handler_idx == VKD3DSIH_GATHER4_PO
|
|
|
|
|| instruction->handler_idx == VKD3DSIH_GATHER4_PO_C;
|
|
|
|
|
|
|
|
addr = &src[0];
|
|
|
|
offset = extended_offset ? &src[1] : NULL;
|
|
|
|
resource = &src[1 + extended_offset];
|
|
|
|
sampler = &src[2 + extended_offset];
|
2017-09-04 03:46:52 -07:00
|
|
|
|
2018-10-21 16:49:14 -07:00
|
|
|
vkd3d_dxbc_compiler_prepare_image(compiler, &image,
|
2018-09-27 04:30:54 -07:00
|
|
|
&resource->reg, &sampler->reg, image_flags);
|
2017-09-04 03:46:52 -07:00
|
|
|
|
2018-09-24 01:25:24 -07:00
|
|
|
if (offset)
|
|
|
|
{
|
|
|
|
vkd3d_spirv_enable_capability(builder, SpvCapabilityImageGatherExtended);
|
|
|
|
operands_mask |= SpvImageOperandsOffsetMask;
|
|
|
|
image_operands[image_operand_count++] = vkd3d_dxbc_compiler_emit_load_src(compiler,
|
|
|
|
offset, (1u << image.resource_type_info->offset_component_count) - 1);
|
|
|
|
}
|
|
|
|
else if (vkd3d_shader_instruction_has_texel_offset(instruction))
|
2017-09-04 03:46:52 -07:00
|
|
|
{
|
|
|
|
operands_mask |= SpvImageOperandsConstOffsetMask;
|
|
|
|
image_operands[image_operand_count++] = vkd3d_dxbc_compiler_emit_texel_offset(compiler,
|
|
|
|
instruction, image.resource_type_info);
|
|
|
|
}
|
|
|
|
|
2017-09-04 03:46:52 -07:00
|
|
|
sampled_type_id = vkd3d_spirv_get_type_id(builder, image.sampled_type, VKD3D_VEC4_SIZE);
|
|
|
|
coordinate_mask = (1u << image.resource_type_info->coordinate_component_count) - 1;
|
2018-09-24 01:25:24 -07:00
|
|
|
coordinate_id = vkd3d_dxbc_compiler_emit_load_src(compiler, addr, coordinate_mask);
|
2018-09-27 04:30:54 -07:00
|
|
|
if (image_flags & VKD3D_IMAGE_FLAG_DEPTH)
|
2018-09-24 01:25:23 -07:00
|
|
|
{
|
2018-09-24 01:25:24 -07:00
|
|
|
dref_id = vkd3d_dxbc_compiler_emit_load_src(compiler,
|
|
|
|
&src[3 + extended_offset], VKD3DSP_WRITEMASK_0);
|
2018-09-24 01:25:23 -07:00
|
|
|
val_id = vkd3d_spirv_build_op_image_dref_gather(builder, sampled_type_id,
|
|
|
|
image.sampled_image_id, coordinate_id, dref_id,
|
|
|
|
operands_mask, image_operands, image_operand_count);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
component_idx = vkd3d_swizzle_get_component(sampler->swizzle, 0);
|
|
|
|
/* Nvidia driver requires signed integer type. */
|
2018-09-24 01:25:24 -07:00
|
|
|
component_id = vkd3d_dxbc_compiler_get_constant(compiler,
|
|
|
|
VKD3D_TYPE_INT, 1, &component_idx);
|
2018-09-24 01:25:23 -07:00
|
|
|
val_id = vkd3d_spirv_build_op_image_gather(builder, sampled_type_id,
|
|
|
|
image.sampled_image_id, coordinate_id, component_id,
|
|
|
|
operands_mask, image_operands, image_operand_count);
|
|
|
|
}
|
2017-09-04 03:46:52 -07:00
|
|
|
|
2017-09-04 09:32:40 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_store_dst_swizzled(compiler,
|
|
|
|
dst, val_id, image.sampled_type, resource->swizzle);
|
2017-09-04 03:46:52 -07:00
|
|
|
}
|
|
|
|
|
2017-08-24 06:13:38 -07:00
|
|
|
static uint32_t vkd3d_dxbc_compiler_emit_raw_structured_addressing(
|
|
|
|
struct vkd3d_dxbc_compiler *compiler, uint32_t type_id, unsigned int stride,
|
|
|
|
const struct vkd3d_shader_src_param *src0, DWORD src0_mask,
|
|
|
|
const struct vkd3d_shader_src_param *src1, DWORD src1_mask)
|
2017-08-21 07:30:33 -07:00
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
2017-08-24 06:13:38 -07:00
|
|
|
const struct vkd3d_shader_src_param *offset;
|
|
|
|
uint32_t structure_id = 0, offset_id;
|
|
|
|
DWORD offset_write_mask;
|
2017-08-21 07:30:33 -07:00
|
|
|
|
2017-08-24 06:13:38 -07:00
|
|
|
if (stride)
|
2017-08-21 07:30:33 -07:00
|
|
|
{
|
2017-08-24 06:13:38 -07:00
|
|
|
structure_id = vkd3d_dxbc_compiler_emit_load_src(compiler, src0, src0_mask);
|
2017-08-21 07:30:33 -07:00
|
|
|
structure_id = vkd3d_spirv_build_op_imul(builder, type_id,
|
|
|
|
structure_id, vkd3d_dxbc_compiler_get_constant_uint(compiler, stride));
|
|
|
|
}
|
2017-08-24 06:13:38 -07:00
|
|
|
offset = stride ? src1 : src0;
|
|
|
|
offset_write_mask = stride ? src1_mask : src0_mask;
|
2017-08-21 07:30:33 -07:00
|
|
|
|
2017-08-24 06:13:38 -07:00
|
|
|
offset_id = vkd3d_dxbc_compiler_emit_load_src(compiler, offset, offset_write_mask);
|
2017-08-21 07:30:33 -07:00
|
|
|
offset_id = vkd3d_spirv_build_op_shift_right_logical(builder, type_id,
|
|
|
|
offset_id, vkd3d_dxbc_compiler_get_constant_uint(compiler, 2));
|
|
|
|
|
2017-08-24 06:13:38 -07:00
|
|
|
if (structure_id)
|
2017-08-21 07:30:33 -07:00
|
|
|
return vkd3d_spirv_build_op_iadd(builder, type_id, structure_id, offset_id);
|
|
|
|
else
|
|
|
|
return offset_id;
|
|
|
|
}
|
|
|
|
|
2017-08-30 07:41:15 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_ld_raw_structured_srv_uav(struct vkd3d_dxbc_compiler *compiler,
|
2017-08-22 03:39:56 -07:00
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
uint32_t coordinate_id, type_id, val_id, image_id, texel_type_id;
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
const struct vkd3d_shader_dst_param *dst = instruction->dst;
|
|
|
|
const struct vkd3d_shader_src_param *src = instruction->src;
|
|
|
|
const struct vkd3d_shader_src_param *resource;
|
|
|
|
uint32_t base_coordinate_id, component_idx;
|
|
|
|
uint32_t constituents[VKD3D_VEC4_SIZE];
|
|
|
|
struct vkd3d_shader_image image;
|
2017-08-24 06:13:38 -07:00
|
|
|
unsigned int i, j;
|
2017-08-30 07:41:15 -07:00
|
|
|
SpvOp op;
|
2017-08-22 03:39:56 -07:00
|
|
|
|
|
|
|
resource = &src[instruction->src_count - 1];
|
|
|
|
|
2017-08-30 07:41:15 -07:00
|
|
|
if (resource->reg.type == VKD3DSPR_RESOURCE)
|
|
|
|
{
|
|
|
|
/* OpImageFetch must be used with a sampled image. */
|
|
|
|
op = SpvOpImageFetch;
|
2018-10-21 16:49:14 -07:00
|
|
|
vkd3d_dxbc_compiler_prepare_image(compiler, &image, &resource->reg, NULL, VKD3D_IMAGE_FLAG_SAMPLED);
|
2017-08-30 07:41:15 -07:00
|
|
|
image_id = vkd3d_spirv_build_op_image(builder, image.image_type_id, image.sampled_image_id);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
op = SpvOpImageRead;
|
2018-10-21 16:49:14 -07:00
|
|
|
vkd3d_dxbc_compiler_prepare_image(compiler, &image, &resource->reg, NULL, VKD3D_IMAGE_FLAG_NONE);
|
2017-08-30 07:41:15 -07:00
|
|
|
image_id = image.image_id;
|
|
|
|
}
|
2017-08-22 03:39:56 -07:00
|
|
|
|
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_UINT, 1);
|
2017-08-24 06:13:38 -07:00
|
|
|
base_coordinate_id = vkd3d_dxbc_compiler_emit_raw_structured_addressing(compiler,
|
2017-08-24 06:13:38 -07:00
|
|
|
type_id, image.structure_stride, &src[0], VKD3DSP_WRITEMASK_0, &src[1], VKD3DSP_WRITEMASK_0);
|
2017-08-22 03:39:56 -07:00
|
|
|
|
|
|
|
texel_type_id = vkd3d_spirv_get_type_id(builder, image.sampled_type, VKD3D_VEC4_SIZE);
|
2017-08-24 06:13:38 -07:00
|
|
|
for (i = 0, j = 0; i < VKD3D_VEC4_SIZE; ++i)
|
2017-08-22 03:39:56 -07:00
|
|
|
{
|
2017-08-24 06:13:38 -07:00
|
|
|
if (!(dst->write_mask & (VKD3DSP_WRITEMASK_0 << i)))
|
|
|
|
continue;
|
|
|
|
|
2017-08-22 03:39:56 -07:00
|
|
|
component_idx = vkd3d_swizzle_get_component(resource->swizzle, i);
|
2017-08-24 06:13:38 -07:00
|
|
|
coordinate_id = base_coordinate_id;
|
2017-08-22 03:39:56 -07:00
|
|
|
if (component_idx)
|
|
|
|
coordinate_id = vkd3d_spirv_build_op_iadd(builder, type_id,
|
2017-08-24 06:13:38 -07:00
|
|
|
coordinate_id, vkd3d_dxbc_compiler_get_constant_uint(compiler, component_idx));
|
2017-08-22 03:39:56 -07:00
|
|
|
|
2017-08-30 07:41:15 -07:00
|
|
|
val_id = vkd3d_spirv_build_op_tr2(builder, &builder->function_stream,
|
|
|
|
op, texel_type_id, image_id, coordinate_id);
|
2017-08-24 06:13:38 -07:00
|
|
|
constituents[j++] = vkd3d_spirv_build_op_composite_extract1(builder,
|
2017-08-24 02:11:16 -07:00
|
|
|
type_id, val_id, 0);
|
2017-08-22 03:39:56 -07:00
|
|
|
}
|
2017-08-24 06:13:38 -07:00
|
|
|
assert(dst->reg.data_type == VKD3D_DATA_UINT);
|
|
|
|
vkd3d_dxbc_compiler_emit_store_dst_components(compiler, dst, VKD3D_TYPE_UINT, constituents);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void vkd3d_dxbc_compiler_emit_ld_tgsm(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
const struct vkd3d_shader_dst_param *dst = instruction->dst;
|
|
|
|
const struct vkd3d_shader_src_param *src = instruction->src;
|
|
|
|
uint32_t coordinate_id, type_id, ptr_type_id, ptr_id;
|
|
|
|
const struct vkd3d_shader_src_param *resource;
|
|
|
|
struct vkd3d_shader_register_info reg_info;
|
|
|
|
uint32_t base_coordinate_id, component_idx;
|
|
|
|
uint32_t constituents[VKD3D_VEC4_SIZE];
|
|
|
|
unsigned int i, j;
|
|
|
|
|
|
|
|
resource = &src[instruction->src_count - 1];
|
2018-01-09 04:13:04 -08:00
|
|
|
if (!vkd3d_dxbc_compiler_get_register_info(compiler, &resource->reg, ®_info))
|
|
|
|
return;
|
|
|
|
|
2017-08-24 06:13:38 -07:00
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_UINT, 1);
|
|
|
|
ptr_type_id = vkd3d_spirv_get_op_type_pointer(builder, reg_info.storage_class, type_id);
|
|
|
|
base_coordinate_id = vkd3d_dxbc_compiler_emit_raw_structured_addressing(compiler,
|
|
|
|
type_id, reg_info.structure_stride, &src[0], VKD3DSP_WRITEMASK_0, &src[1], VKD3DSP_WRITEMASK_0);
|
|
|
|
|
|
|
|
for (i = 0, j = 0; i < VKD3D_VEC4_SIZE; ++i)
|
2017-08-22 03:39:56 -07:00
|
|
|
{
|
2017-08-24 06:13:38 -07:00
|
|
|
if (!(dst->write_mask & (VKD3DSP_WRITEMASK_0 << i)))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
component_idx = vkd3d_swizzle_get_component(resource->swizzle, i);
|
|
|
|
coordinate_id = base_coordinate_id;
|
|
|
|
if (component_idx)
|
|
|
|
coordinate_id = vkd3d_spirv_build_op_iadd(builder, type_id,
|
|
|
|
coordinate_id, vkd3d_dxbc_compiler_get_constant_uint(compiler, component_idx));
|
|
|
|
|
2019-02-01 00:42:48 -08:00
|
|
|
ptr_id = vkd3d_spirv_build_op_access_chain1(builder, ptr_type_id, reg_info.id, coordinate_id);
|
2017-08-24 06:13:38 -07:00
|
|
|
constituents[j++] = vkd3d_spirv_build_op_load(builder, type_id, ptr_id, SpvMemoryAccessMaskNone);
|
2017-08-22 03:39:56 -07:00
|
|
|
}
|
|
|
|
assert(dst->reg.data_type == VKD3D_DATA_UINT);
|
2017-08-24 06:13:38 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_store_dst_components(compiler, dst, VKD3D_TYPE_UINT, constituents);
|
2017-08-22 03:39:56 -07:00
|
|
|
}
|
|
|
|
|
2017-08-24 06:13:38 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_ld_raw_structured(struct vkd3d_dxbc_compiler *compiler,
|
2017-08-22 03:39:56 -07:00
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
enum vkd3d_shader_register_type reg_type = instruction->src[instruction->src_count - 1].reg.type;
|
|
|
|
switch (reg_type)
|
|
|
|
{
|
|
|
|
case VKD3DSPR_RESOURCE:
|
|
|
|
case VKD3DSPR_UAV:
|
2017-08-30 07:41:15 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_ld_raw_structured_srv_uav(compiler, instruction);
|
2017-08-22 03:39:56 -07:00
|
|
|
break;
|
|
|
|
case VKD3DSPR_GROUPSHAREDMEM:
|
2017-08-24 06:13:38 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_ld_tgsm(compiler, instruction);
|
2017-08-22 03:39:56 -07:00
|
|
|
break;
|
|
|
|
default:
|
2017-08-24 06:13:38 -07:00
|
|
|
ERR("Unexpected register type %#x.\n", reg_type);
|
2017-08-22 03:39:56 -07:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2017-10-24 12:26:48 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_store_uav_raw_structured(struct vkd3d_dxbc_compiler *compiler,
|
2017-08-11 04:58:04 -07:00
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
const struct vkd3d_shader_dst_param *dst = instruction->dst;
|
|
|
|
const struct vkd3d_shader_src_param *src = instruction->src;
|
2017-10-24 12:26:48 -07:00
|
|
|
uint32_t coordinate_id, type_id, val_id, texel_id;
|
2017-08-21 07:30:33 -07:00
|
|
|
const struct vkd3d_shader_src_param *texel;
|
2017-10-24 12:26:48 -07:00
|
|
|
uint32_t base_coordinate_id, component_idx;
|
2017-08-16 08:38:33 -07:00
|
|
|
struct vkd3d_shader_image image;
|
2017-10-24 12:26:48 -07:00
|
|
|
unsigned int component_count;
|
2017-08-11 04:58:04 -07:00
|
|
|
|
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_UINT, 1);
|
2018-10-21 16:49:14 -07:00
|
|
|
vkd3d_dxbc_compiler_prepare_image(compiler, &image, &dst->reg, NULL, VKD3D_IMAGE_FLAG_NONE);
|
2017-08-24 06:13:38 -07:00
|
|
|
assert((instruction->handler_idx == VKD3DSIH_STORE_STRUCTURED) != !image.structure_stride);
|
2017-08-24 06:13:38 -07:00
|
|
|
base_coordinate_id = vkd3d_dxbc_compiler_emit_raw_structured_addressing(compiler,
|
2017-08-24 06:13:38 -07:00
|
|
|
type_id, image.structure_stride, &src[0], VKD3DSP_WRITEMASK_0, &src[1], VKD3DSP_WRITEMASK_0);
|
2017-08-11 04:58:04 -07:00
|
|
|
|
2017-08-21 07:30:33 -07:00
|
|
|
texel = &src[instruction->src_count - 1];
|
|
|
|
assert(texel->reg.data_type == VKD3D_DATA_UINT);
|
|
|
|
val_id = vkd3d_dxbc_compiler_emit_load_src(compiler, texel, dst->write_mask);
|
2017-08-11 04:58:04 -07:00
|
|
|
|
|
|
|
component_count = vkd3d_write_mask_component_count(dst->write_mask);
|
|
|
|
for (component_idx = 0; component_idx < component_count; ++component_idx)
|
|
|
|
{
|
2017-10-24 12:26:48 -07:00
|
|
|
/* Mesa Vulkan drivers require the texel parameter to be a vector. */
|
2018-06-26 05:41:53 -07:00
|
|
|
texel_id = vkd3d_dxbc_compiler_emit_construct_vector(compiler,
|
|
|
|
VKD3D_TYPE_UINT, VKD3D_VEC4_SIZE, val_id, component_idx, component_count);
|
2017-08-11 04:58:04 -07:00
|
|
|
|
2017-08-24 06:13:38 -07:00
|
|
|
coordinate_id = base_coordinate_id;
|
2017-08-11 04:58:04 -07:00
|
|
|
if (component_idx)
|
|
|
|
coordinate_id = vkd3d_spirv_build_op_iadd(builder, type_id,
|
2017-08-24 06:13:38 -07:00
|
|
|
coordinate_id, vkd3d_dxbc_compiler_get_constant_uint(compiler, component_idx));
|
2017-08-11 04:58:04 -07:00
|
|
|
|
2017-08-16 08:38:33 -07:00
|
|
|
vkd3d_spirv_build_op_image_write(builder, image.image_id, coordinate_id,
|
2017-08-11 04:58:04 -07:00
|
|
|
texel_id, SpvImageOperandsMaskNone, NULL, 0);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2017-08-24 06:13:38 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_store_tgsm(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
uint32_t coordinate_id, type_id, val_id, ptr_type_id, ptr_id, data_id;
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
const struct vkd3d_shader_dst_param *dst = instruction->dst;
|
|
|
|
const struct vkd3d_shader_src_param *src = instruction->src;
|
|
|
|
uint32_t base_coordinate_id, component_idx;
|
|
|
|
const struct vkd3d_shader_src_param *data;
|
|
|
|
struct vkd3d_shader_register_info reg_info;
|
|
|
|
unsigned int component_count;
|
|
|
|
|
2018-01-09 04:13:04 -08:00
|
|
|
if (!vkd3d_dxbc_compiler_get_register_info(compiler, &dst->reg, ®_info))
|
|
|
|
return;
|
|
|
|
|
2017-08-24 06:13:38 -07:00
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_UINT, 1);
|
|
|
|
ptr_type_id = vkd3d_spirv_get_op_type_pointer(builder, reg_info.storage_class, type_id);
|
|
|
|
assert((instruction->handler_idx == VKD3DSIH_STORE_STRUCTURED) != !reg_info.structure_stride);
|
|
|
|
base_coordinate_id = vkd3d_dxbc_compiler_emit_raw_structured_addressing(compiler,
|
|
|
|
type_id, reg_info.structure_stride, &src[0], VKD3DSP_WRITEMASK_0, &src[1], VKD3DSP_WRITEMASK_0);
|
|
|
|
|
|
|
|
data = &src[instruction->src_count - 1];
|
|
|
|
assert(data->reg.data_type == VKD3D_DATA_UINT);
|
|
|
|
val_id = vkd3d_dxbc_compiler_emit_load_src(compiler, data, dst->write_mask);
|
|
|
|
|
|
|
|
component_count = vkd3d_write_mask_component_count(dst->write_mask);
|
|
|
|
for (component_idx = 0; component_idx < component_count; ++component_idx)
|
|
|
|
{
|
|
|
|
data_id = component_count > 1 ?
|
|
|
|
vkd3d_spirv_build_op_composite_extract1(builder, type_id, val_id, component_idx) : val_id;
|
|
|
|
|
|
|
|
coordinate_id = base_coordinate_id;
|
|
|
|
if (component_idx)
|
|
|
|
coordinate_id = vkd3d_spirv_build_op_iadd(builder, type_id,
|
|
|
|
coordinate_id, vkd3d_dxbc_compiler_get_constant_uint(compiler, component_idx));
|
|
|
|
|
2019-02-01 00:42:48 -08:00
|
|
|
ptr_id = vkd3d_spirv_build_op_access_chain1(builder, ptr_type_id, reg_info.id, coordinate_id);
|
2017-08-24 06:13:38 -07:00
|
|
|
vkd3d_spirv_build_op_store(builder, ptr_id, data_id, SpvMemoryAccessMaskNone);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void vkd3d_dxbc_compiler_emit_store_raw_structured(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
enum vkd3d_shader_register_type reg_type = instruction->dst[0].reg.type;
|
|
|
|
switch (reg_type)
|
|
|
|
{
|
|
|
|
case VKD3DSPR_UAV:
|
2017-10-24 12:26:48 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_store_uav_raw_structured(compiler, instruction);
|
2017-08-24 06:13:38 -07:00
|
|
|
break;
|
|
|
|
case VKD3DSPR_GROUPSHAREDMEM:
|
|
|
|
vkd3d_dxbc_compiler_emit_store_tgsm(compiler, instruction);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
ERR("Unexpected register type %#x.\n", reg_type);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2017-08-28 10:10:23 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_ld_uav_typed(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
2017-09-04 09:32:40 -07:00
|
|
|
const struct vkd3d_shader_dst_param *dst = instruction->dst;
|
2017-08-28 10:10:23 -07:00
|
|
|
const struct vkd3d_shader_src_param *src = instruction->src;
|
|
|
|
uint32_t coordinate_id, type_id, val_id;
|
|
|
|
struct vkd3d_shader_image image;
|
|
|
|
DWORD coordinate_mask;
|
|
|
|
|
2018-10-21 16:49:14 -07:00
|
|
|
vkd3d_dxbc_compiler_prepare_image(compiler, &image, &src[1].reg, NULL, VKD3D_IMAGE_FLAG_NONE);
|
2017-08-28 10:10:23 -07:00
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, image.sampled_type, VKD3D_VEC4_SIZE);
|
|
|
|
coordinate_mask = (1u << image.resource_type_info->coordinate_component_count) - 1;
|
|
|
|
coordinate_id = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[0], coordinate_mask);
|
|
|
|
|
|
|
|
val_id = vkd3d_spirv_build_op_image_read(builder, type_id,
|
|
|
|
image.image_id, coordinate_id, SpvImageOperandsMaskNone, NULL, 0);
|
|
|
|
|
2017-09-04 09:32:40 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_store_dst_swizzled(compiler,
|
|
|
|
dst, val_id, image.sampled_type, src[1].swizzle);
|
2017-08-28 10:10:23 -07:00
|
|
|
}
|
|
|
|
|
2017-07-24 10:43:50 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_store_uav_typed(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
const struct vkd3d_shader_dst_param *dst = instruction->dst;
|
|
|
|
const struct vkd3d_shader_src_param *src = instruction->src;
|
2017-08-16 08:38:33 -07:00
|
|
|
uint32_t coordinate_id, texel_id;
|
|
|
|
struct vkd3d_shader_image image;
|
2017-07-24 10:43:50 -07:00
|
|
|
DWORD coordinate_mask;
|
2017-07-24 10:43:50 -07:00
|
|
|
|
|
|
|
vkd3d_spirv_enable_capability(builder, SpvCapabilityStorageImageWriteWithoutFormat);
|
|
|
|
|
2018-10-21 16:49:14 -07:00
|
|
|
vkd3d_dxbc_compiler_prepare_image(compiler, &image, &dst->reg, NULL, VKD3D_IMAGE_FLAG_NONE);
|
2017-08-16 08:38:33 -07:00
|
|
|
coordinate_mask = (1u << image.resource_type_info->coordinate_component_count) - 1;
|
2017-07-24 10:43:50 -07:00
|
|
|
coordinate_id = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[0], coordinate_mask);
|
2019-01-15 03:09:44 -08:00
|
|
|
texel_id = vkd3d_dxbc_compiler_emit_load_src_with_type(compiler, &src[1], dst->write_mask, image.sampled_type);
|
2017-07-24 10:43:50 -07:00
|
|
|
|
2017-08-16 08:38:33 -07:00
|
|
|
vkd3d_spirv_build_op_image_write(builder, image.image_id, coordinate_id, texel_id,
|
2017-07-24 10:43:50 -07:00
|
|
|
SpvImageOperandsMaskNone, NULL, 0);
|
|
|
|
}
|
|
|
|
|
2017-09-07 08:15:54 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_uav_counter_instruction(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
const struct vkd3d_shader_dst_param *dst = instruction->dst;
|
|
|
|
const struct vkd3d_shader_src_param *src = instruction->src;
|
2018-10-17 08:59:36 -07:00
|
|
|
unsigned int memory_semantics = SpvMemorySemanticsMaskNone;
|
|
|
|
uint32_t ptr_type_id, type_id, counter_id, result_id;
|
2017-09-07 08:15:54 -07:00
|
|
|
uint32_t coordinate_id, sample_id, pointer_id;
|
|
|
|
const struct vkd3d_symbol *resource_symbol;
|
|
|
|
uint32_t operands[3];
|
|
|
|
SpvOp op;
|
|
|
|
|
|
|
|
op = instruction->handler_idx == VKD3DSIH_IMM_ATOMIC_ALLOC
|
|
|
|
? SpvOpAtomicIIncrement : SpvOpAtomicIDecrement;
|
|
|
|
|
|
|
|
resource_symbol = vkd3d_dxbc_compiler_find_resource(compiler, &src->reg);
|
2018-10-17 08:59:36 -07:00
|
|
|
counter_id = resource_symbol->info.resource.uav_counter_id;
|
|
|
|
assert(counter_id);
|
2017-09-07 08:15:54 -07:00
|
|
|
|
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_UINT, 1);
|
2018-10-17 08:59:36 -07:00
|
|
|
if (vkd3d_dxbc_compiler_is_opengl_target(compiler))
|
|
|
|
{
|
|
|
|
pointer_id = counter_id;
|
|
|
|
memory_semantics |= SpvMemorySemanticsAtomicCounterMemoryMask;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
ptr_type_id = vkd3d_spirv_get_op_type_pointer(builder, SpvStorageClassImage, type_id);
|
|
|
|
coordinate_id = sample_id = vkd3d_dxbc_compiler_get_constant_uint(compiler, 0);
|
|
|
|
pointer_id = vkd3d_spirv_build_op_image_texel_pointer(builder,
|
|
|
|
ptr_type_id, counter_id, coordinate_id, sample_id);
|
|
|
|
}
|
2017-09-07 08:15:54 -07:00
|
|
|
|
|
|
|
operands[0] = pointer_id;
|
|
|
|
operands[1] = vkd3d_dxbc_compiler_get_constant_uint(compiler, SpvScopeDevice);
|
2018-10-17 08:59:36 -07:00
|
|
|
operands[2] = vkd3d_dxbc_compiler_get_constant_uint(compiler, memory_semantics);
|
2017-09-07 08:15:54 -07:00
|
|
|
result_id = vkd3d_spirv_build_op_trv(builder, &builder->function_stream,
|
|
|
|
op, type_id, operands, ARRAY_SIZE(operands));
|
2017-10-12 04:10:26 -07:00
|
|
|
if (op == SpvOpAtomicIDecrement)
|
|
|
|
{
|
|
|
|
/* SpvOpAtomicIDecrement returns the original value. */
|
|
|
|
result_id = vkd3d_spirv_build_op_isub(builder, type_id, result_id,
|
|
|
|
vkd3d_dxbc_compiler_get_constant_uint(compiler, 1));
|
|
|
|
}
|
2017-09-07 08:15:54 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_store_dst(compiler, dst, result_id);
|
|
|
|
}
|
|
|
|
|
2017-08-24 06:13:38 -07:00
|
|
|
static SpvOp vkd3d_dxbc_compiler_map_atomic_instruction(const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
static const struct
|
|
|
|
{
|
|
|
|
enum VKD3D_SHADER_INSTRUCTION_HANDLER handler_idx;
|
|
|
|
SpvOp spirv_op;
|
|
|
|
}
|
|
|
|
atomic_ops[] =
|
|
|
|
{
|
2017-08-28 02:01:23 -07:00
|
|
|
{VKD3DSIH_ATOMIC_AND, SpvOpAtomicAnd},
|
|
|
|
{VKD3DSIH_ATOMIC_CMP_STORE, SpvOpAtomicCompareExchange},
|
|
|
|
{VKD3DSIH_ATOMIC_IADD, SpvOpAtomicIAdd},
|
|
|
|
{VKD3DSIH_ATOMIC_IMAX, SpvOpAtomicSMax},
|
|
|
|
{VKD3DSIH_ATOMIC_IMIN, SpvOpAtomicSMin},
|
|
|
|
{VKD3DSIH_ATOMIC_OR, SpvOpAtomicOr},
|
|
|
|
{VKD3DSIH_ATOMIC_UMAX, SpvOpAtomicUMax},
|
|
|
|
{VKD3DSIH_ATOMIC_UMIN, SpvOpAtomicUMin},
|
|
|
|
{VKD3DSIH_ATOMIC_XOR, SpvOpAtomicXor},
|
|
|
|
{VKD3DSIH_IMM_ATOMIC_AND, SpvOpAtomicAnd},
|
|
|
|
{VKD3DSIH_IMM_ATOMIC_CMP_EXCH, SpvOpAtomicCompareExchange},
|
|
|
|
{VKD3DSIH_IMM_ATOMIC_EXCH, SpvOpAtomicExchange},
|
|
|
|
{VKD3DSIH_IMM_ATOMIC_IADD, SpvOpAtomicIAdd},
|
|
|
|
{VKD3DSIH_IMM_ATOMIC_IMAX, SpvOpAtomicSMax},
|
|
|
|
{VKD3DSIH_IMM_ATOMIC_IMIN, SpvOpAtomicSMin},
|
|
|
|
{VKD3DSIH_IMM_ATOMIC_OR, SpvOpAtomicOr},
|
|
|
|
{VKD3DSIH_IMM_ATOMIC_UMAX, SpvOpAtomicUMax},
|
|
|
|
{VKD3DSIH_IMM_ATOMIC_UMIN, SpvOpAtomicUMin},
|
|
|
|
{VKD3DSIH_IMM_ATOMIC_XOR, SpvOpAtomicXor},
|
2017-08-24 06:13:38 -07:00
|
|
|
};
|
|
|
|
unsigned int i;
|
|
|
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE(atomic_ops); ++i)
|
|
|
|
{
|
|
|
|
if (atomic_ops[i].handler_idx == instruction->handler_idx)
|
|
|
|
return atomic_ops[i].spirv_op;
|
|
|
|
}
|
|
|
|
|
|
|
|
return SpvOpMax;
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool is_imm_atomic_instruction(enum VKD3D_SHADER_INSTRUCTION_HANDLER handler_idx)
|
|
|
|
{
|
|
|
|
return VKD3DSIH_IMM_ATOMIC_ALLOC <= handler_idx && handler_idx <= VKD3DSIH_IMM_ATOMIC_XOR;
|
|
|
|
}
|
|
|
|
|
2017-08-21 03:41:07 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_atomic_instruction(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
const struct vkd3d_shader_dst_param *dst = instruction->dst;
|
|
|
|
const struct vkd3d_shader_src_param *src = instruction->src;
|
2017-08-24 06:13:38 -07:00
|
|
|
uint32_t ptr_type_id, type_id, val_id, result_id;
|
|
|
|
const struct vkd3d_shader_dst_param *resource;
|
2017-08-24 06:13:38 -07:00
|
|
|
uint32_t coordinate_id, sample_id, pointer_id;
|
|
|
|
struct vkd3d_shader_register_info reg_info;
|
2019-01-15 03:09:44 -08:00
|
|
|
enum vkd3d_component_type component_type;
|
2017-08-21 03:41:07 -07:00
|
|
|
struct vkd3d_shader_image image;
|
2017-08-24 06:13:38 -07:00
|
|
|
unsigned int structure_stride;
|
2017-08-21 03:41:07 -07:00
|
|
|
DWORD coordinate_mask;
|
2017-08-28 02:01:23 -07:00
|
|
|
uint32_t operands[6];
|
2017-08-21 03:41:07 -07:00
|
|
|
unsigned int i = 0;
|
2017-08-24 06:13:38 -07:00
|
|
|
SpvScope scope;
|
|
|
|
bool raw;
|
2017-08-24 06:13:38 -07:00
|
|
|
SpvOp op;
|
2017-08-21 03:41:07 -07:00
|
|
|
|
2017-08-24 06:13:38 -07:00
|
|
|
resource = is_imm_atomic_instruction(instruction->handler_idx) ? &dst[1] : &dst[0];
|
|
|
|
|
|
|
|
op = vkd3d_dxbc_compiler_map_atomic_instruction(instruction);
|
|
|
|
if (op == SpvOpMax)
|
|
|
|
{
|
|
|
|
ERR("Unexpected instruction %#x.\n", instruction->handler_idx);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (resource->reg.type == VKD3DSPR_GROUPSHAREDMEM)
|
2017-08-21 03:41:07 -07:00
|
|
|
{
|
2017-08-24 06:13:38 -07:00
|
|
|
scope = SpvScopeWorkgroup;
|
|
|
|
coordinate_mask = 1u;
|
2018-01-09 04:13:04 -08:00
|
|
|
if (!vkd3d_dxbc_compiler_get_register_info(compiler, &resource->reg, ®_info))
|
|
|
|
return;
|
2017-08-24 06:13:38 -07:00
|
|
|
structure_stride = reg_info.structure_stride;
|
|
|
|
raw = !structure_stride;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
scope = SpvScopeDevice;
|
2018-10-21 16:49:14 -07:00
|
|
|
vkd3d_dxbc_compiler_prepare_image(compiler, &image, &resource->reg, NULL, VKD3D_IMAGE_FLAG_NO_LOAD);
|
2017-08-24 06:13:38 -07:00
|
|
|
coordinate_mask = (1u << image.resource_type_info->coordinate_component_count) - 1;
|
|
|
|
structure_stride = image.structure_stride;
|
|
|
|
raw = image.raw;
|
2017-08-21 03:41:07 -07:00
|
|
|
}
|
|
|
|
|
2017-08-24 06:13:38 -07:00
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_UINT, 1);
|
|
|
|
if (structure_stride || raw)
|
|
|
|
{
|
|
|
|
assert(!raw != !structure_stride);
|
|
|
|
coordinate_id = vkd3d_dxbc_compiler_emit_raw_structured_addressing(compiler,
|
|
|
|
type_id, structure_stride, &src[0], VKD3DSP_WRITEMASK_0,
|
|
|
|
&src[0], VKD3DSP_WRITEMASK_1);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
assert(resource->reg.type != VKD3DSPR_GROUPSHAREDMEM);
|
|
|
|
coordinate_id = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[0], coordinate_mask);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (resource->reg.type == VKD3DSPR_GROUPSHAREDMEM)
|
|
|
|
{
|
2019-01-15 03:09:44 -08:00
|
|
|
component_type = VKD3D_TYPE_UINT;
|
2017-08-24 06:13:38 -07:00
|
|
|
ptr_type_id = vkd3d_spirv_get_op_type_pointer(builder, reg_info.storage_class, type_id);
|
2019-02-01 00:42:48 -08:00
|
|
|
pointer_id = vkd3d_spirv_build_op_access_chain1(builder, ptr_type_id, reg_info.id, coordinate_id);
|
2017-08-24 06:13:38 -07:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2019-01-15 03:09:44 -08:00
|
|
|
component_type = image.sampled_type;
|
2017-08-24 06:13:38 -07:00
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, image.sampled_type, 1);
|
|
|
|
ptr_type_id = vkd3d_spirv_get_op_type_pointer(builder, SpvStorageClassImage, type_id);
|
|
|
|
sample_id = vkd3d_dxbc_compiler_get_constant_uint(compiler, 0);
|
|
|
|
pointer_id = vkd3d_spirv_build_op_image_texel_pointer(builder,
|
|
|
|
ptr_type_id, image.id, coordinate_id, sample_id);
|
|
|
|
}
|
2017-08-21 03:41:07 -07:00
|
|
|
|
2019-01-15 03:09:44 -08:00
|
|
|
val_id = vkd3d_dxbc_compiler_emit_load_src_with_type(compiler, &src[1], VKD3DSP_WRITEMASK_0, component_type);
|
2017-08-21 03:41:07 -07:00
|
|
|
|
2017-08-24 06:13:38 -07:00
|
|
|
operands[i++] = pointer_id;
|
|
|
|
operands[i++] = vkd3d_dxbc_compiler_get_constant_uint(compiler, scope);
|
2017-08-21 03:41:07 -07:00
|
|
|
operands[i++] = vkd3d_dxbc_compiler_get_constant_uint(compiler, SpvMemorySemanticsMaskNone);
|
2017-08-28 02:01:23 -07:00
|
|
|
if (instruction->src_count >= 3)
|
|
|
|
{
|
|
|
|
operands[i++] = vkd3d_dxbc_compiler_get_constant_uint(compiler, SpvMemorySemanticsMaskNone);
|
2019-01-15 03:09:44 -08:00
|
|
|
operands[i++] = vkd3d_dxbc_compiler_emit_load_src_with_type(compiler, &src[2], VKD3DSP_WRITEMASK_0, component_type);
|
2017-08-28 02:01:23 -07:00
|
|
|
}
|
2017-08-21 03:41:07 -07:00
|
|
|
operands[i++] = val_id;
|
2017-08-24 06:13:38 -07:00
|
|
|
result_id = vkd3d_spirv_build_op_trv(builder, &builder->function_stream,
|
|
|
|
op, type_id, operands, i);
|
|
|
|
|
|
|
|
if (is_imm_atomic_instruction(instruction->handler_idx))
|
|
|
|
vkd3d_dxbc_compiler_emit_store_dst(compiler, dst, result_id);
|
2017-08-21 03:41:07 -07:00
|
|
|
}
|
|
|
|
|
2018-10-19 07:55:48 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_bufinfo(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
const struct vkd3d_shader_dst_param *dst = instruction->dst;
|
|
|
|
const struct vkd3d_shader_src_param *src = instruction->src;
|
|
|
|
uint32_t type_id, val_id, stride_id;
|
|
|
|
struct vkd3d_shader_image image;
|
|
|
|
uint32_t constituents[2];
|
|
|
|
unsigned int write_mask;
|
|
|
|
|
|
|
|
vkd3d_spirv_enable_capability(builder, SpvCapabilityImageQuery);
|
|
|
|
|
2018-10-21 16:49:14 -07:00
|
|
|
vkd3d_dxbc_compiler_prepare_image(compiler, &image, &src->reg, NULL, VKD3D_IMAGE_FLAG_NONE);
|
2018-10-19 07:55:48 -07:00
|
|
|
|
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_UINT, 1);
|
|
|
|
val_id = vkd3d_spirv_build_op_image_query_size(builder, type_id, image.image_id);
|
|
|
|
write_mask = VKD3DSP_WRITEMASK_0;
|
|
|
|
|
|
|
|
if (image.structure_stride)
|
|
|
|
{
|
|
|
|
stride_id = vkd3d_dxbc_compiler_get_constant_uint(compiler, image.structure_stride);
|
|
|
|
constituents[0] = vkd3d_spirv_build_op_udiv(builder, type_id, val_id, stride_id);
|
|
|
|
constituents[1] = stride_id;
|
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_UINT, ARRAY_SIZE(constituents));
|
|
|
|
val_id = vkd3d_spirv_build_op_composite_construct(builder,
|
|
|
|
type_id, constituents, ARRAY_SIZE(constituents));
|
|
|
|
write_mask |= VKD3DSP_WRITEMASK_1;
|
|
|
|
}
|
|
|
|
else if (image.raw)
|
|
|
|
{
|
|
|
|
val_id = vkd3d_spirv_build_op_shift_left_logical(builder, type_id,
|
|
|
|
val_id, vkd3d_dxbc_compiler_get_constant_uint(compiler, 2));
|
|
|
|
}
|
|
|
|
|
|
|
|
val_id = vkd3d_dxbc_compiler_emit_swizzle_ext(compiler,
|
|
|
|
val_id, write_mask, VKD3D_TYPE_UINT, src->swizzle, dst->write_mask);
|
|
|
|
vkd3d_dxbc_compiler_emit_store_dst(compiler, dst, val_id);
|
|
|
|
}
|
|
|
|
|
2017-08-08 08:09:35 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_resinfo(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
const struct vkd3d_shader_dst_param *dst = instruction->dst;
|
|
|
|
const struct vkd3d_shader_src_param *src = instruction->src;
|
2017-08-16 08:38:33 -07:00
|
|
|
uint32_t type_id, lod_id, val_id, miplevel_count_id;
|
2017-08-16 04:11:52 -07:00
|
|
|
uint32_t constituents[VKD3D_VEC4_SIZE];
|
2017-08-16 08:38:33 -07:00
|
|
|
unsigned int i, size_component_count;
|
|
|
|
struct vkd3d_shader_image image;
|
2018-10-18 05:59:45 -07:00
|
|
|
bool supports_mipmaps;
|
2017-08-08 08:09:35 -07:00
|
|
|
|
|
|
|
vkd3d_spirv_enable_capability(builder, SpvCapabilityImageQuery);
|
|
|
|
|
2018-10-21 16:49:14 -07:00
|
|
|
vkd3d_dxbc_compiler_prepare_image(compiler, &image, &src[1].reg, NULL, VKD3D_IMAGE_FLAG_NONE);
|
2017-08-16 08:38:33 -07:00
|
|
|
size_component_count = image.resource_type_info->coordinate_component_count;
|
2019-01-23 03:46:48 -08:00
|
|
|
if (image.resource_type_info->dim == SpvDimCube)
|
|
|
|
--size_component_count;
|
2017-08-16 08:38:33 -07:00
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_UINT, size_component_count);
|
2017-08-08 08:09:35 -07:00
|
|
|
|
2018-10-18 05:59:45 -07:00
|
|
|
supports_mipmaps = src[1].reg.type != VKD3DSPR_UAV && !image.resource_type_info->ms;
|
|
|
|
if (supports_mipmaps)
|
2017-08-16 04:11:52 -07:00
|
|
|
{
|
|
|
|
lod_id = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[0], VKD3DSP_WRITEMASK_0);
|
2017-08-16 08:38:33 -07:00
|
|
|
val_id = vkd3d_spirv_build_op_image_query_size_lod(builder, type_id, image.image_id, lod_id);
|
2017-08-16 04:11:52 -07:00
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_UINT, 1);
|
2017-08-16 08:38:33 -07:00
|
|
|
miplevel_count_id = vkd3d_spirv_build_op_image_query_levels(builder, type_id, image.image_id);
|
2017-08-16 04:11:52 -07:00
|
|
|
}
|
2018-10-18 05:59:45 -07:00
|
|
|
else
|
2017-08-16 04:11:52 -07:00
|
|
|
{
|
2017-08-16 08:38:33 -07:00
|
|
|
val_id = vkd3d_spirv_build_op_image_query_size(builder, type_id, image.image_id);
|
2017-08-16 04:11:52 -07:00
|
|
|
/* For UAVs the returned miplevel count is always 1. */
|
|
|
|
miplevel_count_id = vkd3d_dxbc_compiler_get_constant_uint(compiler, 1);
|
|
|
|
}
|
|
|
|
|
|
|
|
constituents[0] = val_id;
|
2017-08-16 08:38:33 -07:00
|
|
|
for (i = 0; i < 3 - size_component_count; ++i)
|
2017-08-16 04:11:52 -07:00
|
|
|
constituents[i + 1] = vkd3d_dxbc_compiler_get_constant_uint(compiler, 0);
|
|
|
|
constituents[i + 1] = miplevel_count_id;
|
2017-08-08 08:09:35 -07:00
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_UINT, VKD3D_VEC4_SIZE);
|
2017-08-16 04:11:52 -07:00
|
|
|
val_id = vkd3d_spirv_build_op_composite_construct(builder,
|
|
|
|
type_id, constituents, i + 2);
|
2017-08-08 08:09:35 -07:00
|
|
|
|
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_FLOAT, VKD3D_VEC4_SIZE);
|
|
|
|
if (instruction->flags == VKD3DSI_RESINFO_UINT)
|
|
|
|
{
|
|
|
|
val_id = vkd3d_spirv_build_op_bitcast(builder, type_id, val_id);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
if (instruction->flags)
|
|
|
|
FIXME("Unhandled flags %#x.\n", instruction->flags);
|
2017-08-16 04:11:52 -07:00
|
|
|
val_id = vkd3d_spirv_build_op_convert_utof(builder, type_id, val_id);
|
2017-08-08 08:09:35 -07:00
|
|
|
}
|
2017-08-16 04:11:52 -07:00
|
|
|
val_id = vkd3d_dxbc_compiler_emit_swizzle(compiler,
|
|
|
|
val_id, VKD3D_TYPE_FLOAT, src[1].swizzle, dst->write_mask);
|
2017-08-08 08:09:35 -07:00
|
|
|
|
|
|
|
vkd3d_dxbc_compiler_emit_store_dst(compiler, dst, val_id);
|
|
|
|
}
|
|
|
|
|
2018-11-26 05:22:26 -08:00
|
|
|
static void vkd3d_dxbc_compiler_emit_sample_info(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
const struct vkd3d_shader_dst_param *dst = instruction->dst;
|
|
|
|
const struct vkd3d_shader_src_param *src = instruction->src;
|
|
|
|
uint32_t constituents[VKD3D_VEC4_SIZE];
|
|
|
|
struct vkd3d_shader_image image;
|
|
|
|
uint32_t type_id, val_id;
|
|
|
|
unsigned int i;
|
|
|
|
|
|
|
|
if (src->reg.type == VKD3DSPR_RASTERIZER)
|
|
|
|
{
|
|
|
|
FIXME("Rasterizer not supported.\n");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
vkd3d_spirv_enable_capability(builder, SpvCapabilityImageQuery);
|
|
|
|
|
|
|
|
vkd3d_dxbc_compiler_prepare_image(compiler, &image, &src->reg, NULL, VKD3D_IMAGE_FLAG_NONE);
|
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_UINT, 1);
|
|
|
|
val_id = vkd3d_spirv_build_op_image_query_samples(builder, type_id, image.image_id);
|
|
|
|
|
|
|
|
constituents[0] = val_id;
|
|
|
|
for (i = 1; i < VKD3D_VEC4_SIZE; ++i)
|
|
|
|
constituents[i] = vkd3d_dxbc_compiler_get_constant_uint(compiler, 0);
|
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_UINT, VKD3D_VEC4_SIZE);
|
|
|
|
val_id = vkd3d_spirv_build_op_composite_construct(builder, type_id, constituents, VKD3D_VEC4_SIZE);
|
|
|
|
|
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_FLOAT, VKD3D_VEC4_SIZE);
|
|
|
|
if (instruction->flags == VKD3DSI_SAMPLE_INFO_UINT)
|
|
|
|
{
|
|
|
|
val_id = vkd3d_spirv_build_op_bitcast(builder, type_id, val_id);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
if (instruction->flags)
|
|
|
|
FIXME("Unhandled flags %#x.\n", instruction->flags);
|
|
|
|
val_id = vkd3d_spirv_build_op_convert_utof(builder, type_id, val_id);
|
|
|
|
}
|
|
|
|
|
|
|
|
val_id = vkd3d_dxbc_compiler_emit_swizzle(compiler,
|
|
|
|
val_id, VKD3D_TYPE_FLOAT, src->swizzle, dst->write_mask);
|
|
|
|
|
|
|
|
vkd3d_dxbc_compiler_emit_store_dst(compiler, dst, val_id);
|
|
|
|
}
|
|
|
|
|
2017-08-24 02:11:16 -07:00
|
|
|
/* From the Vulkan spec:
|
|
|
|
*
|
|
|
|
* "Scope for execution must be limited to: * Workgroup * Subgroup"
|
|
|
|
*
|
|
|
|
* "Scope for memory must be limited to: * Device * Workgroup * Invocation"
|
|
|
|
*/
|
|
|
|
static void vkd3d_dxbc_compiler_emit_sync(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
2019-02-07 00:59:18 -08:00
|
|
|
unsigned int memory_semantics = SpvMemorySemanticsAcquireReleaseMask;
|
2017-08-24 02:11:16 -07:00
|
|
|
unsigned int flags = instruction->flags;
|
|
|
|
SpvScope execution_scope = SpvScopeMax;
|
|
|
|
SpvScope memory_scope = SpvScopeDevice;
|
|
|
|
|
|
|
|
if (flags & VKD3DSSF_GROUP_SHARED_MEMORY)
|
|
|
|
{
|
|
|
|
memory_scope = SpvScopeWorkgroup;
|
|
|
|
memory_semantics |= SpvMemorySemanticsWorkgroupMemoryMask;
|
|
|
|
flags &= ~VKD3DSSF_GROUP_SHARED_MEMORY;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (flags & VKD3DSSF_THREAD_GROUP)
|
|
|
|
{
|
|
|
|
execution_scope = SpvScopeWorkgroup;
|
|
|
|
flags &= ~VKD3DSSF_THREAD_GROUP;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (flags)
|
|
|
|
{
|
|
|
|
FIXME("Unhandled sync flags %#x.\n", flags);
|
|
|
|
memory_scope = SpvScopeDevice;
|
|
|
|
execution_scope = SpvScopeWorkgroup;
|
2018-01-25 03:04:26 -08:00
|
|
|
memory_semantics |= SpvMemorySemanticsUniformMemoryMask
|
2017-08-24 02:11:16 -07:00
|
|
|
| SpvMemorySemanticsSubgroupMemoryMask
|
|
|
|
| SpvMemorySemanticsWorkgroupMemoryMask
|
|
|
|
| SpvMemorySemanticsCrossWorkgroupMemoryMask
|
|
|
|
| SpvMemorySemanticsAtomicCounterMemoryMask
|
|
|
|
| SpvMemorySemanticsImageMemoryMask;
|
|
|
|
}
|
|
|
|
|
2019-02-07 00:59:18 -08:00
|
|
|
vkd3d_dxbc_compiler_emit_barrier(compiler, execution_scope, memory_scope, memory_semantics);
|
2017-08-24 02:11:16 -07:00
|
|
|
}
|
|
|
|
|
2018-01-11 08:03:53 -08:00
|
|
|
static void vkd3d_dxbc_compiler_emit_emit_stream(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
unsigned int stream_idx;
|
|
|
|
|
|
|
|
if (instruction->handler_idx == VKD3DSIH_EMIT_STREAM)
|
|
|
|
stream_idx = instruction->src[0].reg.idx[0].offset;
|
|
|
|
else
|
|
|
|
stream_idx = 0;
|
|
|
|
|
|
|
|
if (stream_idx)
|
|
|
|
{
|
|
|
|
FIXME("Multiple streams are not supported yet.\n");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2018-10-30 07:22:47 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_shader_epilogue_invocation(compiler);
|
2018-01-11 08:03:53 -08:00
|
|
|
vkd3d_spirv_build_op_emit_vertex(builder);
|
|
|
|
}
|
|
|
|
|
2018-02-04 14:58:23 -08:00
|
|
|
static void vkd3d_dxbc_compiler_emit_cut_stream(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
unsigned int stream_idx;
|
|
|
|
|
|
|
|
if (instruction->handler_idx == VKD3DSIH_CUT_STREAM)
|
|
|
|
stream_idx = instruction->src[0].reg.idx[0].offset;
|
|
|
|
else
|
|
|
|
stream_idx = 0;
|
|
|
|
|
|
|
|
if (stream_idx)
|
|
|
|
{
|
|
|
|
FIXME("Multiple streams are not supported yet.\n");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
vkd3d_spirv_build_op_end_primitive(builder);
|
|
|
|
}
|
|
|
|
|
2017-07-27 06:16:49 -07:00
|
|
|
/* This function is called after declarations are processed. */
|
|
|
|
static void vkd3d_dxbc_compiler_emit_main_prolog(struct vkd3d_dxbc_compiler *compiler)
|
|
|
|
{
|
2017-09-07 08:15:54 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_push_constant_buffers(compiler);
|
2017-07-27 06:16:49 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
static bool is_dcl_instruction(enum VKD3D_SHADER_INSTRUCTION_HANDLER handler_idx)
|
|
|
|
{
|
2019-01-24 06:09:22 -08:00
|
|
|
return (VKD3DSIH_DCL <= handler_idx && handler_idx <= VKD3DSIH_DCL_VERTICES_OUT)
|
|
|
|
|| handler_idx == VKD3DSIH_HS_DECLS;
|
2017-07-27 06:16:49 -07:00
|
|
|
}
|
|
|
|
|
2018-10-26 06:06:53 -07:00
|
|
|
int vkd3d_dxbc_compiler_handle_instruction(struct vkd3d_dxbc_compiler *compiler,
|
2017-06-19 09:05:53 -07:00
|
|
|
const struct vkd3d_shader_instruction *instruction)
|
|
|
|
{
|
2018-10-26 06:06:53 -07:00
|
|
|
int ret = VKD3D_OK;
|
|
|
|
|
2017-07-27 06:16:49 -07:00
|
|
|
if (!is_dcl_instruction(instruction->handler_idx) && !compiler->after_declarations_section)
|
|
|
|
{
|
|
|
|
compiler->after_declarations_section = true;
|
|
|
|
vkd3d_dxbc_compiler_emit_main_prolog(compiler);
|
|
|
|
}
|
|
|
|
|
2017-06-19 09:05:53 -07:00
|
|
|
switch (instruction->handler_idx)
|
|
|
|
{
|
2017-07-21 05:14:42 -07:00
|
|
|
case VKD3DSIH_DCL_GLOBAL_FLAGS:
|
|
|
|
vkd3d_dxbc_compiler_emit_dcl_global_flags(compiler, instruction);
|
|
|
|
break;
|
2017-06-20 04:34:44 -07:00
|
|
|
case VKD3DSIH_DCL_TEMPS:
|
|
|
|
vkd3d_dxbc_compiler_emit_dcl_temps(compiler, instruction);
|
|
|
|
break;
|
2018-08-01 06:34:39 -07:00
|
|
|
case VKD3DSIH_DCL_INDEXABLE_TEMP:
|
|
|
|
vkd3d_dxbc_compiler_emit_dcl_indexable_temp(compiler, instruction);
|
|
|
|
break;
|
2017-06-20 08:09:39 -07:00
|
|
|
case VKD3DSIH_DCL_CONSTANT_BUFFER:
|
|
|
|
vkd3d_dxbc_compiler_emit_dcl_constant_buffer(compiler, instruction);
|
|
|
|
break;
|
2017-07-11 08:23:02 -07:00
|
|
|
case VKD3DSIH_DCL_IMMEDIATE_CONSTANT_BUFFER:
|
|
|
|
vkd3d_dxbc_compiler_emit_dcl_immediate_constant_buffer(compiler, instruction);
|
|
|
|
break;
|
2017-07-14 04:44:35 -07:00
|
|
|
case VKD3DSIH_DCL_SAMPLER:
|
|
|
|
vkd3d_dxbc_compiler_emit_dcl_sampler(compiler, instruction);
|
|
|
|
break;
|
2017-07-17 07:25:29 -07:00
|
|
|
case VKD3DSIH_DCL:
|
|
|
|
vkd3d_dxbc_compiler_emit_dcl_resource(compiler, instruction);
|
|
|
|
break;
|
2017-08-22 03:39:56 -07:00
|
|
|
case VKD3DSIH_DCL_RESOURCE_RAW:
|
|
|
|
vkd3d_dxbc_compiler_emit_dcl_resource_raw(compiler, instruction);
|
|
|
|
break;
|
2017-08-11 04:58:04 -07:00
|
|
|
case VKD3DSIH_DCL_UAV_RAW:
|
|
|
|
vkd3d_dxbc_compiler_emit_dcl_uav_raw(compiler, instruction);
|
|
|
|
break;
|
2017-08-22 03:39:56 -07:00
|
|
|
case VKD3DSIH_DCL_RESOURCE_STRUCTURED:
|
|
|
|
vkd3d_dxbc_compiler_emit_dcl_resource_structured(compiler, instruction);
|
|
|
|
break;
|
2017-08-18 05:52:40 -07:00
|
|
|
case VKD3DSIH_DCL_UAV_STRUCTURED:
|
|
|
|
vkd3d_dxbc_compiler_emit_dcl_uav_structured(compiler, instruction);
|
|
|
|
break;
|
2017-07-24 10:43:50 -07:00
|
|
|
case VKD3DSIH_DCL_UAV_TYPED:
|
|
|
|
vkd3d_dxbc_compiler_emit_dcl_uav_typed(compiler, instruction);
|
|
|
|
break;
|
2017-08-24 02:11:16 -07:00
|
|
|
case VKD3DSIH_DCL_TGSM_RAW:
|
|
|
|
vkd3d_dxbc_compiler_emit_dcl_tgsm_raw(compiler, instruction);
|
|
|
|
break;
|
2017-08-24 02:11:16 -07:00
|
|
|
case VKD3DSIH_DCL_TGSM_STRUCTURED:
|
|
|
|
vkd3d_dxbc_compiler_emit_dcl_tgsm_structured(compiler, instruction);
|
|
|
|
break;
|
2017-06-20 08:09:39 -07:00
|
|
|
case VKD3DSIH_DCL_INPUT:
|
|
|
|
vkd3d_dxbc_compiler_emit_dcl_input(compiler, instruction);
|
|
|
|
break;
|
|
|
|
case VKD3DSIH_DCL_INPUT_PS:
|
|
|
|
vkd3d_dxbc_compiler_emit_dcl_input_ps(compiler, instruction);
|
|
|
|
break;
|
2017-10-31 07:44:44 -07:00
|
|
|
case VKD3DSIH_DCL_INPUT_PS_SGV:
|
2017-06-21 13:00:19 -07:00
|
|
|
case VKD3DSIH_DCL_INPUT_PS_SIV:
|
2017-10-31 07:44:44 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_dcl_input_ps_sysval(compiler, instruction);
|
2017-06-21 13:00:19 -07:00
|
|
|
break;
|
2017-06-20 08:09:39 -07:00
|
|
|
case VKD3DSIH_DCL_INPUT_SGV:
|
2018-02-04 14:58:22 -08:00
|
|
|
case VKD3DSIH_DCL_INPUT_SIV:
|
|
|
|
vkd3d_dxbc_compiler_emit_dcl_input_sysval(compiler, instruction);
|
2017-06-20 08:09:39 -07:00
|
|
|
break;
|
2017-06-20 04:34:44 -07:00
|
|
|
case VKD3DSIH_DCL_OUTPUT:
|
|
|
|
vkd3d_dxbc_compiler_emit_dcl_output(compiler, instruction);
|
|
|
|
break;
|
2017-06-20 04:34:44 -07:00
|
|
|
case VKD3DSIH_DCL_OUTPUT_SIV:
|
|
|
|
vkd3d_dxbc_compiler_emit_dcl_output_siv(compiler, instruction);
|
|
|
|
break;
|
2018-01-11 08:03:53 -08:00
|
|
|
case VKD3DSIH_DCL_STREAM:
|
|
|
|
vkd3d_dxbc_compiler_emit_dcl_stream(compiler, instruction);
|
|
|
|
break;
|
2018-01-11 08:03:51 -08:00
|
|
|
case VKD3DSIH_DCL_VERTICES_OUT:
|
2018-02-15 06:43:54 -08:00
|
|
|
case VKD3DSIH_DCL_OUTPUT_CONTROL_POINT_COUNT:
|
2018-01-11 08:03:51 -08:00
|
|
|
vkd3d_dxbc_compiler_emit_dcl_vertices_out(compiler, instruction);
|
|
|
|
break;
|
2018-01-11 08:03:55 -08:00
|
|
|
case VKD3DSIH_DCL_INPUT_PRIMITIVE:
|
|
|
|
vkd3d_dxbc_compiler_emit_dcl_input_primitive(compiler, instruction);
|
|
|
|
break;
|
2018-01-11 08:03:54 -08:00
|
|
|
case VKD3DSIH_DCL_OUTPUT_TOPOLOGY:
|
|
|
|
vkd3d_dxbc_compiler_emit_dcl_output_topology(compiler, instruction);
|
|
|
|
break;
|
2018-02-04 14:58:24 -08:00
|
|
|
case VKD3DSIH_DCL_GS_INSTANCES:
|
|
|
|
vkd3d_dxbc_compiler_emit_dcl_gs_instances(compiler, instruction);
|
|
|
|
break;
|
2018-02-06 04:03:00 -08:00
|
|
|
case VKD3DSIH_DCL_TESSELLATOR_DOMAIN:
|
|
|
|
vkd3d_dxbc_compiler_emit_dcl_tessellator_domain(compiler, instruction);
|
|
|
|
break;
|
2019-01-25 04:23:28 -08:00
|
|
|
case VKD3DSIH_DCL_TESSELLATOR_OUTPUT_PRIMITIVE:
|
|
|
|
vkd3d_dxbc_compiler_emit_dcl_tessellator_output_primitive(compiler, instruction);
|
|
|
|
break;
|
2018-02-06 04:03:01 -08:00
|
|
|
case VKD3DSIH_DCL_TESSELLATOR_PARTITIONING:
|
|
|
|
vkd3d_dxbc_compiler_emit_dcl_tessellator_partitioning(compiler, instruction);
|
|
|
|
break;
|
2017-06-19 10:49:11 -07:00
|
|
|
case VKD3DSIH_DCL_THREAD_GROUP:
|
|
|
|
vkd3d_dxbc_compiler_emit_dcl_thread_group(compiler, instruction);
|
|
|
|
break;
|
2019-02-07 00:59:15 -08:00
|
|
|
case VKD3DSIH_DCL_HS_FORK_PHASE_INSTANCE_COUNT:
|
2019-02-07 00:59:17 -08:00
|
|
|
case VKD3DSIH_DCL_HS_JOIN_PHASE_INSTANCE_COUNT:
|
|
|
|
ret = vkd3d_dxbc_compiler_emit_shader_phase_instance_count(compiler, instruction);
|
2019-02-07 00:59:15 -08:00
|
|
|
break;
|
2019-02-06 03:38:09 -08:00
|
|
|
case VKD3DSIH_HS_CONTROL_POINT_PHASE:
|
|
|
|
case VKD3DSIH_HS_FORK_PHASE:
|
|
|
|
case VKD3DSIH_HS_JOIN_PHASE:
|
|
|
|
vkd3d_dxbc_compiler_enter_shader_phase(compiler, instruction);
|
|
|
|
break;
|
2017-06-20 04:34:44 -07:00
|
|
|
case VKD3DSIH_MOV:
|
|
|
|
vkd3d_dxbc_compiler_emit_mov(compiler, instruction);
|
|
|
|
break;
|
2017-06-29 00:02:50 -07:00
|
|
|
case VKD3DSIH_MOVC:
|
|
|
|
vkd3d_dxbc_compiler_emit_movc(compiler, instruction);
|
|
|
|
break;
|
2017-07-18 04:31:46 -07:00
|
|
|
case VKD3DSIH_SWAPC:
|
|
|
|
vkd3d_dxbc_compiler_emit_swapc(compiler, instruction);
|
|
|
|
break;
|
2017-06-20 05:14:44 -07:00
|
|
|
case VKD3DSIH_ADD:
|
|
|
|
case VKD3DSIH_AND:
|
2017-06-28 03:28:09 -07:00
|
|
|
case VKD3DSIH_BFREV:
|
2017-06-29 00:02:50 -07:00
|
|
|
case VKD3DSIH_COUNTBITS:
|
2017-06-20 05:14:44 -07:00
|
|
|
case VKD3DSIH_DIV:
|
2017-06-28 03:28:09 -07:00
|
|
|
case VKD3DSIH_FTOI:
|
|
|
|
case VKD3DSIH_FTOU:
|
2017-06-27 13:21:43 -07:00
|
|
|
case VKD3DSIH_IADD:
|
2018-09-24 01:25:18 -07:00
|
|
|
case VKD3DSIH_INEG:
|
2017-06-29 00:02:50 -07:00
|
|
|
case VKD3DSIH_ISHL:
|
2017-06-29 00:02:50 -07:00
|
|
|
case VKD3DSIH_ISHR:
|
2017-06-28 03:28:09 -07:00
|
|
|
case VKD3DSIH_ITOF:
|
2017-06-20 05:14:44 -07:00
|
|
|
case VKD3DSIH_MUL:
|
2017-07-06 09:11:57 -07:00
|
|
|
case VKD3DSIH_NOT:
|
|
|
|
case VKD3DSIH_OR:
|
2017-06-28 03:28:09 -07:00
|
|
|
case VKD3DSIH_USHR:
|
2017-06-20 05:14:44 -07:00
|
|
|
case VKD3DSIH_UTOF:
|
2017-07-06 09:11:57 -07:00
|
|
|
case VKD3DSIH_XOR:
|
2017-06-20 05:14:44 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_alu_instruction(compiler, instruction);
|
|
|
|
break;
|
2017-07-19 04:51:44 -07:00
|
|
|
case VKD3DSIH_EXP:
|
2017-06-29 00:02:50 -07:00
|
|
|
case VKD3DSIH_FIRSTBIT_HI:
|
|
|
|
case VKD3DSIH_FIRSTBIT_LO:
|
|
|
|
case VKD3DSIH_FIRSTBIT_SHI:
|
2017-07-19 04:51:44 -07:00
|
|
|
case VKD3DSIH_FRC:
|
2017-07-19 04:51:44 -07:00
|
|
|
case VKD3DSIH_IMAX:
|
|
|
|
case VKD3DSIH_IMIN:
|
2017-07-19 04:51:44 -07:00
|
|
|
case VKD3DSIH_LOG:
|
2017-06-20 05:59:25 -07:00
|
|
|
case VKD3DSIH_MAD:
|
2017-06-27 13:21:43 -07:00
|
|
|
case VKD3DSIH_MAX:
|
|
|
|
case VKD3DSIH_MIN:
|
2018-08-01 06:34:34 -07:00
|
|
|
case VKD3DSIH_ROUND_NE:
|
2017-07-19 04:51:44 -07:00
|
|
|
case VKD3DSIH_ROUND_NI:
|
|
|
|
case VKD3DSIH_ROUND_PI:
|
2017-08-22 03:39:56 -07:00
|
|
|
case VKD3DSIH_ROUND_Z:
|
2017-06-20 05:59:25 -07:00
|
|
|
case VKD3DSIH_RSQ:
|
2017-06-27 13:21:43 -07:00
|
|
|
case VKD3DSIH_SQRT:
|
2017-07-19 04:51:44 -07:00
|
|
|
case VKD3DSIH_UMAX:
|
|
|
|
case VKD3DSIH_UMIN:
|
2017-06-20 05:59:25 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_ext_glsl_instruction(compiler, instruction);
|
|
|
|
break;
|
2017-06-20 08:09:39 -07:00
|
|
|
case VKD3DSIH_DP4:
|
|
|
|
case VKD3DSIH_DP3:
|
|
|
|
case VKD3DSIH_DP2:
|
|
|
|
vkd3d_dxbc_compiler_emit_dot(compiler, instruction);
|
|
|
|
break;
|
2017-07-19 04:51:44 -07:00
|
|
|
case VKD3DSIH_RCP:
|
|
|
|
vkd3d_dxbc_compiler_emit_rcp(compiler, instruction);
|
|
|
|
break;
|
2018-08-01 06:34:36 -07:00
|
|
|
case VKD3DSIH_SINCOS:
|
|
|
|
vkd3d_dxbc_compiler_emit_sincos(compiler, instruction);
|
|
|
|
break;
|
2017-07-19 04:51:44 -07:00
|
|
|
case VKD3DSIH_IMUL:
|
|
|
|
vkd3d_dxbc_compiler_emit_imul(compiler, instruction);
|
|
|
|
break;
|
2017-07-19 04:51:44 -07:00
|
|
|
case VKD3DSIH_IMAD:
|
|
|
|
vkd3d_dxbc_compiler_emit_imad(compiler, instruction);
|
|
|
|
break;
|
2017-07-21 05:14:42 -07:00
|
|
|
case VKD3DSIH_UDIV:
|
|
|
|
vkd3d_dxbc_compiler_emit_udiv(compiler, instruction);
|
|
|
|
break;
|
2017-06-26 08:03:31 -07:00
|
|
|
case VKD3DSIH_EQ:
|
2017-06-28 03:28:09 -07:00
|
|
|
case VKD3DSIH_GE:
|
2017-06-27 13:21:43 -07:00
|
|
|
case VKD3DSIH_IEQ:
|
2017-07-19 04:51:44 -07:00
|
|
|
case VKD3DSIH_IGE:
|
|
|
|
case VKD3DSIH_ILT:
|
|
|
|
case VKD3DSIH_INE:
|
2017-06-28 03:28:09 -07:00
|
|
|
case VKD3DSIH_LT:
|
2017-06-26 08:03:31 -07:00
|
|
|
case VKD3DSIH_NE:
|
2017-07-19 04:51:44 -07:00
|
|
|
case VKD3DSIH_UGE:
|
|
|
|
case VKD3DSIH_ULT:
|
2017-06-26 08:03:31 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_comparison_instruction(compiler, instruction);
|
|
|
|
break;
|
2017-06-20 08:09:39 -07:00
|
|
|
case VKD3DSIH_BFI:
|
2017-06-28 03:28:09 -07:00
|
|
|
case VKD3DSIH_IBFE:
|
|
|
|
case VKD3DSIH_UBFE:
|
2017-06-20 08:09:39 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_bitfield_instruction(compiler, instruction);
|
|
|
|
break;
|
2017-07-06 09:11:57 -07:00
|
|
|
case VKD3DSIH_F16TOF32:
|
|
|
|
vkd3d_dxbc_compiler_emit_f16tof32(compiler, instruction);
|
|
|
|
break;
|
2017-07-06 09:11:57 -07:00
|
|
|
case VKD3DSIH_F32TOF16:
|
|
|
|
vkd3d_dxbc_compiler_emit_f32tof16(compiler, instruction);
|
|
|
|
break;
|
2017-07-20 04:32:40 -07:00
|
|
|
case VKD3DSIH_BREAK:
|
2017-07-20 04:32:40 -07:00
|
|
|
case VKD3DSIH_BREAKP:
|
2017-08-01 01:51:45 -07:00
|
|
|
case VKD3DSIH_CASE:
|
2018-09-24 01:25:19 -07:00
|
|
|
case VKD3DSIH_CONTINUE:
|
2018-09-24 01:25:20 -07:00
|
|
|
case VKD3DSIH_CONTINUEP:
|
2017-08-01 01:51:45 -07:00
|
|
|
case VKD3DSIH_DEFAULT:
|
2017-06-26 08:03:31 -07:00
|
|
|
case VKD3DSIH_ELSE:
|
|
|
|
case VKD3DSIH_ENDIF:
|
2017-07-20 04:32:40 -07:00
|
|
|
case VKD3DSIH_ENDLOOP:
|
2017-08-01 01:51:45 -07:00
|
|
|
case VKD3DSIH_ENDSWITCH:
|
2017-07-20 04:32:40 -07:00
|
|
|
case VKD3DSIH_IF:
|
|
|
|
case VKD3DSIH_LOOP:
|
2017-06-19 09:05:53 -07:00
|
|
|
case VKD3DSIH_RET:
|
2018-09-27 04:30:53 -07:00
|
|
|
case VKD3DSIH_RETP:
|
2017-08-01 01:51:45 -07:00
|
|
|
case VKD3DSIH_SWITCH:
|
2017-08-30 07:41:15 -07:00
|
|
|
case VKD3DSIH_TEXKILL:
|
2018-10-26 06:06:53 -07:00
|
|
|
ret = vkd3d_dxbc_compiler_emit_control_flow_instruction(compiler, instruction);
|
2017-06-19 09:05:53 -07:00
|
|
|
break;
|
2018-08-01 06:34:38 -07:00
|
|
|
case VKD3DSIH_DSX:
|
|
|
|
case VKD3DSIH_DSX_COARSE:
|
|
|
|
case VKD3DSIH_DSX_FINE:
|
|
|
|
case VKD3DSIH_DSY:
|
|
|
|
case VKD3DSIH_DSY_COARSE:
|
|
|
|
case VKD3DSIH_DSY_FINE:
|
|
|
|
vkd3d_dxbc_compiler_emit_deriv_instruction(compiler, instruction);
|
|
|
|
break;
|
2018-10-18 05:59:46 -07:00
|
|
|
case VKD3DSIH_LD2DMS:
|
2017-08-16 04:11:52 -07:00
|
|
|
case VKD3DSIH_LD:
|
|
|
|
vkd3d_dxbc_compiler_emit_ld(compiler, instruction);
|
|
|
|
break;
|
2017-07-17 07:25:29 -07:00
|
|
|
case VKD3DSIH_SAMPLE:
|
2018-10-17 08:59:35 -07:00
|
|
|
case VKD3DSIH_SAMPLE_B:
|
2018-10-17 08:59:34 -07:00
|
|
|
case VKD3DSIH_SAMPLE_GRAD:
|
2017-08-30 07:41:15 -07:00
|
|
|
case VKD3DSIH_SAMPLE_LOD:
|
2017-07-17 07:25:29 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_sample(compiler, instruction);
|
|
|
|
break;
|
2017-08-16 08:38:33 -07:00
|
|
|
case VKD3DSIH_SAMPLE_C:
|
2017-08-30 07:41:15 -07:00
|
|
|
case VKD3DSIH_SAMPLE_C_LZ:
|
2017-08-16 08:38:33 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_sample_c(compiler, instruction);
|
|
|
|
break;
|
2017-09-04 03:46:52 -07:00
|
|
|
case VKD3DSIH_GATHER4:
|
2018-09-24 01:25:23 -07:00
|
|
|
case VKD3DSIH_GATHER4_C:
|
2018-09-24 01:25:24 -07:00
|
|
|
case VKD3DSIH_GATHER4_PO:
|
2018-09-27 04:30:54 -07:00
|
|
|
case VKD3DSIH_GATHER4_PO_C:
|
2017-09-04 03:46:52 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_gather4(compiler, instruction);
|
|
|
|
break;
|
2017-08-24 06:13:38 -07:00
|
|
|
case VKD3DSIH_LD_RAW:
|
2017-08-22 03:39:56 -07:00
|
|
|
case VKD3DSIH_LD_STRUCTURED:
|
2017-08-24 06:13:38 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_ld_raw_structured(compiler, instruction);
|
2017-08-22 03:39:56 -07:00
|
|
|
break;
|
2017-08-11 04:58:04 -07:00
|
|
|
case VKD3DSIH_STORE_RAW:
|
2017-08-21 07:30:33 -07:00
|
|
|
case VKD3DSIH_STORE_STRUCTURED:
|
|
|
|
vkd3d_dxbc_compiler_emit_store_raw_structured(compiler, instruction);
|
2017-08-28 10:10:23 -07:00
|
|
|
break;
|
|
|
|
case VKD3DSIH_LD_UAV_TYPED:
|
|
|
|
vkd3d_dxbc_compiler_emit_ld_uav_typed(compiler, instruction);
|
2017-08-11 04:58:04 -07:00
|
|
|
break;
|
2017-07-24 10:43:50 -07:00
|
|
|
case VKD3DSIH_STORE_UAV_TYPED:
|
|
|
|
vkd3d_dxbc_compiler_emit_store_uav_typed(compiler, instruction);
|
|
|
|
break;
|
2017-09-07 08:15:54 -07:00
|
|
|
case VKD3DSIH_IMM_ATOMIC_ALLOC:
|
|
|
|
case VKD3DSIH_IMM_ATOMIC_CONSUME:
|
|
|
|
vkd3d_dxbc_compiler_emit_uav_counter_instruction(compiler, instruction);
|
|
|
|
break;
|
2017-08-28 02:01:23 -07:00
|
|
|
case VKD3DSIH_ATOMIC_AND:
|
2017-08-28 02:01:23 -07:00
|
|
|
case VKD3DSIH_ATOMIC_CMP_STORE:
|
2017-08-21 03:41:07 -07:00
|
|
|
case VKD3DSIH_ATOMIC_IADD:
|
2017-08-28 02:01:23 -07:00
|
|
|
case VKD3DSIH_ATOMIC_IMAX:
|
|
|
|
case VKD3DSIH_ATOMIC_IMIN:
|
2017-08-24 08:00:16 -07:00
|
|
|
case VKD3DSIH_ATOMIC_OR:
|
2017-08-24 08:00:16 -07:00
|
|
|
case VKD3DSIH_ATOMIC_UMAX:
|
2017-08-24 08:00:16 -07:00
|
|
|
case VKD3DSIH_ATOMIC_UMIN:
|
2017-08-28 02:01:23 -07:00
|
|
|
case VKD3DSIH_ATOMIC_XOR:
|
|
|
|
case VKD3DSIH_IMM_ATOMIC_AND:
|
2017-08-28 02:01:23 -07:00
|
|
|
case VKD3DSIH_IMM_ATOMIC_CMP_EXCH:
|
2017-08-24 06:13:38 -07:00
|
|
|
case VKD3DSIH_IMM_ATOMIC_EXCH:
|
2017-08-24 08:00:16 -07:00
|
|
|
case VKD3DSIH_IMM_ATOMIC_IADD:
|
2017-08-28 02:01:23 -07:00
|
|
|
case VKD3DSIH_IMM_ATOMIC_IMAX:
|
|
|
|
case VKD3DSIH_IMM_ATOMIC_IMIN:
|
|
|
|
case VKD3DSIH_IMM_ATOMIC_OR:
|
|
|
|
case VKD3DSIH_IMM_ATOMIC_UMAX:
|
|
|
|
case VKD3DSIH_IMM_ATOMIC_UMIN:
|
|
|
|
case VKD3DSIH_IMM_ATOMIC_XOR:
|
2017-08-21 03:41:07 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_atomic_instruction(compiler, instruction);
|
|
|
|
break;
|
2018-10-19 07:55:48 -07:00
|
|
|
case VKD3DSIH_BUFINFO:
|
|
|
|
vkd3d_dxbc_compiler_emit_bufinfo(compiler, instruction);
|
|
|
|
break;
|
2017-08-08 08:09:35 -07:00
|
|
|
case VKD3DSIH_RESINFO:
|
|
|
|
vkd3d_dxbc_compiler_emit_resinfo(compiler, instruction);
|
|
|
|
break;
|
2018-11-26 05:22:26 -08:00
|
|
|
case VKD3DSIH_SAMPLE_INFO:
|
|
|
|
vkd3d_dxbc_compiler_emit_sample_info(compiler, instruction);
|
|
|
|
break;
|
2017-08-24 02:11:16 -07:00
|
|
|
case VKD3DSIH_SYNC:
|
|
|
|
vkd3d_dxbc_compiler_emit_sync(compiler, instruction);
|
|
|
|
break;
|
2018-01-11 08:03:53 -08:00
|
|
|
case VKD3DSIH_EMIT:
|
|
|
|
case VKD3DSIH_EMIT_STREAM:
|
|
|
|
vkd3d_dxbc_compiler_emit_emit_stream(compiler, instruction);
|
|
|
|
break;
|
2018-02-04 14:58:23 -08:00
|
|
|
case VKD3DSIH_CUT:
|
|
|
|
case VKD3DSIH_CUT_STREAM:
|
|
|
|
vkd3d_dxbc_compiler_emit_cut_stream(compiler, instruction);
|
|
|
|
break;
|
2019-02-06 03:38:09 -08:00
|
|
|
case VKD3DSIH_HS_DECLS:
|
2018-02-15 06:43:54 -08:00
|
|
|
case VKD3DSIH_DCL_INPUT_CONTROL_POINT_COUNT:
|
2017-10-05 06:58:51 -07:00
|
|
|
case VKD3DSIH_NOP:
|
2018-02-15 06:43:54 -08:00
|
|
|
/* nothing to do */
|
2017-10-05 06:58:51 -07:00
|
|
|
break;
|
2017-06-19 09:05:53 -07:00
|
|
|
default:
|
|
|
|
FIXME("Unhandled instruction %#x.\n", instruction->handler_idx);
|
|
|
|
}
|
2018-10-26 06:06:53 -07:00
|
|
|
|
|
|
|
return ret;
|
2017-06-19 09:05:53 -07:00
|
|
|
}
|
|
|
|
|
2018-08-01 06:34:44 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_store_shader_output(struct vkd3d_dxbc_compiler *compiler,
|
|
|
|
const struct vkd3d_shader_signature_element *output,
|
|
|
|
const struct vkd3d_shader_output_info *output_info, uint32_t val_id)
|
|
|
|
{
|
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
2018-09-05 04:45:27 -07:00
|
|
|
uint32_t type_id, zero_id, ptr_type_id, chain_id, object_id;
|
2018-09-05 04:45:29 -07:00
|
|
|
uint32_t write_mask, use_mask, uninit_mask, swizzle, mask;
|
|
|
|
uint32_t output_id, indexes[1];
|
2018-08-01 06:34:44 -07:00
|
|
|
unsigned int component_count;
|
2018-09-05 04:45:27 -07:00
|
|
|
unsigned int i, index;
|
2018-08-01 06:34:44 -07:00
|
|
|
|
|
|
|
write_mask = output->mask & 0xff;
|
|
|
|
use_mask = (output->mask >> 8) & 0xff;
|
|
|
|
swizzle = get_shader_output_swizzle(compiler, output->register_index);
|
|
|
|
val_id = vkd3d_dxbc_compiler_emit_swizzle(compiler,
|
|
|
|
val_id, VKD3D_TYPE_FLOAT, swizzle, write_mask);
|
|
|
|
|
|
|
|
component_count = vkd3d_write_mask_component_count(write_mask);
|
|
|
|
|
|
|
|
if (output_info->component_type != VKD3D_TYPE_FLOAT)
|
|
|
|
{
|
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, output_info->component_type, component_count);
|
|
|
|
val_id = vkd3d_spirv_build_op_bitcast(builder, type_id, val_id);
|
|
|
|
}
|
|
|
|
|
|
|
|
uninit_mask = write_mask & use_mask;
|
|
|
|
if (uninit_mask)
|
|
|
|
{
|
|
|
|
/* Set values to 0 for not initialized shader output components. */
|
|
|
|
zero_id = vkd3d_dxbc_compiler_get_constant_vector(compiler,
|
|
|
|
output_info->component_type, VKD3D_VEC4_SIZE, 0);
|
|
|
|
val_id = vkd3d_dxbc_compiler_emit_vector_shuffle(compiler,
|
|
|
|
val_id, zero_id, uninit_mask, output_info->component_type, component_count);
|
|
|
|
}
|
|
|
|
|
2018-09-05 04:45:27 -07:00
|
|
|
output_id = output_info->id;
|
|
|
|
|
2018-09-05 04:45:29 -07:00
|
|
|
if (!output_info->array_element_mask)
|
2018-09-05 04:45:27 -07:00
|
|
|
{
|
|
|
|
vkd3d_spirv_build_op_store(builder, output_id, val_id, SpvMemoryAccessMaskNone);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_FLOAT, 1);
|
|
|
|
ptr_type_id = vkd3d_spirv_get_op_type_pointer(builder, SpvStorageClassOutput, type_id);
|
2018-09-05 04:45:29 -07:00
|
|
|
mask = output_info->array_element_mask;
|
|
|
|
mask &= (1u << (output->semantic_index * VKD3D_VEC4_SIZE)) - 1;
|
|
|
|
for (i = 0, index = vkd3d_popcount(mask); i < VKD3D_VEC4_SIZE; ++i)
|
2018-09-05 04:45:27 -07:00
|
|
|
{
|
2018-09-05 04:45:29 -07:00
|
|
|
if (!(write_mask & (VKD3DSP_WRITEMASK_0 << i)))
|
|
|
|
continue;
|
2018-09-05 04:45:27 -07:00
|
|
|
|
2018-09-05 04:45:29 -07:00
|
|
|
indexes[0] = vkd3d_dxbc_compiler_get_constant_uint(compiler, index++);
|
2018-09-05 04:45:27 -07:00
|
|
|
chain_id = vkd3d_spirv_build_op_access_chain(builder, ptr_type_id,
|
|
|
|
output_id, indexes, ARRAY_SIZE(indexes));
|
|
|
|
object_id = vkd3d_dxbc_compiler_emit_swizzle_ext(compiler, val_id,
|
|
|
|
write_mask, output_info->component_type, VKD3D_NO_SWIZZLE, VKD3DSP_WRITEMASK_0 << i);
|
|
|
|
vkd3d_spirv_build_op_store(builder, chain_id, object_id, SpvMemoryAccessMaskNone);
|
|
|
|
}
|
2018-08-01 06:34:44 -07:00
|
|
|
}
|
|
|
|
|
2018-10-30 07:22:47 -07:00
|
|
|
static void vkd3d_dxbc_compiler_emit_shader_epilogue_function(struct vkd3d_dxbc_compiler *compiler)
|
2017-07-10 06:33:34 -07:00
|
|
|
{
|
2017-10-25 13:55:39 -07:00
|
|
|
uint32_t param_type_id[MAX_REG_OUTPUT + 1], param_id[MAX_REG_OUTPUT + 1] = {};
|
2017-07-10 06:33:34 -07:00
|
|
|
const struct vkd3d_shader_signature *signature = compiler->output_signature;
|
2018-08-01 06:34:44 -07:00
|
|
|
uint32_t void_id, type_id, ptr_type_id, function_type_id, function_id;
|
2017-07-10 06:33:34 -07:00
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
unsigned int i, count;
|
2018-08-01 06:34:44 -07:00
|
|
|
DWORD variable_idx;
|
2017-07-10 06:33:34 -07:00
|
|
|
|
2018-11-08 08:19:31 -08:00
|
|
|
STATIC_ASSERT(ARRAY_SIZE(compiler->private_output_variable) == ARRAY_SIZE(param_id));
|
|
|
|
STATIC_ASSERT(ARRAY_SIZE(compiler->private_output_variable) == ARRAY_SIZE(param_type_id));
|
2017-07-10 06:33:34 -07:00
|
|
|
|
2018-11-08 08:19:31 -08:00
|
|
|
function_id = compiler->epilogue_function_id;
|
2017-10-25 13:55:39 -07:00
|
|
|
|
2017-07-17 09:12:02 -07:00
|
|
|
void_id = vkd3d_spirv_get_op_type_void(builder);
|
2017-07-10 06:33:34 -07:00
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_FLOAT, 4);
|
2017-07-17 09:12:02 -07:00
|
|
|
ptr_type_id = vkd3d_spirv_get_op_type_pointer(builder, SpvStorageClassPrivate, type_id);
|
2017-07-10 06:33:34 -07:00
|
|
|
for (i = 0, count = 0; i < ARRAY_SIZE(compiler->private_output_variable); ++i)
|
|
|
|
{
|
|
|
|
if (compiler->private_output_variable[i])
|
|
|
|
param_type_id[count++] = ptr_type_id;
|
|
|
|
}
|
2019-02-06 03:38:08 -08:00
|
|
|
function_type_id = vkd3d_spirv_get_op_type_function(builder, void_id, param_type_id, count);
|
2017-07-10 06:33:34 -07:00
|
|
|
|
|
|
|
vkd3d_spirv_build_op_function(builder, void_id, function_id,
|
|
|
|
SpvFunctionControlMaskNone, function_type_id);
|
2018-10-30 07:22:47 -07:00
|
|
|
vkd3d_spirv_build_op_name(builder, function_id, "epilogue");
|
2017-07-10 06:33:34 -07:00
|
|
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE(compiler->private_output_variable); ++i)
|
|
|
|
{
|
|
|
|
if (compiler->private_output_variable[i])
|
|
|
|
param_id[i] = vkd3d_spirv_build_op_function_parameter(builder, ptr_type_id);
|
|
|
|
}
|
|
|
|
|
|
|
|
vkd3d_spirv_build_op_label(builder, vkd3d_spirv_alloc_id(builder));
|
|
|
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE(compiler->private_output_variable); ++i)
|
|
|
|
{
|
|
|
|
if (compiler->private_output_variable[i])
|
|
|
|
param_id[i] = vkd3d_spirv_build_op_load(builder, type_id, param_id[i], SpvMemoryAccessMaskNone);
|
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < signature->element_count; ++i)
|
|
|
|
{
|
2017-08-18 05:52:40 -07:00
|
|
|
variable_idx = vkd3d_dxbc_compiler_get_output_variable_index(compiler,
|
2017-09-11 13:35:16 -07:00
|
|
|
signature->elements[i].register_index);
|
2017-07-10 06:33:34 -07:00
|
|
|
|
2017-08-18 05:52:40 -07:00
|
|
|
if (!param_id[variable_idx])
|
2017-07-10 06:33:34 -07:00
|
|
|
continue;
|
|
|
|
|
2018-08-01 06:34:44 -07:00
|
|
|
vkd3d_dxbc_compiler_emit_store_shader_output(compiler,
|
|
|
|
&signature->elements[i], &compiler->output_info[i], param_id[variable_idx]);
|
2017-07-10 06:33:34 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
vkd3d_spirv_build_op_return(&compiler->spirv_builder);
|
|
|
|
vkd3d_spirv_build_op_function_end(builder);
|
|
|
|
}
|
|
|
|
|
2018-02-15 06:43:52 -08:00
|
|
|
int vkd3d_dxbc_compiler_generate_spirv(struct vkd3d_dxbc_compiler *compiler,
|
2017-06-19 09:05:53 -07:00
|
|
|
struct vkd3d_shader_code *spirv)
|
|
|
|
{
|
2017-06-27 13:21:43 -07:00
|
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
|
|
|
2017-07-10 06:33:34 -07:00
|
|
|
vkd3d_spirv_build_op_function_end(builder);
|
|
|
|
|
2019-02-06 03:38:09 -08:00
|
|
|
if (compiler->shader_type == VKD3D_SHADER_TYPE_HULL)
|
|
|
|
vkd3d_dxbc_compiler_emit_hull_shader_main(compiler);
|
|
|
|
|
2018-10-30 07:22:47 -07:00
|
|
|
if (compiler->epilogue_function_id)
|
|
|
|
vkd3d_dxbc_compiler_emit_shader_epilogue_function(compiler);
|
2017-07-10 06:33:34 -07:00
|
|
|
|
2018-08-17 00:57:03 -07:00
|
|
|
if (compiler->options & VKD3D_SHADER_STRIP_DEBUG)
|
|
|
|
vkd3d_spirv_stream_clear(&builder->debug_stream);
|
|
|
|
|
2017-06-27 13:21:43 -07:00
|
|
|
if (!vkd3d_spirv_compile_module(builder, spirv))
|
2018-02-15 06:43:52 -08:00
|
|
|
return VKD3D_ERROR;
|
2017-06-19 09:05:53 -07:00
|
|
|
|
|
|
|
if (TRACE_ON())
|
|
|
|
{
|
2018-10-11 06:33:34 -07:00
|
|
|
enum vkd3d_shader_target target = vkd3d_dxbc_compiler_get_target(compiler);
|
|
|
|
vkd3d_spirv_dump(spirv, target);
|
|
|
|
vkd3d_spirv_validate(spirv, target);
|
2017-06-19 09:05:53 -07:00
|
|
|
}
|
|
|
|
|
2018-02-15 06:43:52 -08:00
|
|
|
return VKD3D_OK;
|
2017-06-19 09:05:53 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
void vkd3d_dxbc_compiler_destroy(struct vkd3d_dxbc_compiler *compiler)
|
|
|
|
{
|
2017-07-20 04:32:40 -07:00
|
|
|
vkd3d_free(compiler->control_flow_info);
|
|
|
|
|
2017-07-10 06:33:34 -07:00
|
|
|
vkd3d_free(compiler->output_info);
|
|
|
|
|
2017-07-28 03:56:18 -07:00
|
|
|
vkd3d_free(compiler->push_constants);
|
|
|
|
|
2017-06-19 09:05:53 -07:00
|
|
|
vkd3d_spirv_builder_free(&compiler->spirv_builder);
|
|
|
|
|
2017-06-20 04:34:44 -07:00
|
|
|
rb_destroy(&compiler->symbol_table, vkd3d_symbol_free, NULL);
|
|
|
|
|
2019-02-06 03:38:09 -08:00
|
|
|
vkd3d_free(compiler->shader_phases);
|
|
|
|
|
2017-06-19 09:05:53 -07:00
|
|
|
vkd3d_free(compiler);
|
|
|
|
}
|