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libs/vkd3d-shader: Translate bitfield instructions.
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@ -1751,15 +1751,16 @@ static SpvOp vkd3d_dxbc_compiler_map_alu_instruction(const struct vkd3d_shader_i
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}
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alu_ops[] =
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{
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{VKD3DSIH_ADD, SpvOpFAdd},
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{VKD3DSIH_AND, SpvOpBitwiseAnd},
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{VKD3DSIH_DIV, SpvOpFDiv},
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{VKD3DSIH_FTOI, SpvOpConvertFToS},
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{VKD3DSIH_FTOU, SpvOpConvertFToU},
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{VKD3DSIH_IADD, SpvOpIAdd},
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{VKD3DSIH_ITOF, SpvOpConvertSToF},
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{VKD3DSIH_MUL, SpvOpFMul},
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{VKD3DSIH_UTOF, SpvOpConvertUToF},
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{VKD3DSIH_ADD, SpvOpFAdd},
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{VKD3DSIH_AND, SpvOpBitwiseAnd},
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{VKD3DSIH_BFREV, SpvOpBitReverse},
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{VKD3DSIH_DIV, SpvOpFDiv},
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{VKD3DSIH_FTOI, SpvOpConvertFToS},
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{VKD3DSIH_FTOU, SpvOpConvertFToU},
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{VKD3DSIH_IADD, SpvOpIAdd},
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{VKD3DSIH_ITOF, SpvOpConvertSToF},
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{VKD3DSIH_MUL, SpvOpFMul},
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{VKD3DSIH_UTOF, SpvOpConvertUToF},
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};
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unsigned int i;
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@ -1964,7 +1965,15 @@ static void vkd3d_dxbc_compiler_emit_bitfield_instruction(struct vkd3d_dxbc_comp
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type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_UINT, 1);
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mask_id = vkd3d_dxbc_compiler_get_constant_uint(compiler, 0x1f);
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op = SpvOpBitFieldInsert;
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switch (instruction->handler_idx)
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{
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case VKD3DSIH_BFI: op = SpvOpBitFieldInsert; break;
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case VKD3DSIH_IBFE: op = SpvOpBitFieldSExtract; break;
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case VKD3DSIH_UBFE: op = SpvOpBitFieldUExtract; break;
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default:
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ERR("Unexpected instruction %#x.\n", instruction->handler_idx);
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return;
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}
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for (i = 0; i < VKD3D_VEC4_SIZE; ++i)
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{
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@ -2166,6 +2175,7 @@ void vkd3d_dxbc_compiler_handle_instruction(struct vkd3d_dxbc_compiler *compiler
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break;
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case VKD3DSIH_ADD:
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case VKD3DSIH_AND:
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case VKD3DSIH_BFREV:
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case VKD3DSIH_DIV:
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case VKD3DSIH_FTOI:
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case VKD3DSIH_FTOU:
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@ -2195,6 +2205,8 @@ void vkd3d_dxbc_compiler_handle_instruction(struct vkd3d_dxbc_compiler *compiler
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vkd3d_dxbc_compiler_emit_comparison_instruction(compiler, instruction);
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break;
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case VKD3DSIH_BFI:
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case VKD3DSIH_IBFE:
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case VKD3DSIH_UBFE:
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vkd3d_dxbc_compiler_emit_bitfield_instruction(compiler, instruction);
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break;
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case VKD3DSIH_IF:
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