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libs/vkd3d-shader: Translate udiv instructions.
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parent
c73b201110
commit
ea6b35ef58
@ -985,6 +985,20 @@ static uint32_t vkd3d_spirv_build_op_imul(struct vkd3d_spirv_builder *builder,
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SpvOpIMul, result_type, operand0, operand1);
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}
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static uint32_t vkd3d_spirv_build_op_udiv(struct vkd3d_spirv_builder *builder,
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uint32_t result_type, uint32_t operand0, uint32_t operand1)
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{
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return vkd3d_spirv_build_op_tr2(builder, &builder->function_stream,
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SpvOpUDiv, result_type, operand0, operand1);
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}
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static uint32_t vkd3d_spirv_build_op_umod(struct vkd3d_spirv_builder *builder,
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uint32_t result_type, uint32_t operand0, uint32_t operand1)
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{
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return vkd3d_spirv_build_op_tr2(builder, &builder->function_stream,
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SpvOpUMod, result_type, operand0, operand1);
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}
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static uint32_t vkd3d_spirv_build_op_isub(struct vkd3d_spirv_builder *builder,
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uint32_t result_type, uint32_t operand0, uint32_t operand1)
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{
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@ -2862,6 +2876,63 @@ static void vkd3d_dxbc_compiler_emit_imad(struct vkd3d_dxbc_compiler *compiler,
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vkd3d_dxbc_compiler_emit_store_dst(compiler, dst, val_id);
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}
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static void vkd3d_dxbc_compiler_emit_udiv(struct vkd3d_dxbc_compiler *compiler,
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const struct vkd3d_shader_instruction *instruction)
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{
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static const uint32_t ffffffff[] = {0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff};
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uint32_t type_id, val_id, src0_id, src1_id, condition_id, ffffffff_id;
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struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
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const struct vkd3d_shader_dst_param *dst = instruction->dst;
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const struct vkd3d_shader_src_param *src = instruction->src;
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unsigned int component_count = 0;
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if (dst[0].reg.type != VKD3DSPR_NULL)
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{
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component_count = vkd3d_write_mask_component_count(dst[0].write_mask);
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type_id = vkd3d_spirv_get_type_id(builder,
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vkd3d_component_type_from_data_type(dst[0].reg.data_type), component_count);
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src0_id = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[0], dst[0].write_mask);
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src1_id = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[1], dst[0].write_mask);
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condition_id = vkd3d_dxbc_compiler_emit_int_to_bool(compiler,
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VKD3D_SHADER_CONDITIONAL_OP_NZ, component_count, src1_id);
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ffffffff_id = vkd3d_dxbc_compiler_get_constant(compiler,
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VKD3D_TYPE_UINT, component_count, ffffffff);
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val_id = vkd3d_spirv_build_op_udiv(builder, type_id, src0_id, src1_id);
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/* The SPIR-V spec says: "The resulting value is undefined if Operand 2 is 0." */
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val_id = vkd3d_spirv_build_op_select(builder, type_id, condition_id, val_id, ffffffff_id);
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vkd3d_dxbc_compiler_emit_store_dst(compiler, &dst[0], val_id);
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}
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if (dst[1].reg.type != VKD3DSPR_NULL)
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{
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if (!component_count || dst[0].write_mask != dst[1].write_mask)
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{
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component_count = vkd3d_write_mask_component_count(dst[1].write_mask);
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type_id = vkd3d_spirv_get_type_id(builder,
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vkd3d_component_type_from_data_type(dst[1].reg.data_type), component_count);
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src0_id = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[0], dst[1].write_mask);
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src1_id = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[1], dst[1].write_mask);
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condition_id = vkd3d_dxbc_compiler_emit_int_to_bool(compiler,
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VKD3D_SHADER_CONDITIONAL_OP_NZ, component_count, src1_id);
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ffffffff_id = vkd3d_dxbc_compiler_get_constant(compiler,
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VKD3D_TYPE_UINT, component_count, ffffffff);
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}
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val_id = vkd3d_spirv_build_op_umod(builder, type_id, src0_id, src1_id);
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/* The SPIR-V spec says: "The resulting value is undefined if Operand 2 is 0." */
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val_id = vkd3d_spirv_build_op_select(builder, type_id, condition_id, val_id, ffffffff_id);
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vkd3d_dxbc_compiler_emit_store_dst(compiler, &dst[1], val_id);
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}
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}
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static void vkd3d_dxbc_compiler_emit_bitfield_instruction(struct vkd3d_dxbc_compiler *compiler,
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const struct vkd3d_shader_instruction *instruction)
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{
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@ -3426,6 +3497,9 @@ void vkd3d_dxbc_compiler_handle_instruction(struct vkd3d_dxbc_compiler *compiler
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case VKD3DSIH_IMAD:
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vkd3d_dxbc_compiler_emit_imad(compiler, instruction);
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break;
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case VKD3DSIH_UDIV:
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vkd3d_dxbc_compiler_emit_udiv(compiler, instruction);
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break;
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case VKD3DSIH_EQ:
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case VKD3DSIH_GE:
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case VKD3DSIH_IEQ:
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