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205 Commits

Author SHA1 Message Date
Giovanni Mascellani
de9725b6ba vkd3d-shader/ir: Remove DCL_TEMPS instructions. 
We have to do work to keep it updated across passes and we never read it.
 2024-01-23 20:26:38 +01:00
Giovanni Mascellani
4b869f73bb vkd3d-shader/ir: Run tracing and validation for DXIL code too. 2024-01-23 20:26:36 +01:00
Conor McCarthy
6df725718a vkd3d-shader/ir: Refactor return code checking in vkd3d_shader_normalise(). 
We started with only one or two of these but it has become excessive.

Patch originally written by Conor McCarthy and updated by Giovanni Mascellani.
 2024-01-23 20:26:34 +01:00
Giovanni Mascellani
232b2ad360 vkd3d-shader/ir: Validate PHI instructions. 2024-01-23 20:26:08 +01:00
Giovanni Mascellani
56f9057985 vkd3d-shader/ir: Do not allow IMMCONST and IMMCONST64 as destination registers. 2024-01-23 20:26:06 +01:00
Giovanni Mascellani
21633fcc52 vkd3d-shader/ir: Refactor register-type-specific code in parameter validation. 
To better accommodate code for other register types.
 2024-01-23 20:26:05 +01:00
Giovanni Mascellani
fb6409bda1 vkd3d-shader/ir: Check that all instructions appear in a block. 2024-01-23 20:26:03 +01:00
Henri Verbeet
adc02eada8 vkd3d-shader/ir: Store the temporary register count in struct vsir_program. 2024-01-22 22:18:53 +01:00
Henri Verbeet
94ca46916a vkd3d-shader/ir: Store the SSA register count in struct vsir_program. 2024-01-22 22:18:52 +01:00
Henri Verbeet
7b85cd6a31 vkd3d-shader/ir: Store the "use_vocp" field in struct vsir_program. 2024-01-22 22:18:51 +01:00
Henri Verbeet
23dcd4f22b vkd3d-shader/ir: Store the shader version in struct vsir_program. 2024-01-22 22:18:50 +01:00
Henri Verbeet
fc9043be3c vkd3d-shader/ir: Introduce struct vsir_program. 2024-01-22 22:18:48 +01:00
Giovanni Mascellani
67902d4304 vkd3d-shader/ir: Validate RET instructions. 2024-01-18 23:15:58 +01:00
Giovanni Mascellani
af96730276 vkd3d-shader/ir: Validate SWITCH_MONOLITHIC instructions. 2024-01-18 23:15:57 +01:00
Giovanni Mascellani
46ebb404d7 vkd3d-shader/ir: Validate BRANCH instructions. 2024-01-18 23:15:56 +01:00
Giovanni Mascellani
bc9db34cdc vkd3d-shader/ir: Validate LABEL instructions. 2024-01-18 23:15:55 +01:00
Giovanni Mascellani
dd1b2feec0 vkd3d-shader/ir: Validate LABEL registers. 2024-01-18 23:15:54 +01:00
Giovanni Mascellani
17f4afc2b5 vkd3d-shader/ir: Validate that structured CF does not appear in block-based shaders. 2024-01-18 23:15:53 +01:00
Conor McCarthy
83851133c5 vkd3d-shader/ir: Set merged signature element interpolation mode only from used elements. 2024-01-18 23:15:27 +01:00
Conor McCarthy
b8280e4210 vkd3d-shader/ir: Revert "Do not merge signature elements which have different interpolation modes.". 
This reverts commit b5c067b41a.

The commit causes regressions in other shaders because unused elements
do not have an interpolation mode.
 2024-01-18 23:15:25 +01:00
Conor McCarthy
efe800f7f0 vkd3d-shader/dxil: Handle the DXIL SWITCH instruction. 2024-01-18 23:15:14 +01:00
Conor McCarthy
4c30b23821 vkd3d-shader: Make the control point count the outer dimension of I/O arrays. 
The relative-addressed case in shader_register_normalise_arrayed_addressing()
leaves the control point id in idx[0], while for constant register
indices it is placed in idx[1]. The latter case could be fixed instead,
but placing the control point count in the outer dimension is more
logical.
 2024-01-17 22:28:59 +01:00
Conor McCarthy
418e8d8100 vkd3d-shader/ir: Expand index range write masks to cover all element masks. 
For example, this occurred in a shader:

reg_idx write_mask
   0      xyz
   1      xyzw
   2      xyzw
   3      xyz

The dcl_indexrange instruction covered only xyz, so once merged, searching for
xyzw failed.

It is impossible to declare an input array where elements have different
component counts, but the optimiser can create this case. One way for
this to occur is to dynamically index input values via a local array
containing copies of the input values. The optimiser converts this to
dynamically indexed inputs.
 2024-01-17 22:28:56 +01:00
Conor McCarthy
559d9d4ee0 vkd3d-shader/ir: Include an initial label instruction in the first control flow block. 2024-01-17 22:28:41 +01:00
Conor McCarthy
37d9dba512 vkd3d-shader/ir: Store code block names in struct vkd3d_shader_desc. 2024-01-17 22:28:38 +01:00
Conor McCarthy
ffc65215ba vkd3d-shader/ir: Flatten SWITCH/CASE/DEFAULT/ENDSWITCH control flow instructions. 2024-01-17 22:28:36 +01:00
Conor McCarthy
dcb8527327 vkd3d-shader/ir: Flatten LOOP/BREAK/CONTINUE/ENDLOOP control flow instructions. 2024-01-17 22:28:35 +01:00
Conor McCarthy
e1dddc01b7 vkd3d-shader/ir: Flatten IF/ELSE/ENDIF control flow instructions. 2024-01-17 22:28:34 +01:00
Giovanni Mascellani
b0c8a47f9d vkd3d-shader/ir: Check that SSA registers are used validly. 
Specifically, they are assigned only once and only assigned components
are used.

Right now we don't check that the assignment dominates all usages.
 2024-01-15 19:57:01 +01:00
Giovanni Mascellani
26bebe8f91 vkd3d-shader/ir: Check that SSA registers have consistent dimensions. 2024-01-15 19:57:00 +01:00
Giovanni Mascellani
7503429555 vkd3d-shader/ir: Check that TEMP registers have consistent dimensions. 2024-01-15 19:56:59 +01:00
Giovanni Mascellani
fbd77486de vkd3d-shader/ir: Use vkd3d_free() instead of free(). 2024-01-15 19:56:58 +01:00
Giovanni Mascellani
26c6a87268 vkd3d-shader/ir: Simplify control flow in vsir_validate_register(). 2024-01-15 19:56:56 +01:00
Giovanni Mascellani
78d95889bd vkd3d-shader: Make *src and *dst mutable in vkd3d_shader_instruction. 
They were originally made const because no optimization/normalization
pass existed. Now having to cast away const all the time is becoming
more and more burdening.
 2024-01-11 23:05:11 +01:00
Giovanni Mascellani
bd9118cac4 vkd3d-shader/ir: Validate destination write masks depending on the dimension. 2024-01-04 22:23:25 +01:00
Giovanni Mascellani
15e7711786 vkd3d-shader/ir: Validate source swizzles depending on the dimension. 2024-01-04 22:23:24 +01:00
Giovanni Mascellani
e91da41dea vkd3d-shader/ir: Validate SSA registers. 2024-01-04 22:23:23 +01:00
Zebediah Figura
1ce7e3d8b1 vkd3d-shader/d3dbc: Assign unique register indices for VKD3DSPR_RASTOUT. 2024-01-04 22:23:09 +01:00
Zebediah Figura
3f52fda8ad vkd3d-shader: Lower shader model 1/2 inter-stage I/O to a flat array. 
An alternative is that we stash the reg_type in the signature, but this seems
far simpler for the backend to deal with.
 2024-01-04 22:23:07 +01:00
Henri Verbeet
e33d3b3954 vkd3d-shader/ir: Rename the "immconst_uint" field of struct vkd3d_shader_register to "immconst_u32". 
For consistency with the rest of vkd3d-shader; e.g. put_u32() and
read_u32().
 2024-01-03 22:37:39 +01:00
Henri Verbeet
8a1de71fb1 vkd3d-shader/ir: Pass a uint32_t swizzle to vkd3d_swizzle_get_component(). 2023-12-14 23:19:49 +01:00
Henri Verbeet
713adaa56a vkd3d-shader/ir: Pass a uint32_t write mask to vkd3d_write_mask_component_count(). 2023-12-13 22:33:04 +01:00
Henri Verbeet
e1aa12f94b vkd3d-shader/ir: Pass a uint32_t write mask to vkd3d_write_mask_get_component_idx(). 2023-12-13 22:33:03 +01:00
Conor McCarthy
45679a966c vkd3d-shader/ir: Pass a local copy of location to control_point_normaliser_emit_hs_input(). 2023-12-07 21:57:49 +01:00
Conor McCarthy
b5c067b41a vkd3d-shader/ir: Do not merge signature elements which have different interpolation modes. 
Regression in signature normalisation, however the old code was not
correct either because it would apply the interpolation mode to all
components. Found in an Assassin's Creed: Valhalla shader.
 2023-12-06 15:31:18 +01:00
Conor McCarthy
eb05e434ff vkd3d-shader/dxil: Implement the DXIL LOAD instruction. 2023-11-22 22:07:59 +01:00
Conor McCarthy
59730ecfd8 vkd3d-shader/dxil: Implement the DXIL GEP instruction. 2023-11-22 22:07:58 +01:00
Giovanni Mascellani
b1123ed35f vkd3d-shader/ir: Correctly compute the TEMP count after hull shader flattening. 
The previous computation was incorrect because the count was taken
after resetting it to zero (as part of setting the instruction to NOP).
 2023-11-20 22:07:41 +01:00
Giovanni Mascellani
5cb17cfd1c vkd3d-shader/ir: Validate IFC instructions. 2023-11-20 22:07:36 +01:00
Giovanni Mascellani
849a8f3add vkd3d-shader/ir: Expect two sources for LOOP in SM1-3. 2023-11-20 22:07:35 +01:00
Giovanni Mascellani
0c5c18bdce vkd3d-shader/ir: Validate index count for IMMCONST64 registers. 2023-11-09 21:15:51 +01:00
Giovanni Mascellani
b74470b9d2 vkd3d-shader/ir: Validate index count for IMMCONST registers. 2023-11-09 21:15:49 +01:00
Giovanni Mascellani
c867682982 vkd3d-shader/ir: Validate index count for NULL registers. 2023-11-09 21:15:47 +01:00
Giovanni Mascellani
12fcb8dcc6 vkd3d-shader/ir: Validate register indices. 2023-11-09 21:15:44 +01:00
Giovanni Mascellani
b7aeb5dd70 vkd3d-shader/ir: Use vsir_register_init() to initialize a register. 2023-11-09 21:15:42 +01:00
Giovanni Mascellani
a869069a48 vkd3d-shader/ir: Validate the TEMP register indices in each HS phase. 2023-11-09 21:15:40 +01:00
Giovanni Mascellani
0f4bda9c9d vkd3d-shader/ir: Keep track of hull shader phases. 2023-11-09 21:15:38 +01:00
Conor McCarthy
5768c019c1 vkd3d-shader/ir: Check the handler before changing it to NOP in remove_dead_code(). 2023-11-09 21:15:29 +01:00
Zebediah Figura
c7a7d9a18c vkd3d-shader/ir: Normalize all I/O registers to INPUT/OUTPUT/PATCHCONST. 
Specifically, map COLOROUT to OUTPUT, and map INCONTROLPOINT to INPUT for domain
shaders as well as hull shaders.

Obscure the non-existent differences from the view of the backend.
 2023-11-09 21:14:52 +01:00
Zebediah Figura
852eefc01d vkd3d-shader/ir: Synthesize HS inputs with the register index and write mask of the signature element. 
This pass was written as if to output normalized I/O, but it runs before the I/O
normalization pass.

Fixes: 98b5e2c6e0
 2023-11-07 22:26:53 +01:00
Zebediah Figura
12240efa79 vkd3d-shader/spirv: Use register counts from the signature and shader desc. 2023-11-07 22:26:49 +01:00
Giovanni Mascellani
7d49f9637a vkd3d-shader/ir: Check that SWITCH blocks are correctly nested. 2023-11-07 22:26:05 +01:00
Giovanni Mascellani
93632fb407 vkd3d-shader/ir: Check that REP blocks are correctly nested. 2023-11-07 22:26:04 +01:00
Giovanni Mascellani
92c36615ed vkd3d-shader/ir: Check that LOOP blocks are correctly nested. 2023-11-07 22:26:03 +01:00
Giovanni Mascellani
2f7d52dba4 vkd3d-shader/ir: Check that IF blocks are correctly nested. 2023-11-07 22:26:01 +01:00
Giovanni Mascellani
0a7e200f89 vkd3d-shader/ir: Do not enfore DCL_TEMPS count for hull shaders. 
Hull shaders have a different temps count for each phase, and the
parser only reports the count for the patch constant phase.
In order to properly check for temps count on hull shaders, we first
need to decode its phases.
 2023-11-07 22:26:00 +01:00
Giovanni Mascellani
ca3f594ae3 vkd3d-shader/ir: Emit an ERR() on validation errors. 2023-11-07 22:25:58 +01:00
Zebediah Figura
b73d2c978d vkd3d-shader/ir: Check for vocp usage during IR normalization. 
The hull shader barrier used for this was broken by I/O normalization, since
vocp is no longer exposed to the spirv backend.

Restore this barrier by checking for vocp during normalization instead.
 2023-11-06 23:07:56 +01:00
Zebediah Figura
8b42f523f2 vkd3d-shader/ir: Pass a vkd3d_shader_parser to instruction_array_normalise_io_registers(). 2023-11-06 23:07:54 +01:00
Giovanni Mascellani
af72466db1 vkd3d-shader/ir: Validate the index of a TEMP register. 2023-11-02 18:22:52 +01:00
Giovanni Mascellani
4140b87499 vkd3d-shader/ir: Validate the DCL_TEMPS instruction. 2023-11-02 18:22:50 +01:00
Giovanni Mascellani
79fa5fd8bb vkd3d-shader/ir: Validate the register index count. 2023-11-02 18:22:49 +01:00
Giovanni Mascellani
26e4191d4b vkd3d-shader/ir: Validate the register dimension. 2023-11-02 18:22:47 +01:00
Giovanni Mascellani
f3a20be35a vkd3d-shader/ir: Validate the register data type. 2023-11-02 18:22:38 +01:00
Giovanni Mascellani
72d0f765f2 vkd3d-shader/ir: Validate the register precision. 2023-11-02 18:22:37 +01:00
Zebediah Figura
15b69721de vkd3d-shader/tpf: Set the interpolation mode for signature elements. 2023-10-31 21:59:38 +01:00
Zebediah Figura
6a942581db vkd3d-shader/ir: Translate TEX instructions to SAMPLE. 2023-10-09 21:58:40 +02:00
Francisco Casas
e904660497 vkd3d-shader: Turn vkd3d_shader_register.immconst_type into vkd3d_shader_register.dimension. 2023-09-26 22:07:04 +02:00
Francisco Casas
5d6899888d vkd3d-shader: Rename shader_register_init() to vsir_register_init(). 2023-09-26 22:06:50 +02:00
Giovanni Mascellani
d9c8b49ea0 vkd3d-shader/ir: Remove dead code during normalisation. 
The SPIR-V backend generates invalid SPIR-V code when
VSIR has dead code (except for NOPs).
 2023-09-25 22:07:27 +02:00
Giovanni Mascellani
34b1c0fe5d vkd3d-shader/ir: Validate source parameters. 2023-09-22 11:06:18 +02:00
Giovanni Mascellani
603170106c vkd3d-shader/ir: Validate destination parameters. 2023-09-22 11:06:17 +02:00
Giovanni Mascellani
585e60ad3b vkd3d-shader/ir: Validate register types. 2023-09-22 11:06:16 +02:00
Giovanni Mascellani
b09cfbda90 vkd3d-shader/ir: Validate instruction handlers. 2023-09-22 11:06:15 +02:00
Giovanni Mascellani
c052cd8998 vkd3d-shader/ir: Introduce a boilerplate to validate the generated IR. 
For the moment the validator is trivial, it never fails. Checks will
be added incrementally.
 2023-09-22 11:06:13 +02:00
Giovanni Mascellani
cf871d2cb2 vkd3d-shader: Embed the parsing location in vkd3d_shader_instruction. 
So that it can be used for printing meaningful error locations by
downstream processors.
 2023-09-22 11:06:12 +02:00
Giovanni Mascellani
9487cc6ab5 vkd3d-shader/ir: Simplify the control flow in shader_instruction_normalise_io_params(). 2023-09-22 11:06:06 +02:00
Giovanni Mascellani
5220125c9f vkd3d-shader/ir: Fully reinitialize an instruction when making it a NOP. 2023-09-22 11:06:05 +02:00
Giovanni Mascellani
05af25eecb vkd3d-shader: Rename shader_instruction_init(). 2023-09-22 11:06:05 +02:00
Zebediah Figura
fd120d8f2d vkd3d-shader: Rename vkd3d_shader_next_stage_info to vkd3d_shader_varying_map_info. 
It was originally intended that this structure could hold other information
about the next stage which compilation might depend on. For example, compilation
to GLSL needs to know the type of the next shader in some circumstances.

That was never actualized, and since the API is fixed at this point for 1.9, it
makes the most sense to rename the structure to match its actual scope.

The documentation was written and arranged to imply that the structure would
hold other information about the next shader than the varying map; this is
changed accordingly as well.
 2023-09-21 19:16:27 +02:00
Conor McCarthy
e54f770669 vkd3d-shader/dxil: Implement the DXIL CALL instruction. 2023-08-30 22:48:48 +02:00
Zebediah Figura
d932fba7c3 vkd3d-shader/spirv: Make output varyings not consumed by the next stage private variables. 2023-08-03 21:20:42 +09:00
Zebediah Figura
11475ef62a vkd3d-shader: Implement remapping shader output registers to match the next shader's semantics. 2023-08-03 21:20:42 +09:00
Conor McCarthy
3e553aaaa7 vkd3d-shader/dxil: Emit the shader instructions. 
Sufficient for compiling a no-op pixel shader.
 2023-07-20 22:32:51 +02:00
Conor McCarthy
f26d47585f vkd3d-shader/spirv: Do not normalise Shader Model 6 shaders. 2023-07-20 22:32:50 +02:00
Zebediah Figura
25cf6a720b vkd3d-shader/ir: Normalise sm1-style constants. 2023-07-17 22:56:45 +02:00
Zebediah Figura
e9fb067d4c vkd3d-shader/ir: Move normalization code from spirv.c to ir.c. 
It is not spirv-specific and will (presumably) be used for GLSL as well.
 2023-07-17 22:56:43 +02:00
Conor McCarthy
bce2a898b3 vkd3d-shader/spirv: Take ownership of the shader signatures in spirv_compiler_create(). 
Fixes leakage of the replacement elements in shader_signature_merge().
 2023-06-19 22:44:07 +02:00
Conor McCarthy
6835e8176f vkd3d-shader/ir: Normalise signatures and input/output registers to the Shader Model 6 pattern. 
In Shader Model 6 each signature element can span a range of register
indices, or 'rows', and system values do not share a register index with
non-system values. Inputs and outputs are referenced by element index
instead of register index. This patch merges multiple signature elements
into a single element under the following conditions:

- The register index in a load or store is specified dynamically by
  including a relative address parameter with a base register index. The
  dcl_index_range instruction is used to identify these.
- A register declaration is split across multiple elements which declare
  different components of the register.
- A patch constant function writes tessellation factors. These are an
  array in SPIR-V, but in SM 5.x each factor is declared as a separate
  register, and these are dynamically indexed by the fork/join instance
  id. Elimination of multiple fork/join phases converts the indices to
  constants, but merging the signature elements into a single arrayed
  element matches the SPIR-V output.

All references to input/output register indices are converted to element
indices. If a relative address is present, the element index is moved up
a slot so it cannot be confused with a constant offset. Existing code
only handles register index relative addressing for tessellation factors.
This patch adds generic support for it.
 2023-05-24 22:00:29 +02:00
Conor McCarthy
110e48e54d vkd3d-shader/ir: Eliminate struct vkd3d_shader_normaliser. 2023-05-24 22:00:28 +02:00
Conor McCarthy
adf7db021c vkd3d-shader/tpf: Validate input/output register index counts. 2023-05-09 21:51:17 +02:00
Conor McCarthy
a0a18b1620 vkd3d-shader: Introduce an internal shader signature structure. 
A register count is required for Shader Model 6 signatures, including
those normalised from earlier models.
 2023-05-03 21:12:07 +02:00
Conor McCarthy
98b5e2c6e0 vkd3d-shader/ir: Insert hull shader control point input declarations if no control point phase is defined. 
The SPIR-V backend will emit a default control point phase. Inserting
inputs into the IR allows handling of declarations via the usual path
instead of an ad hoc implementation which may not match later changes
to input handling.
 2023-04-12 21:54:28 +02:00
Conor McCarthy
14295a224d vkd3d-shader/ir: Normalise control point phase output registers to include the control point id. 
In SPIR-V the address must include the invocation id, but in TPF it
is implicit. Move the register index up one slot and insert an
OUTPOINTID relative address.
 2023-04-12 21:54:27 +02:00
Conor McCarthy
eabdccb117 vkd3d-shader/ir: Merge all shader IR fork and join phases into a single phase. 
Normalise the incoming vkd3d_shader_instruction IR to the shader model 6
pattern. This allows generation of a single patch constant function in
SPIR-V.
 2023-04-03 17:58:21 +02:00