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https://gitlab.winehq.org/wine/vkd3d.git
synced 2025-01-28 13:05:02 -08:00
vkd3d-shader/ir: Rename the "immconst_uint" field of struct vkd3d_shader_register to "immconst_u32".
For consistency with the rest of vkd3d-shader; e.g. put_u32() and read_u32().
This commit is contained in:
parent
78343dcf87
commit
e33d3b3954
Notes:
Alexandre Julliard
2024-01-03 23:08:59 +01:00
Approved-by: Alexandre Julliard (@julliard) Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/534
@ -1112,12 +1112,12 @@ static void shader_dump_register(struct vkd3d_d3d_asm_compiler *compiler, const
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shader_print_float_literal(compiler, "", reg->u.immconst_float[0], "");
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break;
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case VKD3D_DATA_INT:
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shader_print_int_literal(compiler, "", reg->u.immconst_uint[0], "");
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shader_print_int_literal(compiler, "", reg->u.immconst_u32[0], "");
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break;
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case VKD3D_DATA_RESOURCE:
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case VKD3D_DATA_SAMPLER:
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case VKD3D_DATA_UINT:
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shader_print_uint_literal(compiler, "", reg->u.immconst_uint[0], "");
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shader_print_uint_literal(compiler, "", reg->u.immconst_u32[0], "");
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break;
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default:
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shader_addline(buffer, "<unhandled data type %#x>", reg->data_type);
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@ -1135,18 +1135,18 @@ static void shader_dump_register(struct vkd3d_d3d_asm_compiler *compiler, const
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shader_print_float_literal(compiler, ", ", reg->u.immconst_float[3], "");
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break;
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case VKD3D_DATA_INT:
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shader_print_int_literal(compiler, "", reg->u.immconst_uint[0], "");
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shader_print_int_literal(compiler, ", ", reg->u.immconst_uint[1], "");
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shader_print_int_literal(compiler, ", ", reg->u.immconst_uint[2], "");
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shader_print_int_literal(compiler, ", ", reg->u.immconst_uint[3], "");
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shader_print_int_literal(compiler, "", reg->u.immconst_u32[0], "");
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shader_print_int_literal(compiler, ", ", reg->u.immconst_u32[1], "");
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shader_print_int_literal(compiler, ", ", reg->u.immconst_u32[2], "");
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shader_print_int_literal(compiler, ", ", reg->u.immconst_u32[3], "");
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break;
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case VKD3D_DATA_RESOURCE:
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case VKD3D_DATA_SAMPLER:
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case VKD3D_DATA_UINT:
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shader_print_uint_literal(compiler, "", reg->u.immconst_uint[0], "");
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shader_print_uint_literal(compiler, ", ", reg->u.immconst_uint[1], "");
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shader_print_uint_literal(compiler, ", ", reg->u.immconst_uint[2], "");
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shader_print_uint_literal(compiler, ", ", reg->u.immconst_uint[3], "");
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shader_print_uint_literal(compiler, "", reg->u.immconst_u32[0], "");
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shader_print_uint_literal(compiler, ", ", reg->u.immconst_u32[1], "");
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shader_print_uint_literal(compiler, ", ", reg->u.immconst_u32[2], "");
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shader_print_uint_literal(compiler, ", ", reg->u.immconst_u32[3], "");
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break;
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default:
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shader_addline(buffer, "<unhandled data type %#x>", reg->data_type);
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@ -1891,16 +1891,16 @@ static void shader_dump_instruction(struct vkd3d_d3d_asm_compiler *compiler,
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case VKD3DSIH_DEFI:
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vkd3d_string_buffer_printf(buffer, " %si%u%s", compiler->colours.reg,
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ins->dst[0].reg.idx[0].offset, compiler->colours.reset);
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shader_print_int_literal(compiler, " = ", ins->src[0].reg.u.immconst_uint[0], "");
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shader_print_int_literal(compiler, ", ", ins->src[0].reg.u.immconst_uint[1], "");
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shader_print_int_literal(compiler, ", ", ins->src[0].reg.u.immconst_uint[2], "");
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shader_print_int_literal(compiler, ", ", ins->src[0].reg.u.immconst_uint[3], "");
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shader_print_int_literal(compiler, " = ", ins->src[0].reg.u.immconst_u32[0], "");
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shader_print_int_literal(compiler, ", ", ins->src[0].reg.u.immconst_u32[1], "");
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shader_print_int_literal(compiler, ", ", ins->src[0].reg.u.immconst_u32[2], "");
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shader_print_int_literal(compiler, ", ", ins->src[0].reg.u.immconst_u32[3], "");
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break;
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case VKD3DSIH_DEFB:
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vkd3d_string_buffer_printf(buffer, " %sb%u%s", compiler->colours.reg,
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ins->dst[0].reg.idx[0].offset, compiler->colours.reset);
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shader_print_bool_literal(compiler, " = ", ins->src[0].reg.u.immconst_uint[0], "");
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shader_print_bool_literal(compiler, " = ", ins->src[0].reg.u.immconst_u32[0], "");
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break;
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default:
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@ -987,7 +987,7 @@ static void shader_sm1_read_immconst(struct vkd3d_shader_sm1_parser *sm1, const
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src_param->reg.idx[2].rel_addr = NULL;
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src_param->reg.idx_count = 0;
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src_param->reg.dimension = dimension;
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memcpy(src_param->reg.u.immconst_uint, *ptr, count * sizeof(uint32_t));
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memcpy(src_param->reg.u.immconst_u32, *ptr, count * sizeof(uint32_t));
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src_param->swizzle = VKD3D_SHADER_NO_SWIZZLE;
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src_param->modifiers = 0;
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@ -1891,7 +1891,7 @@ static unsigned int register_get_uint_value(const struct vkd3d_shader_register *
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return reg->u.immconst_uint64[0];
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}
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return reg->u.immconst_uint[0];
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return reg->u.immconst_u32[0];
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}
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static uint64_t register_get_uint64_value(const struct vkd3d_shader_register *reg)
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@ -1902,7 +1902,7 @@ static uint64_t register_get_uint64_value(const struct vkd3d_shader_register *re
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if (reg->dimension == VSIR_DIMENSION_VEC4)
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WARN("Returning vec4.x.\n");
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return (reg->type == VKD3DSPR_IMMCONST64) ? reg->u.immconst_uint64[0] : reg->u.immconst_uint[0];
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return (reg->type == VKD3DSPR_IMMCONST64) ? reg->u.immconst_uint64[0] : reg->u.immconst_u32[0];
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}
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static inline bool sm6_value_is_function_dcl(const struct sm6_value *value)
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@ -2577,7 +2577,7 @@ static enum vkd3d_result sm6_parser_constants_init(struct sm6_parser *sm6, const
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value = decode_rotated_signed_value(record->operands[0]);
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if (type->u.width <= 32)
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dst->u.reg.u.immconst_uint[0] = value & ((1ull << type->u.width) - 1);
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dst->u.reg.u.immconst_u32[0] = value & ((1ull << type->u.width) - 1);
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else
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dst->u.reg.u.immconst_uint64[0] = value;
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@ -63,7 +63,7 @@ static void shader_instruction_eliminate_phase_instance_id(struct vkd3d_shader_i
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if (shader_register_is_phase_instance_id(reg))
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{
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vsir_register_init(reg, VKD3DSPR_IMMCONST, reg->data_type, 0);
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reg->u.immconst_uint[0] = instance_id;
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reg->u.immconst_u32[0] = instance_id;
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continue;
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}
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shader_register_eliminate_phase_addressing(reg, instance_id);
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@ -1218,7 +1218,7 @@ static void shader_register_normalise_flat_constants(struct vkd3d_shader_src_par
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param->reg.idx_count = 0;
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param->reg.dimension = VSIR_DIMENSION_VEC4;
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for (j = 0; j < 4; ++j)
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param->reg.u.immconst_uint[j] = normaliser->defs[i].value[j];
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param->reg.u.immconst_u32[j] = normaliser->defs[i].value[j];
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return;
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}
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}
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@ -1254,7 +1254,7 @@ static enum vkd3d_result instruction_array_normalise_flat_constants(struct vkd3d
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get_flat_constant_register_type((struct vkd3d_shader_register *)&ins->dst[0].reg, &def->set, &def->index);
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for (j = 0; j < 4; ++j)
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def->value[j] = ins->src[0].reg.u.immconst_uint[j];
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def->value[j] = ins->src[0].reg.u.immconst_u32[j];
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vkd3d_shader_instruction_make_nop(ins);
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}
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@ -3697,14 +3697,14 @@ static uint32_t spirv_compiler_emit_load_constant(struct spirv_compiler *compile
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if (reg->dimension == VSIR_DIMENSION_SCALAR)
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{
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for (i = 0; i < component_count; ++i)
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values[i] = *reg->u.immconst_uint;
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values[i] = *reg->u.immconst_u32;
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}
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else
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{
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for (i = 0, j = 0; i < VKD3D_VEC4_SIZE; ++i)
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{
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if (write_mask & (VKD3DSP_WRITEMASK_0 << i))
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values[j++] = reg->u.immconst_uint[vsir_swizzle_get_component(swizzle, i)];
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values[j++] = reg->u.immconst_u32[vsir_swizzle_get_component(swizzle, i)];
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}
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}
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@ -7829,7 +7829,7 @@ static int spirv_compiler_emit_control_flow_instruction(struct spirv_compiler *c
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"The swizzle for a switch case value is not scalar.");
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}
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assert(src->reg.type == VKD3DSPR_IMMCONST);
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value = *src->reg.u.immconst_uint;
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value = *src->reg.u.immconst_u32;
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if (!vkd3d_array_reserve((void **)&cf_info->u.switch_.case_blocks, &cf_info->u.switch_.case_blocks_size,
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2 * (cf_info->u.switch_.case_block_count + 1), sizeof(*cf_info->u.switch_.case_blocks)))
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@ -1903,19 +1903,19 @@ static bool shader_sm4_read_param(struct vkd3d_shader_sm4_parser *priv, const ui
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if (register_type == VKD3D_SM4_RT_IMMCONST || register_type == VKD3D_SM4_RT_IMMCONST64)
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{
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unsigned int dword_count;
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unsigned int u32_count;
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switch (param->dimension)
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{
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case VSIR_DIMENSION_SCALAR:
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dword_count = 1 + (register_type == VKD3D_SM4_RT_IMMCONST64);
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if (end - *ptr < dword_count)
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u32_count = 1 + (register_type == VKD3D_SM4_RT_IMMCONST64);
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if (end - *ptr < u32_count)
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{
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WARN("Invalid ptr %p, end %p.\n", *ptr, end);
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return false;
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}
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memcpy(param->u.immconst_uint, *ptr, dword_count * sizeof(DWORD));
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*ptr += dword_count;
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memcpy(param->u.immconst_u32, *ptr, u32_count * sizeof(uint32_t));
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*ptr += u32_count;
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break;
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case VSIR_DIMENSION_VEC4:
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@ -1924,7 +1924,7 @@ static bool shader_sm4_read_param(struct vkd3d_shader_sm4_parser *priv, const ui
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WARN("Invalid ptr %p, end %p.\n", *ptr, end);
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return false;
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}
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memcpy(param->u.immconst_uint, *ptr, VKD3D_VEC4_SIZE * sizeof(DWORD));
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memcpy(param->u.immconst_u32, *ptr, VKD3D_VEC4_SIZE * sizeof(uint32_t));
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*ptr += 4;
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break;
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@ -3870,7 +3870,7 @@ static void sm4_src_from_constant_value(struct vkd3d_shader_src_param *src,
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if (width == 1)
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{
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src->reg.dimension = VSIR_DIMENSION_SCALAR;
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src->reg.u.immconst_uint[0] = value->u[0].u;
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src->reg.u.immconst_u32[0] = value->u[0].u;
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}
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else
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{
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@ -3880,9 +3880,9 @@ static void sm4_src_from_constant_value(struct vkd3d_shader_src_param *src,
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for (i = 0; i < 4; ++i)
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{
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if ((map_writemask & (1u << i)) && (j < width))
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src->reg.u.immconst_uint[i] = value->u[j++].u;
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src->reg.u.immconst_u32[i] = value->u[j++].u;
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else
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src->reg.u.immconst_uint[i] = 0;
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src->reg.u.immconst_u32[i] = 0;
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}
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}
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}
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@ -4077,12 +4077,12 @@ static void sm4_write_src_register(const struct tpf_writer *tpf, const struct vk
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if (src->reg.type == VKD3DSPR_IMMCONST)
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{
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put_u32(buffer, src->reg.u.immconst_uint[0]);
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put_u32(buffer, src->reg.u.immconst_u32[0]);
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if (src->reg.dimension == VSIR_DIMENSION_VEC4)
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{
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put_u32(buffer, src->reg.u.immconst_uint[1]);
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put_u32(buffer, src->reg.u.immconst_uint[2]);
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put_u32(buffer, src->reg.u.immconst_uint[3]);
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put_u32(buffer, src->reg.u.immconst_u32[1]);
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put_u32(buffer, src->reg.u.immconst_u32[2]);
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put_u32(buffer, src->reg.u.immconst_u32[3]);
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}
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}
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}
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@ -4617,7 +4617,7 @@ static void write_sm4_ld(const struct tpf_writer *tpf, const struct hlsl_ir_node
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memset(&instr.srcs[2], 0, sizeof(instr.srcs[2]));
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reg->type = VKD3DSPR_IMMCONST;
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reg->dimension = VSIR_DIMENSION_SCALAR;
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reg->u.immconst_uint[0] = index->value.u[0].u;
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reg->u.immconst_u32[0] = index->value.u[0].u;
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}
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else if (tpf->ctx->profile->major_version == 4 && tpf->ctx->profile->minor_version == 0)
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{
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@ -4778,7 +4778,7 @@ static void write_sm4_cast_from_bool(const struct tpf_writer *tpf, const struct
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sm4_src_from_node(tpf, &instr.srcs[0], arg, instr.dsts[0].write_mask);
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instr.srcs[1].reg.type = VKD3DSPR_IMMCONST;
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instr.srcs[1].reg.dimension = VSIR_DIMENSION_SCALAR;
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instr.srcs[1].reg.u.immconst_uint[0] = mask;
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instr.srcs[1].reg.u.immconst_u32[0] = mask;
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instr.src_count = 2;
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write_sm4_instruction(tpf, &instr);
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@ -841,7 +841,7 @@ struct vkd3d_shader_register
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unsigned int alignment;
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union
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{
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DWORD immconst_uint[VKD3D_VEC4_SIZE];
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uint32_t immconst_u32[VKD3D_VEC4_SIZE];
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float immconst_float[VKD3D_VEC4_SIZE];
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uint64_t immconst_uint64[VKD3D_DVEC2_SIZE];
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double immconst_double[VKD3D_DVEC2_SIZE];
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