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vkd3d-shader/ir: Remove DCL_TEMPS instructions.
We have to do work to keep it updated across passes and we never read it.
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parent
4b869f73bb
commit
de9725b6ba
Notes:
Alexandre Julliard
2024-01-23 23:04:04 +01:00
Approved-by: Giovanni Mascellani (@giomasce) Approved-by: Francisco Casas (@fcasas) Approved-by: Henri Verbeet (@hverbeet) Approved-by: Alexandre Julliard (@julliard) Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/574
@ -47,6 +47,19 @@ static void vkd3d_shader_instruction_make_nop(struct vkd3d_shader_instruction *i
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vsir_instruction_init(ins, &location, VKD3DSIH_NOP);
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}
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static void remove_dcl_temps(struct vsir_program *program)
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{
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unsigned int i;
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for (i = 0; i < program->instructions.count; ++i)
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{
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struct vkd3d_shader_instruction *ins = &program->instructions.elements[i];
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if (ins->handler_idx == VKD3DSIH_DCL_TEMPS)
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vkd3d_shader_instruction_make_nop(ins);
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}
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}
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static void shader_register_eliminate_phase_addressing(struct vkd3d_shader_register *reg,
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unsigned int instance_id)
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{
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@ -154,9 +167,6 @@ struct hull_flattener
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{
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struct vkd3d_shader_instruction_array instructions;
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unsigned int max_temp_count;
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unsigned int temp_dcl_idx;
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unsigned int instance_count;
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unsigned int phase_body_idx;
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enum vkd3d_shader_opcode phase;
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@ -214,21 +224,6 @@ static void flattener_eliminate_phase_related_dcls(struct hull_flattener *normal
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vkd3d_shader_instruction_make_nop(ins);
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return;
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}
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else if (ins->handler_idx == VKD3DSIH_DCL_TEMPS && normaliser->phase != VKD3DSIH_INVALID)
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{
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/* Leave only the first temp declaration and set it to the max count later. */
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if (!normaliser->max_temp_count)
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{
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normaliser->max_temp_count = ins->declaration.count;
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normaliser->temp_dcl_idx = index;
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}
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else
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{
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normaliser->max_temp_count = max(normaliser->max_temp_count, ins->declaration.count);
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vkd3d_shader_instruction_make_nop(ins);
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}
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return;
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}
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if (normaliser->phase == VKD3DSIH_INVALID || shader_instruction_is_dcl(ins))
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return;
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@ -382,9 +377,6 @@ static enum vkd3d_result instruction_array_flatten_hull_shader_phases(struct vkd
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if (flattener.phase != VKD3DSIH_INVALID)
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{
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if (flattener.temp_dcl_idx)
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instructions->elements[flattener.temp_dcl_idx].declaration.count = flattener.max_temp_count;
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if (!shader_instruction_array_reserve(&flattener.instructions, flattener.instructions.count + 1))
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return VKD3D_ERROR_OUT_OF_MEMORY;
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vsir_instruction_init(&instructions->elements[instructions->count++], &flattener.last_ret_location, VKD3DSIH_RET);
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@ -581,9 +573,6 @@ struct io_normaliser
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struct shader_signature *output_signature;
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struct shader_signature *patch_constant_signature;
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unsigned int max_temp_count;
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unsigned int temp_dcl_idx;
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unsigned int instance_count;
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unsigned int phase_body_idx;
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enum vkd3d_shader_opcode phase;
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@ -2257,6 +2246,8 @@ enum vkd3d_result vkd3d_shader_normalise(struct vkd3d_shader_parser *parser,
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struct vkd3d_shader_instruction_array *instructions = &parser->program.instructions;
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enum vkd3d_result result = VKD3D_OK;
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remove_dcl_temps(&parser->program);
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if (!parser->shader_desc.is_dxil)
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{
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if (parser->program.shader_version.type != VKD3D_SHADER_TYPE_PIXEL)
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@ -2309,7 +2300,6 @@ struct validation_context
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size_t instruction_idx;
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bool invalid_instruction_idx;
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bool dcl_temps_found;
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unsigned int temp_count;
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enum vkd3d_shader_opcode phase;
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enum cf_type
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{
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@ -2371,11 +2361,7 @@ static void vsir_validate_src_param(struct validation_context *ctx,
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static void vsir_validate_register(struct validation_context *ctx,
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const struct vkd3d_shader_register *reg)
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{
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unsigned int i, temp_count = ctx->temp_count;
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/* SM1-3 shaders do not include a DCL_TEMPS instruction. */
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if (ctx->program->shader_version.major <= 3)
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temp_count = ctx->program->temp_count;
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unsigned int i;
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if (reg->type >= VKD3DSPR_COUNT)
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validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_INVALID_REGISTER_TYPE, "Invalid register type %#x.",
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@ -2420,18 +2406,13 @@ static void vsir_validate_register(struct validation_context *ctx,
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if (reg->idx[0].rel_addr)
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validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_INVALID_INDEX, "Non-NULL relative address for a TEMP register.");
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if (reg->idx[0].offset >= temp_count)
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if (reg->idx[0].offset >= ctx->parser->program.temp_count)
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{
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validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_INVALID_INDEX, "TEMP register index %u exceeds the maximum count %u.",
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reg->idx[0].offset, temp_count);
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reg->idx[0].offset, ctx->parser->program.temp_count);
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break;
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}
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/* program->temp_count might be smaller then temp_count if the
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* parser made a mistake; we still don't want to overflow the
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* array. */
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if (reg->idx[0].offset >= ctx->program->temp_count)
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break;
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data = &ctx->temps[reg->idx[0].offset];
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if (reg->dimension == VSIR_DIMENSION_NONE)
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@ -2784,7 +2765,6 @@ static void vsir_validate_instruction(struct validation_context *ctx)
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instruction->handler_idx);
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ctx->phase = instruction->handler_idx;
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ctx->dcl_temps_found = false;
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ctx->temp_count = 0;
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return;
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default:
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@ -2852,7 +2832,6 @@ static void vsir_validate_instruction(struct validation_context *ctx)
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"Invalid DCL_TEMPS count %u, expected at most %u.",
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instruction->declaration.count, ctx->program->temp_count);
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ctx->dcl_temps_found = true;
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ctx->temp_count = instruction->declaration.count;
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break;
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case VKD3DSIH_IF:
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@ -9635,7 +9635,6 @@ static int spirv_compiler_handle_instruction(struct spirv_compiler *compiler,
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case VKD3DSIH_DCL_RESOURCE_RAW:
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case VKD3DSIH_DCL_RESOURCE_STRUCTURED:
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case VKD3DSIH_DCL_SAMPLER:
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case VKD3DSIH_DCL_TEMPS:
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case VKD3DSIH_DCL_UAV_RAW:
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case VKD3DSIH_DCL_UAV_STRUCTURED:
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case VKD3DSIH_DCL_UAV_TYPED:
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