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189 Commits

Author SHA1 Message Date
Giovanni Mascellani
070c4af8b3 vkd3d-shader/ir: Generate synthetic intervals for forward edges. 2024-03-12 22:14:46 +01:00
Giovanni Mascellani
1d60612340 vkd3d-shader/ir: Compute loop as intervals of the block order. 2024-03-12 22:14:45 +01:00
Giovanni Mascellani
204c8afb9c vkd3d-shader/dxbc: Remove flag is_dxil. 
The full shader profile is already available in vsir_program.
 2024-03-11 22:09:31 +01:00
Giovanni Mascellani
470d83a9da vkd3d-shader: Move shader signatures to vsir_program. 2024-03-11 22:09:31 +01:00
Giovanni Mascellani
b940d79aa8 vkd3d-shader/ir: Keep loops contiguous in the topological sort. 2024-03-08 23:35:48 +01:00
Giovanni Mascellani
cf9a023566 vkd3d-shader/ir: Dump the topological order of the control flow graph. 2024-03-08 23:35:47 +01:00
Giovanni Mascellani
ed40646c8a vkd3d-shader/ir: Topologically sort the control flow graph. 2024-03-08 23:35:46 +01:00
Giovanni Mascellani
880d781b57 vkd3d-shader/ir: Allow adding to a block list without checking for duplicates. 2024-03-08 23:35:45 +01:00
Giovanni Mascellani
8723b5d266 vkd3d-shader/ir: Sort each loop by block label. 2024-03-07 23:08:36 +01:00
Giovanni Mascellani
3d4092d9dc vkd3d-shader/ir: Dump the loops in the control flow graph. 2024-03-07 23:08:35 +01:00
Giovanni Mascellani
8241ca2b67 vkd3d-shader/ir: Keep track of loops by header block. 2024-03-07 23:08:34 +01:00
Giovanni Mascellani
088a6c49a2 vkd3d-shader/ir: Keep a reference to the message context inside struct vsir_cfg. 2024-03-07 23:08:33 +01:00
Giovanni Mascellani
9ac842b36b vkd3d-shader/ir: Compute the loops in the control flow graph. 2024-03-07 23:08:32 +01:00
Giovanni Mascellani
de15f55477 vkd3d-shader/ir: Introduce a helper to express block domination. 2024-03-07 23:08:31 +01:00
Giovanni Mascellani
c3657c4799 vkd3d-shader/ir: Add a debug buffer to struct vsir_cfg. 2024-03-07 23:08:30 +01:00
Giovanni Mascellani
c5893288d9 vkd3d-shader/ir: Properly handle function-local indexable temps when flattening control flow. 
They have to be considered code rather than declarations, as required
for instance by the SPIR-V backend.
 2024-03-07 23:08:28 +01:00
Giovanni Mascellani
9c678532a7 vkd3d-shader/ir: Dump the domination relationship. 2024-02-22 22:45:16 +01:00
Giovanni Mascellani
04c2852c1a vkd3d-shader/ir: Compute the domination relationship. 2024-02-22 22:45:15 +01:00
Giovanni Mascellani
2573d86ccf vkd3d-shader/ir: Dump the control flow graph in the GraphViz format. 2024-02-22 22:45:14 +01:00
Giovanni Mascellani
da037b61ba vkd3d-shader/ir: Build a representation of the control flow graph. 2024-02-22 22:45:13 +01:00
Giovanni Mascellani
51f13391e6 vkd3d-shader/ir: Introduce a simple control flow graph structurizer. 
The structurizer is implemented along the lines of what is usually called
the "structured program theorem": the control flow is completely
virtualized by mean of an additional TEMP register which stores the
block index which is currently running. The whole program is then
converted to a huge switch construction enclosed in a loop, executing
at each iteration the appropriate block and updating the register
depending on block jump instruction.

The algorithm's generality is also its major weakness: it accepts any
input program, even if its CFG is not reducible, but the output
program lacks any useful convergence information. It satisfies the
letter of the SPIR-V requirements, but it is expected that it will
be very inefficient to run on a GPU (unless a downstream compiler is
able to devirtualize the control flow and do a proper convergence
analysis pass). The algorithm is however very simple, and good enough
to at least pass tests, enabling further development. A better
alternative is expected to be upstreamed incrementally.

Side note: the structured program theorem is often called the
Böhm-Jacopini theorem; Böhm and Jacopini did indeed prove a variation
of it, but their algorithm is different from what is commontly attributed
to them and implemented here, so I opted for not using their name.
 2024-02-06 23:07:07 +01:00
Giovanni Mascellani
19aef21369 vkd3d-shader/ir: Handle PHI nodes when materializing SSA registers. 
PHI nodes cannot be used with TEMP registers, so they have to be
converted to MOV/MOVC nodes and moved before the BRANCH node.
 2024-02-06 23:07:03 +01:00
Giovanni Mascellani
e0d3e9c376 vkd3d-shader/ir: Materialize SSA registers to temporaries. 
For simplicity PHI nodes are not currently handled.

The goal for this pass is to make the CFG structurizer simpler, because
it doesn't have to care about the more rigid rules SSA registers have
to satisfy than TEMP registers.

It is likely that the generated code will be harder for downstream
compilers to optimize and execute efficiently, so once a complete
structurizer is in place this pass should be removed, or at least
greatly reduced in scope.
 2024-02-06 23:07:00 +01:00
Henri Verbeet
d38221bd68 vkd3d-shader/ir: Pass a struct vsir_program to shader_parser_get_src_params(). 2024-02-01 00:08:23 +01:00
Henri Verbeet
47ec24ebad vkd3d-shader/ir: Pass a struct vsir_program to shader_parser_get_dst_params(). 2024-02-01 00:08:22 +01:00
Giovanni Mascellani
edc406d297 vkd3d-shader/ir: Check that SSA registers are used with compatible data types. 
Specifically, accesses are always 32 bit or always 64 bit.
 2024-01-29 22:33:34 +01:00
Giovanni Mascellani
026c502f31 vkd3d-shader/ir: Fixup PHI nodes when lowering switches to selection ladders. 
A map between the blocks before and after the pass is built and then
used to fix the PHI nodes.
 2024-01-29 22:33:17 +01:00
Giovanni Mascellani
378109051c vkd3d-shader/ir: Lower monolithic switches to selection ladders. 
PHI nodes must be fixed up after this pass, because the block references
might have become broken. For simplicitly this is not handled yet.

The goal for this pass is to make the CFG structurizer simpler, because
only conditional and unconditional branches must be supported.
Eventually this limitation might be lifted if there is advantage in
doing so.
 2024-01-29 22:33:15 +01:00
Francisco Casas
cec45da45b vkd3d-shader/ir: Update flatten_control_flow_constructs() comment. 2024-01-25 22:24:27 +01:00
Henri Verbeet
eabcaf15fb vkd3d-shader/ir: Use vsir_instruction_is_dcl() in vsir_validate_instruction(). 2024-01-24 22:38:36 +01:00
Henri Verbeet
365ad56888 vkd3d-shader/ir: Get rid of shader_instruction_is_dcl(). 2024-01-24 22:38:34 +01:00
Francisco Casas
b92f6c448a vkd3d-shader/ir: Lower texkill instructions to discard_nz. 2024-01-24 22:37:41 +01:00
Henri Verbeet
bf628f0c74 vkd3d-shader/ir: Store block names in struct vsir_program. 2024-01-23 20:27:35 +01:00
Henri Verbeet
f3c7d2d05c vkd3d-shader/ir: Store the block count in struct vsir_program. 2024-01-23 20:27:34 +01:00
Giovanni Mascellani
de9725b6ba vkd3d-shader/ir: Remove DCL_TEMPS instructions. 
We have to do work to keep it updated across passes and we never read it.
 2024-01-23 20:26:38 +01:00
Giovanni Mascellani
4b869f73bb vkd3d-shader/ir: Run tracing and validation for DXIL code too. 2024-01-23 20:26:36 +01:00
Conor McCarthy
6df725718a vkd3d-shader/ir: Refactor return code checking in vkd3d_shader_normalise(). 
We started with only one or two of these but it has become excessive.

Patch originally written by Conor McCarthy and updated by Giovanni Mascellani.
 2024-01-23 20:26:34 +01:00
Giovanni Mascellani
232b2ad360 vkd3d-shader/ir: Validate PHI instructions. 2024-01-23 20:26:08 +01:00
Giovanni Mascellani
56f9057985 vkd3d-shader/ir: Do not allow IMMCONST and IMMCONST64 as destination registers. 2024-01-23 20:26:06 +01:00
Giovanni Mascellani
21633fcc52 vkd3d-shader/ir: Refactor register-type-specific code in parameter validation. 
To better accommodate code for other register types.
 2024-01-23 20:26:05 +01:00
Giovanni Mascellani
fb6409bda1 vkd3d-shader/ir: Check that all instructions appear in a block. 2024-01-23 20:26:03 +01:00
Henri Verbeet
adc02eada8 vkd3d-shader/ir: Store the temporary register count in struct vsir_program. 2024-01-22 22:18:53 +01:00
Henri Verbeet
94ca46916a vkd3d-shader/ir: Store the SSA register count in struct vsir_program. 2024-01-22 22:18:52 +01:00
Henri Verbeet
7b85cd6a31 vkd3d-shader/ir: Store the "use_vocp" field in struct vsir_program. 2024-01-22 22:18:51 +01:00
Henri Verbeet
23dcd4f22b vkd3d-shader/ir: Store the shader version in struct vsir_program. 2024-01-22 22:18:50 +01:00
Henri Verbeet
fc9043be3c vkd3d-shader/ir: Introduce struct vsir_program. 2024-01-22 22:18:48 +01:00
Giovanni Mascellani
67902d4304 vkd3d-shader/ir: Validate RET instructions. 2024-01-18 23:15:58 +01:00
Giovanni Mascellani
af96730276 vkd3d-shader/ir: Validate SWITCH_MONOLITHIC instructions. 2024-01-18 23:15:57 +01:00
Giovanni Mascellani
46ebb404d7 vkd3d-shader/ir: Validate BRANCH instructions. 2024-01-18 23:15:56 +01:00
Giovanni Mascellani
bc9db34cdc vkd3d-shader/ir: Validate LABEL instructions. 2024-01-18 23:15:55 +01:00
Giovanni Mascellani
dd1b2feec0 vkd3d-shader/ir: Validate LABEL registers. 2024-01-18 23:15:54 +01:00
Giovanni Mascellani
17f4afc2b5 vkd3d-shader/ir: Validate that structured CF does not appear in block-based shaders. 2024-01-18 23:15:53 +01:00
Conor McCarthy
83851133c5 vkd3d-shader/ir: Set merged signature element interpolation mode only from used elements. 2024-01-18 23:15:27 +01:00
Conor McCarthy
b8280e4210 vkd3d-shader/ir: Revert "Do not merge signature elements which have different interpolation modes.". 
This reverts commit b5c067b41a.

The commit causes regressions in other shaders because unused elements
do not have an interpolation mode.
 2024-01-18 23:15:25 +01:00
Conor McCarthy
efe800f7f0 vkd3d-shader/dxil: Handle the DXIL SWITCH instruction. 2024-01-18 23:15:14 +01:00
Conor McCarthy
4c30b23821 vkd3d-shader: Make the control point count the outer dimension of I/O arrays. 
The relative-addressed case in shader_register_normalise_arrayed_addressing()
leaves the control point id in idx[0], while for constant register
indices it is placed in idx[1]. The latter case could be fixed instead,
but placing the control point count in the outer dimension is more
logical.
 2024-01-17 22:28:59 +01:00
Conor McCarthy
418e8d8100 vkd3d-shader/ir: Expand index range write masks to cover all element masks. 
For example, this occurred in a shader:

reg_idx write_mask
   0      xyz
   1      xyzw
   2      xyzw
   3      xyz

The dcl_indexrange instruction covered only xyz, so once merged, searching for
xyzw failed.

It is impossible to declare an input array where elements have different
component counts, but the optimiser can create this case. One way for
this to occur is to dynamically index input values via a local array
containing copies of the input values. The optimiser converts this to
dynamically indexed inputs.
 2024-01-17 22:28:56 +01:00
Conor McCarthy
559d9d4ee0 vkd3d-shader/ir: Include an initial label instruction in the first control flow block. 2024-01-17 22:28:41 +01:00
Conor McCarthy
37d9dba512 vkd3d-shader/ir: Store code block names in struct vkd3d_shader_desc. 2024-01-17 22:28:38 +01:00
Conor McCarthy
ffc65215ba vkd3d-shader/ir: Flatten SWITCH/CASE/DEFAULT/ENDSWITCH control flow instructions. 2024-01-17 22:28:36 +01:00
Conor McCarthy
dcb8527327 vkd3d-shader/ir: Flatten LOOP/BREAK/CONTINUE/ENDLOOP control flow instructions. 2024-01-17 22:28:35 +01:00
Conor McCarthy
e1dddc01b7 vkd3d-shader/ir: Flatten IF/ELSE/ENDIF control flow instructions. 2024-01-17 22:28:34 +01:00
Giovanni Mascellani
b0c8a47f9d vkd3d-shader/ir: Check that SSA registers are used validly. 
Specifically, they are assigned only once and only assigned components
are used.

Right now we don't check that the assignment dominates all usages.
 2024-01-15 19:57:01 +01:00
Giovanni Mascellani
26bebe8f91 vkd3d-shader/ir: Check that SSA registers have consistent dimensions. 2024-01-15 19:57:00 +01:00
Giovanni Mascellani
7503429555 vkd3d-shader/ir: Check that TEMP registers have consistent dimensions. 2024-01-15 19:56:59 +01:00
Giovanni Mascellani
fbd77486de vkd3d-shader/ir: Use vkd3d_free() instead of free(). 2024-01-15 19:56:58 +01:00
Giovanni Mascellani
26c6a87268 vkd3d-shader/ir: Simplify control flow in vsir_validate_register(). 2024-01-15 19:56:56 +01:00
Giovanni Mascellani
78d95889bd vkd3d-shader: Make *src and *dst mutable in vkd3d_shader_instruction. 
They were originally made const because no optimization/normalization
pass existed. Now having to cast away const all the time is becoming
more and more burdening.
 2024-01-11 23:05:11 +01:00
Giovanni Mascellani
bd9118cac4 vkd3d-shader/ir: Validate destination write masks depending on the dimension. 2024-01-04 22:23:25 +01:00
Giovanni Mascellani
15e7711786 vkd3d-shader/ir: Validate source swizzles depending on the dimension. 2024-01-04 22:23:24 +01:00
Giovanni Mascellani
e91da41dea vkd3d-shader/ir: Validate SSA registers. 2024-01-04 22:23:23 +01:00
Zebediah Figura
1ce7e3d8b1 vkd3d-shader/d3dbc: Assign unique register indices for VKD3DSPR_RASTOUT. 2024-01-04 22:23:09 +01:00
Zebediah Figura
3f52fda8ad vkd3d-shader: Lower shader model 1/2 inter-stage I/O to a flat array. 
An alternative is that we stash the reg_type in the signature, but this seems
far simpler for the backend to deal with.
 2024-01-04 22:23:07 +01:00
Henri Verbeet
e33d3b3954 vkd3d-shader/ir: Rename the "immconst_uint" field of struct vkd3d_shader_register to "immconst_u32". 
For consistency with the rest of vkd3d-shader; e.g. put_u32() and
read_u32().
 2024-01-03 22:37:39 +01:00
Henri Verbeet
8a1de71fb1 vkd3d-shader/ir: Pass a uint32_t swizzle to vkd3d_swizzle_get_component(). 2023-12-14 23:19:49 +01:00
Henri Verbeet
713adaa56a vkd3d-shader/ir: Pass a uint32_t write mask to vkd3d_write_mask_component_count(). 2023-12-13 22:33:04 +01:00
Henri Verbeet
e1aa12f94b vkd3d-shader/ir: Pass a uint32_t write mask to vkd3d_write_mask_get_component_idx(). 2023-12-13 22:33:03 +01:00
Conor McCarthy
45679a966c vkd3d-shader/ir: Pass a local copy of location to control_point_normaliser_emit_hs_input(). 2023-12-07 21:57:49 +01:00
Conor McCarthy
b5c067b41a vkd3d-shader/ir: Do not merge signature elements which have different interpolation modes. 
Regression in signature normalisation, however the old code was not
correct either because it would apply the interpolation mode to all
components. Found in an Assassin's Creed: Valhalla shader.
 2023-12-06 15:31:18 +01:00
Conor McCarthy
eb05e434ff vkd3d-shader/dxil: Implement the DXIL LOAD instruction. 2023-11-22 22:07:59 +01:00
Conor McCarthy
59730ecfd8 vkd3d-shader/dxil: Implement the DXIL GEP instruction. 2023-11-22 22:07:58 +01:00
Giovanni Mascellani
b1123ed35f vkd3d-shader/ir: Correctly compute the TEMP count after hull shader flattening. 
The previous computation was incorrect because the count was taken
after resetting it to zero (as part of setting the instruction to NOP).
 2023-11-20 22:07:41 +01:00
Giovanni Mascellani
5cb17cfd1c vkd3d-shader/ir: Validate IFC instructions. 2023-11-20 22:07:36 +01:00
Giovanni Mascellani
849a8f3add vkd3d-shader/ir: Expect two sources for LOOP in SM1-3. 2023-11-20 22:07:35 +01:00
Giovanni Mascellani
0c5c18bdce vkd3d-shader/ir: Validate index count for IMMCONST64 registers. 2023-11-09 21:15:51 +01:00
Giovanni Mascellani
b74470b9d2 vkd3d-shader/ir: Validate index count for IMMCONST registers. 2023-11-09 21:15:49 +01:00
Giovanni Mascellani
c867682982 vkd3d-shader/ir: Validate index count for NULL registers. 2023-11-09 21:15:47 +01:00
Giovanni Mascellani
12fcb8dcc6 vkd3d-shader/ir: Validate register indices. 2023-11-09 21:15:44 +01:00
Giovanni Mascellani
b7aeb5dd70 vkd3d-shader/ir: Use vsir_register_init() to initialize a register. 2023-11-09 21:15:42 +01:00
Giovanni Mascellani
a869069a48 vkd3d-shader/ir: Validate the TEMP register indices in each HS phase. 2023-11-09 21:15:40 +01:00
Giovanni Mascellani
0f4bda9c9d vkd3d-shader/ir: Keep track of hull shader phases. 2023-11-09 21:15:38 +01:00
Conor McCarthy
5768c019c1 vkd3d-shader/ir: Check the handler before changing it to NOP in remove_dead_code(). 2023-11-09 21:15:29 +01:00
Zebediah Figura
c7a7d9a18c vkd3d-shader/ir: Normalize all I/O registers to INPUT/OUTPUT/PATCHCONST. 
Specifically, map COLOROUT to OUTPUT, and map INCONTROLPOINT to INPUT for domain
shaders as well as hull shaders.

Obscure the non-existent differences from the view of the backend.
 2023-11-09 21:14:52 +01:00
Zebediah Figura
852eefc01d vkd3d-shader/ir: Synthesize HS inputs with the register index and write mask of the signature element. 
This pass was written as if to output normalized I/O, but it runs before the I/O
normalization pass.

Fixes: 98b5e2c6e0
 2023-11-07 22:26:53 +01:00
Zebediah Figura
12240efa79 vkd3d-shader/spirv: Use register counts from the signature and shader desc. 2023-11-07 22:26:49 +01:00
Giovanni Mascellani
7d49f9637a vkd3d-shader/ir: Check that SWITCH blocks are correctly nested. 2023-11-07 22:26:05 +01:00
Giovanni Mascellani
93632fb407 vkd3d-shader/ir: Check that REP blocks are correctly nested. 2023-11-07 22:26:04 +01:00
Giovanni Mascellani
92c36615ed vkd3d-shader/ir: Check that LOOP blocks are correctly nested. 2023-11-07 22:26:03 +01:00
Giovanni Mascellani
2f7d52dba4 vkd3d-shader/ir: Check that IF blocks are correctly nested. 2023-11-07 22:26:01 +01:00
Giovanni Mascellani
0a7e200f89 vkd3d-shader/ir: Do not enfore DCL_TEMPS count for hull shaders. 
Hull shaders have a different temps count for each phase, and the
parser only reports the count for the patch constant phase.
In order to properly check for temps count on hull shaders, we first
need to decode its phases.
 2023-11-07 22:26:00 +01:00