2021-03-02 13:34:46 -08:00
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/*
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* HLSL optimization and code generation
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*
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* Copyright 2019-2020 Zebediah Figura for CodeWeavers
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA
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*/
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#include "hlsl.h"
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2021-03-28 12:46:55 -07:00
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#include <stdio.h>
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/* Split uniforms into two variables representing the constant and temp
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* registers, and copy the former to the latter, so that writes to uniforms
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* work. */
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2021-04-15 17:03:45 -07:00
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static void prepend_uniform_copy(struct hlsl_ctx *ctx, struct list *instrs, struct hlsl_ir_var *temp)
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2021-03-28 12:46:55 -07:00
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{
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struct vkd3d_string_buffer *name;
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2021-04-15 17:03:45 -07:00
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struct hlsl_ir_var *uniform;
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2021-04-08 21:38:22 -07:00
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struct hlsl_ir_store *store;
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2021-03-28 12:46:55 -07:00
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struct hlsl_ir_load *load;
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2021-04-15 17:03:45 -07:00
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/* Use the synthetic name for the temp, rather than the uniform, so that we
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* can write the uniform name into the shader reflection data. */
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2021-05-31 19:41:14 -07:00
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if (!(uniform = hlsl_new_var(ctx, temp->name, temp->data_type, temp->loc, NULL, 0, &temp->reg_reservation)))
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2021-03-28 12:46:55 -07:00
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return;
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2021-04-15 17:03:45 -07:00
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list_add_before(&temp->scope_entry, &uniform->scope_entry);
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list_add_tail(&ctx->extern_vars, &uniform->extern_entry);
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uniform->is_uniform = 1;
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2021-04-15 17:03:46 -07:00
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uniform->is_param = temp->is_param;
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2021-06-21 21:37:10 -07:00
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uniform->buffer = temp->buffer;
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2021-04-15 17:03:45 -07:00
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2021-05-20 22:32:21 -07:00
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if (!(name = hlsl_get_string_buffer(ctx)))
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2021-03-28 12:46:55 -07:00
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return;
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2021-04-15 17:03:45 -07:00
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vkd3d_string_buffer_printf(name, "<temp-%s>", temp->name);
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2021-05-20 22:32:20 -07:00
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temp->name = hlsl_strdup(ctx, name->buffer);
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2021-05-20 22:32:21 -07:00
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hlsl_release_string_buffer(ctx, name);
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2021-03-28 12:46:55 -07:00
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2021-05-20 22:32:20 -07:00
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if (!(load = hlsl_new_var_load(ctx, uniform, temp->loc)))
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2021-03-28 12:46:55 -07:00
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return;
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list_add_head(instrs, &load->node.entry);
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2021-05-20 22:32:20 -07:00
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if (!(store = hlsl_new_simple_store(ctx, temp, &load->node)))
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2021-03-28 12:46:55 -07:00
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return;
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list_add_after(&load->node.entry, &store->node.entry);
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}
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2021-03-02 13:34:46 -08:00
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2021-03-28 12:46:57 -07:00
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static void prepend_input_copy(struct hlsl_ctx *ctx, struct list *instrs, struct hlsl_ir_var *var,
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2021-04-27 10:14:19 -07:00
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struct hlsl_type *type, unsigned int field_offset, const struct hlsl_semantic *semantic)
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2021-03-28 12:46:57 -07:00
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{
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struct vkd3d_string_buffer *name;
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2021-04-27 10:14:19 -07:00
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struct hlsl_semantic new_semantic;
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2021-03-28 12:46:57 -07:00
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struct hlsl_ir_constant *offset;
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2021-04-08 21:38:22 -07:00
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struct hlsl_ir_store *store;
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2021-03-28 12:46:57 -07:00
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struct hlsl_ir_load *load;
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2021-04-27 10:14:20 -07:00
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struct hlsl_ir_var *input;
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2021-03-28 12:46:57 -07:00
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2021-05-20 22:32:21 -07:00
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if (!(name = hlsl_get_string_buffer(ctx)))
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2021-03-28 12:46:57 -07:00
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return;
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2021-04-27 10:14:19 -07:00
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vkd3d_string_buffer_printf(name, "<input-%s%u>", semantic->name, semantic->index);
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2021-05-20 22:32:20 -07:00
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if (!(new_semantic.name = hlsl_strdup(ctx, semantic->name)))
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2021-03-28 12:46:57 -07:00
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{
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2021-05-20 22:32:21 -07:00
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hlsl_release_string_buffer(ctx, name);
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2021-03-28 12:46:57 -07:00
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return;
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}
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2021-04-27 10:14:19 -07:00
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new_semantic.index = semantic->index;
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2021-05-20 22:32:20 -07:00
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if (!(input = hlsl_new_var(ctx, hlsl_strdup(ctx, name->buffer), type, var->loc, &new_semantic, 0, NULL)))
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2021-04-27 10:14:19 -07:00
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{
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2021-05-20 22:32:21 -07:00
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hlsl_release_string_buffer(ctx, name);
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2021-04-27 10:14:19 -07:00
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vkd3d_free((void *)new_semantic.name);
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return;
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}
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2021-05-20 22:32:21 -07:00
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hlsl_release_string_buffer(ctx, name);
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2021-04-27 10:14:20 -07:00
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input->is_input_semantic = 1;
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input->is_param = var->is_param;
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list_add_before(&var->scope_entry, &input->scope_entry);
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list_add_tail(&ctx->extern_vars, &input->extern_entry);
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2021-03-28 12:46:57 -07:00
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2021-05-20 22:32:20 -07:00
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if (!(load = hlsl_new_var_load(ctx, input, var->loc)))
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2021-03-28 12:46:57 -07:00
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return;
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list_add_head(instrs, &load->node.entry);
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2021-06-22 10:29:03 -07:00
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if (!(offset = hlsl_new_uint_constant(ctx, field_offset, var->loc)))
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2021-03-28 12:46:57 -07:00
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return;
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list_add_after(&load->node.entry, &offset->node.entry);
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2021-05-20 22:32:20 -07:00
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if (!(store = hlsl_new_store(ctx, var, &offset->node, &load->node, 0, var->loc)))
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2021-03-28 12:46:57 -07:00
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return;
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list_add_after(&offset->node.entry, &store->node.entry);
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}
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static void prepend_input_struct_copy(struct hlsl_ctx *ctx, struct list *instrs, struct hlsl_ir_var *var,
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struct hlsl_type *type, unsigned int field_offset)
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{
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struct hlsl_struct_field *field;
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LIST_FOR_EACH_ENTRY(field, type->e.elements, struct hlsl_struct_field, entry)
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{
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if (field->type->type == HLSL_CLASS_STRUCT)
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prepend_input_struct_copy(ctx, instrs, var, field->type, field_offset + field->reg_offset);
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2021-04-27 10:14:19 -07:00
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else if (field->semantic.name)
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prepend_input_copy(ctx, instrs, var, field->type, field_offset + field->reg_offset, &field->semantic);
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2021-03-28 12:46:57 -07:00
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else
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hlsl_error(ctx, field->loc, VKD3D_SHADER_ERROR_HLSL_MISSING_SEMANTIC,
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"Field '%s' is missing a semantic.", field->name);
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}
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}
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2021-04-27 10:14:20 -07:00
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/* Split inputs into two variables representing the semantic and temp registers,
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* and copy the former to the latter, so that writes to input variables work. */
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2021-03-28 12:46:57 -07:00
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static void prepend_input_var_copy(struct hlsl_ctx *ctx, struct list *instrs, struct hlsl_ir_var *var)
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{
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if (var->data_type->type == HLSL_CLASS_STRUCT)
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prepend_input_struct_copy(ctx, instrs, var, var->data_type, 0);
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2021-04-27 10:14:19 -07:00
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else if (var->semantic.name)
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prepend_input_copy(ctx, instrs, var, var->data_type, 0, &var->semantic);
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2021-03-28 12:46:57 -07:00
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}
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2021-03-28 12:46:59 -07:00
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static void append_output_copy(struct hlsl_ctx *ctx, struct list *instrs, struct hlsl_ir_var *var,
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2021-04-27 10:14:19 -07:00
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struct hlsl_type *type, unsigned int field_offset, const struct hlsl_semantic *semantic)
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2021-03-28 12:46:59 -07:00
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{
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struct vkd3d_string_buffer *name;
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2021-04-27 10:14:19 -07:00
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struct hlsl_semantic new_semantic;
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2021-03-28 12:46:59 -07:00
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struct hlsl_ir_constant *offset;
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2021-04-08 21:38:22 -07:00
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struct hlsl_ir_store *store;
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2021-04-27 10:14:20 -07:00
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struct hlsl_ir_var *output;
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2021-03-28 12:46:59 -07:00
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struct hlsl_ir_load *load;
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2021-05-20 22:32:21 -07:00
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if (!(name = hlsl_get_string_buffer(ctx)))
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2021-03-28 12:46:59 -07:00
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return;
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2021-04-27 10:14:19 -07:00
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vkd3d_string_buffer_printf(name, "<output-%s%u>", semantic->name, semantic->index);
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2021-05-20 22:32:20 -07:00
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if (!(new_semantic.name = hlsl_strdup(ctx, semantic->name)))
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2021-04-27 10:14:19 -07:00
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{
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2021-05-20 22:32:21 -07:00
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hlsl_release_string_buffer(ctx, name);
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2021-04-27 10:14:19 -07:00
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return;
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}
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new_semantic.index = semantic->index;
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2021-05-20 22:32:20 -07:00
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if (!(output = hlsl_new_var(ctx, hlsl_strdup(ctx, name->buffer), type, var->loc, &new_semantic, 0, NULL)))
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2021-03-28 12:46:59 -07:00
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{
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2021-04-27 10:14:19 -07:00
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vkd3d_free((void *)new_semantic.name);
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2021-05-20 22:32:21 -07:00
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hlsl_release_string_buffer(ctx, name);
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2021-03-28 12:46:59 -07:00
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return;
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}
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2021-05-20 22:32:21 -07:00
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hlsl_release_string_buffer(ctx, name);
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2021-04-27 10:14:20 -07:00
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output->is_output_semantic = 1;
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output->is_param = var->is_param;
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list_add_before(&var->scope_entry, &output->scope_entry);
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list_add_tail(&ctx->extern_vars, &output->extern_entry);
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2021-03-28 12:46:59 -07:00
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2021-06-22 10:29:03 -07:00
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if (!(offset = hlsl_new_uint_constant(ctx, field_offset, var->loc)))
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2021-03-28 12:46:59 -07:00
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return;
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list_add_tail(instrs, &offset->node.entry);
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2021-05-20 22:32:20 -07:00
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if (!(load = hlsl_new_load(ctx, var, &offset->node, type, var->loc)))
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2021-03-28 12:46:59 -07:00
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return;
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list_add_after(&offset->node.entry, &load->node.entry);
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2021-05-20 22:32:20 -07:00
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if (!(store = hlsl_new_store(ctx, output, NULL, &load->node, 0, var->loc)))
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2021-03-28 12:46:59 -07:00
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return;
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list_add_after(&load->node.entry, &store->node.entry);
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}
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static void append_output_struct_copy(struct hlsl_ctx *ctx, struct list *instrs, struct hlsl_ir_var *var,
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struct hlsl_type *type, unsigned int field_offset)
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{
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struct hlsl_struct_field *field;
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LIST_FOR_EACH_ENTRY(field, type->e.elements, struct hlsl_struct_field, entry)
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{
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if (field->type->type == HLSL_CLASS_STRUCT)
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append_output_struct_copy(ctx, instrs, var, field->type, field_offset + field->reg_offset);
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2021-04-27 10:14:19 -07:00
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else if (field->semantic.name)
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append_output_copy(ctx, instrs, var, field->type, field_offset + field->reg_offset, &field->semantic);
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2021-03-28 12:46:59 -07:00
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else
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hlsl_error(ctx, field->loc, VKD3D_SHADER_ERROR_HLSL_MISSING_SEMANTIC,
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"Field '%s' is missing a semantic.", field->name);
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}
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}
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2021-04-27 10:14:20 -07:00
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/* Split outputs into two variables representing the temp and semantic
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2021-03-28 12:46:59 -07:00
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* registers, and copy the former to the latter, so that reads from output
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2021-04-27 10:14:20 -07:00
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* variables work. */
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2021-03-28 12:46:59 -07:00
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static void append_output_var_copy(struct hlsl_ctx *ctx, struct list *instrs, struct hlsl_ir_var *var)
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{
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if (var->data_type->type == HLSL_CLASS_STRUCT)
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append_output_struct_copy(ctx, instrs, var, var->data_type, 0);
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2021-04-27 10:14:19 -07:00
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else if (var->semantic.name)
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append_output_copy(ctx, instrs, var, var->data_type, 0, &var->semantic);
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2021-03-28 12:46:59 -07:00
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}
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2021-03-16 14:31:53 -07:00
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static bool transform_ir(struct hlsl_ctx *ctx, bool (*func)(struct hlsl_ctx *ctx, struct hlsl_ir_node *, void *),
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struct list *instrs, void *context)
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{
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struct hlsl_ir_node *instr, *next;
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bool progress = 0;
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LIST_FOR_EACH_ENTRY_SAFE(instr, next, instrs, struct hlsl_ir_node, entry)
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{
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if (instr->type == HLSL_IR_IF)
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{
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struct hlsl_ir_if *iff = hlsl_ir_if(instr);
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progress |= transform_ir(ctx, func, &iff->then_instrs, context);
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progress |= transform_ir(ctx, func, &iff->else_instrs, context);
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}
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else if (instr->type == HLSL_IR_LOOP)
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progress |= transform_ir(ctx, func, &hlsl_ir_loop(instr)->body, context);
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progress |= func(ctx, instr, context);
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}
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return progress;
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}
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static void replace_node(struct hlsl_ir_node *old, struct hlsl_ir_node *new)
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{
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struct hlsl_src *src, *next;
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LIST_FOR_EACH_ENTRY_SAFE(src, next, &old->uses, struct hlsl_src, entry)
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{
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hlsl_src_remove(src);
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hlsl_src_from_node(src, new);
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}
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list_remove(&old->entry);
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hlsl_free_instr(old);
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}
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2021-03-16 14:31:56 -07:00
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static bool is_vec1(const struct hlsl_type *type)
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{
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return (type->type == HLSL_CLASS_SCALAR) || (type->type == HLSL_CLASS_VECTOR && type->dimx == 1);
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}
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2021-03-16 14:31:55 -07:00
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static bool fold_redundant_casts(struct hlsl_ctx *ctx, struct hlsl_ir_node *instr, void *context)
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{
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if (instr->type == HLSL_IR_EXPR)
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{
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struct hlsl_ir_expr *expr = hlsl_ir_expr(instr);
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2021-03-16 14:31:56 -07:00
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const struct hlsl_type *src_type = expr->operands[0].node->data_type;
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const struct hlsl_type *dst_type = expr->node.data_type;
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2021-08-12 17:36:13 -07:00
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if (expr->op != HLSL_OP1_CAST)
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2021-03-16 14:31:56 -07:00
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return false;
|
2021-03-16 14:31:55 -07:00
|
|
|
|
2021-03-17 22:22:19 -07:00
|
|
|
if (hlsl_types_are_equal(src_type, dst_type)
|
2021-03-16 14:31:56 -07:00
|
|
|
|| (src_type->base_type == dst_type->base_type && is_vec1(src_type) && is_vec1(dst_type)))
|
2021-03-16 14:31:55 -07:00
|
|
|
{
|
|
|
|
replace_node(&expr->node, expr->operands[0].node);
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2021-08-12 17:36:14 -07:00
|
|
|
/* Helper for split_array_copies() and split_struct_copies(). Inserts new
|
|
|
|
* instructions right before "store". */
|
|
|
|
static bool split_copy(struct hlsl_ctx *ctx, struct hlsl_ir_store *store,
|
|
|
|
const struct hlsl_ir_load *load, const unsigned int offset, struct hlsl_type *type)
|
|
|
|
{
|
|
|
|
struct hlsl_ir_node *offset_instr, *add;
|
|
|
|
struct hlsl_ir_store *split_store;
|
|
|
|
struct hlsl_ir_load *split_load;
|
|
|
|
struct hlsl_ir_constant *c;
|
|
|
|
|
|
|
|
if (!(c = hlsl_new_uint_constant(ctx, offset, store->node.loc)))
|
|
|
|
return false;
|
|
|
|
list_add_before(&store->node.entry, &c->node.entry);
|
|
|
|
|
|
|
|
offset_instr = &c->node;
|
|
|
|
if (load->src.offset.node)
|
|
|
|
{
|
|
|
|
if (!(add = hlsl_new_binary_expr(ctx, HLSL_OP2_ADD, load->src.offset.node, &c->node)))
|
|
|
|
return false;
|
|
|
|
list_add_before(&store->node.entry, &add->entry);
|
|
|
|
offset_instr = add;
|
|
|
|
}
|
|
|
|
if (!(split_load = hlsl_new_load(ctx, load->src.var, offset_instr, type, store->node.loc)))
|
|
|
|
return false;
|
|
|
|
list_add_before(&store->node.entry, &split_load->node.entry);
|
|
|
|
|
|
|
|
offset_instr = &c->node;
|
|
|
|
if (store->lhs.offset.node)
|
|
|
|
{
|
|
|
|
if (!(add = hlsl_new_binary_expr(ctx, HLSL_OP2_ADD, store->lhs.offset.node, &c->node)))
|
|
|
|
return false;
|
|
|
|
list_add_before(&store->node.entry, &add->entry);
|
|
|
|
offset_instr = add;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!(split_store = hlsl_new_store(ctx, store->lhs.var, offset_instr, &split_load->node, 0, store->node.loc)))
|
|
|
|
return false;
|
|
|
|
list_add_before(&store->node.entry, &split_store->node.entry);
|
|
|
|
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool split_array_copies(struct hlsl_ctx *ctx, struct hlsl_ir_node *instr, void *context)
|
2021-03-17 22:22:21 -07:00
|
|
|
{
|
|
|
|
const struct hlsl_ir_node *rhs;
|
2021-08-12 17:36:14 -07:00
|
|
|
struct hlsl_type *element_type;
|
2021-03-17 22:22:21 -07:00
|
|
|
const struct hlsl_type *type;
|
2021-08-12 17:36:14 -07:00
|
|
|
unsigned int element_size, i;
|
2021-04-08 21:38:22 -07:00
|
|
|
struct hlsl_ir_store *store;
|
2021-03-17 22:22:21 -07:00
|
|
|
|
2021-04-08 21:38:22 -07:00
|
|
|
if (instr->type != HLSL_IR_STORE)
|
2021-03-17 22:22:21 -07:00
|
|
|
return false;
|
|
|
|
|
2021-04-08 21:38:22 -07:00
|
|
|
store = hlsl_ir_store(instr);
|
|
|
|
rhs = store->rhs.node;
|
2021-03-17 22:22:21 -07:00
|
|
|
type = rhs->data_type;
|
2021-08-12 17:36:14 -07:00
|
|
|
if (type->type != HLSL_CLASS_ARRAY)
|
2021-03-17 22:22:21 -07:00
|
|
|
return false;
|
2021-08-12 17:36:14 -07:00
|
|
|
element_type = type->e.array.type;
|
|
|
|
element_size = element_type->reg_size;
|
2021-03-17 22:22:21 -07:00
|
|
|
|
2021-08-12 17:36:14 -07:00
|
|
|
for (i = 0; i < type->e.array.elements_count; ++i)
|
2021-03-17 22:22:21 -07:00
|
|
|
{
|
2021-08-12 17:36:14 -07:00
|
|
|
if (!split_copy(ctx, store, hlsl_ir_load(rhs), i * element_size, element_type))
|
2021-03-17 22:22:21 -07:00
|
|
|
return false;
|
2021-08-12 17:36:14 -07:00
|
|
|
}
|
2021-03-17 22:22:21 -07:00
|
|
|
|
2021-08-12 17:36:14 -07:00
|
|
|
/* Remove the store instruction, so that we can split structs which contain
|
|
|
|
* other structs. Although assignments produce a value, we don't allow
|
|
|
|
* HLSL_IR_STORE to be used as a source. */
|
|
|
|
list_remove(&store->node.entry);
|
|
|
|
hlsl_free_instr(&store->node);
|
|
|
|
return true;
|
|
|
|
}
|
2021-03-17 22:22:21 -07:00
|
|
|
|
2021-08-12 17:36:14 -07:00
|
|
|
static bool split_struct_copies(struct hlsl_ctx *ctx, struct hlsl_ir_node *instr, void *context)
|
|
|
|
{
|
|
|
|
const struct hlsl_struct_field *field;
|
|
|
|
const struct hlsl_ir_node *rhs;
|
|
|
|
const struct hlsl_type *type;
|
|
|
|
struct hlsl_ir_store *store;
|
2021-03-17 22:22:21 -07:00
|
|
|
|
2021-08-12 17:36:14 -07:00
|
|
|
if (instr->type != HLSL_IR_STORE)
|
|
|
|
return false;
|
|
|
|
|
|
|
|
store = hlsl_ir_store(instr);
|
|
|
|
rhs = store->rhs.node;
|
|
|
|
type = rhs->data_type;
|
|
|
|
if (type->type != HLSL_CLASS_STRUCT)
|
|
|
|
return false;
|
|
|
|
|
|
|
|
LIST_FOR_EACH_ENTRY(field, type->e.elements, struct hlsl_struct_field, entry)
|
|
|
|
{
|
|
|
|
if (!split_copy(ctx, store, hlsl_ir_load(rhs), field->reg_offset, field->type))
|
2021-03-17 22:22:21 -07:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2021-04-08 21:38:22 -07:00
|
|
|
/* Remove the store instruction, so that we can split structs which contain
|
|
|
|
* other structs. Although assignments produce a value, we don't allow
|
|
|
|
* HLSL_IR_STORE to be used as a source. */
|
|
|
|
list_remove(&store->node.entry);
|
|
|
|
hlsl_free_instr(&store->node);
|
2021-03-17 22:22:21 -07:00
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2021-03-16 14:31:53 -07:00
|
|
|
static bool fold_constants(struct hlsl_ctx *ctx, struct hlsl_ir_node *instr, void *context)
|
|
|
|
{
|
|
|
|
struct hlsl_ir_constant *arg1, *arg2 = NULL, *res;
|
|
|
|
struct hlsl_ir_expr *expr;
|
2021-05-31 19:41:11 -07:00
|
|
|
unsigned int i, dimx;
|
2021-03-16 14:31:53 -07:00
|
|
|
|
|
|
|
if (instr->type != HLSL_IR_EXPR)
|
|
|
|
return false;
|
|
|
|
expr = hlsl_ir_expr(instr);
|
|
|
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE(expr->operands); ++i)
|
|
|
|
{
|
|
|
|
if (expr->operands[i].node && expr->operands[i].node->type != HLSL_IR_CONSTANT)
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
arg1 = hlsl_ir_constant(expr->operands[0].node);
|
|
|
|
if (expr->operands[1].node)
|
|
|
|
arg2 = hlsl_ir_constant(expr->operands[1].node);
|
2021-05-31 19:41:11 -07:00
|
|
|
dimx = instr->data_type->dimx;
|
2021-03-16 14:31:53 -07:00
|
|
|
|
2021-05-20 22:32:20 -07:00
|
|
|
if (!(res = hlsl_alloc(ctx, sizeof(*res))))
|
2021-03-16 14:31:53 -07:00
|
|
|
return false;
|
|
|
|
init_node(&res->node, HLSL_IR_CONSTANT, instr->data_type, instr->loc);
|
|
|
|
|
|
|
|
switch (instr->data_type->base_type)
|
|
|
|
{
|
2021-05-31 19:41:11 -07:00
|
|
|
case HLSL_TYPE_FLOAT:
|
2021-03-16 14:31:53 -07:00
|
|
|
{
|
2021-05-31 19:41:11 -07:00
|
|
|
switch (expr->op)
|
|
|
|
{
|
2021-08-12 17:36:13 -07:00
|
|
|
case HLSL_OP1_CAST:
|
2021-05-31 19:41:11 -07:00
|
|
|
if (instr->data_type->dimx != arg1->node.data_type->dimx
|
|
|
|
|| instr->data_type->dimy != arg1->node.data_type->dimy)
|
|
|
|
{
|
|
|
|
FIXME("Cast from %s to %s.\n", debug_hlsl_type(ctx, arg1->node.data_type),
|
|
|
|
debug_hlsl_type(ctx, instr->data_type));
|
|
|
|
vkd3d_free(res);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (arg1->node.data_type->base_type)
|
|
|
|
{
|
2021-08-09 19:56:15 -07:00
|
|
|
case HLSL_TYPE_INT:
|
|
|
|
for (i = 0; i < dimx; ++i)
|
2021-09-20 14:40:10 -07:00
|
|
|
res->value[i].f = arg1->value[i].i;
|
2021-08-09 19:56:15 -07:00
|
|
|
break;
|
|
|
|
|
2021-05-31 19:41:11 -07:00
|
|
|
case HLSL_TYPE_UINT:
|
|
|
|
for (i = 0; i < dimx; ++i)
|
2021-09-20 14:40:10 -07:00
|
|
|
res->value[i].f = arg1->value[i].u;
|
2021-05-31 19:41:11 -07:00
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
FIXME("Cast from %s to %s.\n", debug_hlsl_type(ctx, arg1->node.data_type),
|
|
|
|
debug_hlsl_type(ctx, instr->data_type));
|
|
|
|
vkd3d_free(res);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
FIXME("Fold float op %#x.\n", expr->op);
|
|
|
|
vkd3d_free(res);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
2021-03-16 14:31:53 -07:00
|
|
|
|
2021-05-31 19:41:11 -07:00
|
|
|
case HLSL_TYPE_UINT:
|
|
|
|
{
|
2021-03-16 14:31:53 -07:00
|
|
|
switch (expr->op)
|
|
|
|
{
|
2021-08-12 17:36:13 -07:00
|
|
|
case HLSL_OP1_NEG:
|
2021-08-09 19:56:16 -07:00
|
|
|
for (i = 0; i < instr->data_type->dimx; ++i)
|
2021-09-20 14:40:10 -07:00
|
|
|
res->value[i].u = -arg1->value[i].u;
|
2021-08-09 19:56:16 -07:00
|
|
|
break;
|
|
|
|
|
2021-08-12 17:36:13 -07:00
|
|
|
case HLSL_OP2_ADD:
|
2021-03-16 14:31:53 -07:00
|
|
|
for (i = 0; i < instr->data_type->dimx; ++i)
|
2021-09-20 14:40:10 -07:00
|
|
|
res->value[i].u = arg1->value[i].u + arg2->value[i].u;
|
2021-03-16 14:31:53 -07:00
|
|
|
break;
|
|
|
|
|
2021-08-12 17:36:13 -07:00
|
|
|
case HLSL_OP2_MUL:
|
2021-03-16 14:31:53 -07:00
|
|
|
for (i = 0; i < instr->data_type->dimx; ++i)
|
2021-09-20 14:40:10 -07:00
|
|
|
res->value[i].u = arg1->value[i].u * arg2->value[i].u;
|
2021-03-16 14:31:53 -07:00
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
FIXME("Fold uint op %#x.\n", expr->op);
|
|
|
|
vkd3d_free(res);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
default:
|
|
|
|
FIXME("Fold type %#x op %#x.\n", instr->data_type->base_type, expr->op);
|
|
|
|
vkd3d_free(res);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2021-03-16 14:31:55 -07:00
|
|
|
list_add_before(&expr->node.entry, &res->node.entry);
|
2021-03-16 14:31:53 -07:00
|
|
|
replace_node(&expr->node, &res->node);
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2021-05-20 22:32:24 -07:00
|
|
|
/* Lower DIV to RCP + MUL. */
|
|
|
|
static bool lower_division(struct hlsl_ctx *ctx, struct hlsl_ir_node *instr, void *context)
|
|
|
|
{
|
|
|
|
struct hlsl_ir_expr *expr;
|
|
|
|
struct hlsl_ir_node *rcp;
|
|
|
|
|
|
|
|
if (instr->type != HLSL_IR_EXPR)
|
|
|
|
return false;
|
|
|
|
expr = hlsl_ir_expr(instr);
|
2021-08-12 17:36:13 -07:00
|
|
|
if (expr->op != HLSL_OP2_DIV)
|
2021-05-20 22:32:24 -07:00
|
|
|
return false;
|
|
|
|
|
2021-08-12 17:36:13 -07:00
|
|
|
if (!(rcp = hlsl_new_unary_expr(ctx, HLSL_OP1_RCP, expr->operands[1].node, instr->loc)))
|
2021-05-20 22:32:24 -07:00
|
|
|
return false;
|
|
|
|
list_add_before(&expr->node.entry, &rcp->entry);
|
2021-08-12 17:36:13 -07:00
|
|
|
expr->op = HLSL_OP2_MUL;
|
2021-05-20 22:32:24 -07:00
|
|
|
hlsl_src_remove(&expr->operands[1]);
|
|
|
|
hlsl_src_from_node(&expr->operands[1], rcp);
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2021-03-16 14:31:54 -07:00
|
|
|
static bool dce(struct hlsl_ctx *ctx, struct hlsl_ir_node *instr, void *context)
|
|
|
|
{
|
|
|
|
switch (instr->type)
|
|
|
|
{
|
|
|
|
case HLSL_IR_CONSTANT:
|
|
|
|
case HLSL_IR_EXPR:
|
|
|
|
case HLSL_IR_LOAD:
|
2021-10-07 19:58:57 -07:00
|
|
|
case HLSL_IR_RESOURCE_LOAD:
|
2021-03-16 14:31:54 -07:00
|
|
|
case HLSL_IR_SWIZZLE:
|
|
|
|
if (list_empty(&instr->uses))
|
|
|
|
{
|
|
|
|
list_remove(&instr->entry);
|
|
|
|
hlsl_free_instr(instr);
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
2021-04-08 21:38:22 -07:00
|
|
|
case HLSL_IR_STORE:
|
2021-03-17 22:22:22 -07:00
|
|
|
{
|
2021-04-08 21:38:22 -07:00
|
|
|
struct hlsl_ir_store *store = hlsl_ir_store(instr);
|
|
|
|
struct hlsl_ir_var *var = store->lhs.var;
|
2021-03-17 22:22:22 -07:00
|
|
|
|
|
|
|
if (var->last_read < instr->index)
|
|
|
|
{
|
|
|
|
list_remove(&instr->entry);
|
|
|
|
hlsl_free_instr(instr);
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2021-03-16 14:31:54 -07:00
|
|
|
case HLSL_IR_IF:
|
|
|
|
case HLSL_IR_JUMP:
|
|
|
|
case HLSL_IR_LOOP:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2021-03-02 13:34:46 -08:00
|
|
|
/* Allocate a unique, ordered index to each instruction, which will be used for
|
|
|
|
* computing liveness ranges. */
|
|
|
|
static unsigned int index_instructions(struct list *instrs, unsigned int index)
|
|
|
|
{
|
|
|
|
struct hlsl_ir_node *instr;
|
|
|
|
|
|
|
|
LIST_FOR_EACH_ENTRY(instr, instrs, struct hlsl_ir_node, entry)
|
|
|
|
{
|
|
|
|
instr->index = index++;
|
|
|
|
|
|
|
|
if (instr->type == HLSL_IR_IF)
|
|
|
|
{
|
|
|
|
struct hlsl_ir_if *iff = hlsl_ir_if(instr);
|
|
|
|
index = index_instructions(&iff->then_instrs, index);
|
|
|
|
index = index_instructions(&iff->else_instrs, index);
|
|
|
|
}
|
|
|
|
else if (instr->type == HLSL_IR_LOOP)
|
|
|
|
{
|
|
|
|
index = index_instructions(&hlsl_ir_loop(instr)->body, index);
|
|
|
|
hlsl_ir_loop(instr)->next_index = index;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return index;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void dump_function_decl(struct rb_entry *entry, void *context)
|
|
|
|
{
|
|
|
|
struct hlsl_ir_function_decl *func = RB_ENTRY_VALUE(entry, struct hlsl_ir_function_decl, entry);
|
2021-05-20 22:32:22 -07:00
|
|
|
struct hlsl_ctx *ctx = context;
|
2021-03-02 13:34:46 -08:00
|
|
|
|
|
|
|
if (func->body)
|
2021-05-20 22:32:22 -07:00
|
|
|
hlsl_dump_function(ctx, func);
|
2021-03-02 13:34:46 -08:00
|
|
|
}
|
|
|
|
|
|
|
|
static void dump_function(struct rb_entry *entry, void *context)
|
|
|
|
{
|
|
|
|
struct hlsl_ir_function *func = RB_ENTRY_VALUE(entry, struct hlsl_ir_function, entry);
|
2021-05-20 22:32:22 -07:00
|
|
|
struct hlsl_ctx *ctx = context;
|
|
|
|
|
|
|
|
rb_for_each_entry(&func->overloads, dump_function_decl, ctx);
|
2021-03-02 13:34:46 -08:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Compute the earliest and latest liveness for each variable. In the case that
|
|
|
|
* a variable is accessed inside of a loop, we promote its liveness to extend
|
|
|
|
* to at least the range of the entire loop. Note that we don't need to do this
|
|
|
|
* for anonymous nodes, since there's currently no way to use a node which was
|
|
|
|
* calculated in an earlier iteration of the loop. */
|
|
|
|
static void compute_liveness_recurse(struct list *instrs, unsigned int loop_first, unsigned int loop_last)
|
|
|
|
{
|
|
|
|
struct hlsl_ir_node *instr;
|
|
|
|
struct hlsl_ir_var *var;
|
|
|
|
|
|
|
|
LIST_FOR_EACH_ENTRY(instr, instrs, struct hlsl_ir_node, entry)
|
|
|
|
{
|
2021-10-15 14:54:07 -07:00
|
|
|
const unsigned int var_last_read = loop_last ? max(instr->index, loop_last) : instr->index;
|
|
|
|
|
2021-03-02 13:34:46 -08:00
|
|
|
switch (instr->type)
|
|
|
|
{
|
2021-04-08 21:38:22 -07:00
|
|
|
case HLSL_IR_STORE:
|
2021-03-02 13:34:46 -08:00
|
|
|
{
|
2021-04-08 21:38:22 -07:00
|
|
|
struct hlsl_ir_store *store = hlsl_ir_store(instr);
|
2021-03-02 13:34:46 -08:00
|
|
|
|
2021-04-08 21:38:22 -07:00
|
|
|
var = store->lhs.var;
|
2021-03-02 13:34:46 -08:00
|
|
|
if (!var->first_write)
|
|
|
|
var->first_write = loop_first ? min(instr->index, loop_first) : instr->index;
|
2021-04-08 21:38:22 -07:00
|
|
|
store->rhs.node->last_read = instr->index;
|
|
|
|
if (store->lhs.offset.node)
|
|
|
|
store->lhs.offset.node->last_read = instr->index;
|
2021-03-02 13:34:46 -08:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
case HLSL_IR_EXPR:
|
|
|
|
{
|
|
|
|
struct hlsl_ir_expr *expr = hlsl_ir_expr(instr);
|
|
|
|
unsigned int i;
|
|
|
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE(expr->operands) && expr->operands[i].node; ++i)
|
|
|
|
expr->operands[i].node->last_read = instr->index;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case HLSL_IR_IF:
|
|
|
|
{
|
|
|
|
struct hlsl_ir_if *iff = hlsl_ir_if(instr);
|
|
|
|
|
|
|
|
compute_liveness_recurse(&iff->then_instrs, loop_first, loop_last);
|
|
|
|
compute_liveness_recurse(&iff->else_instrs, loop_first, loop_last);
|
|
|
|
iff->condition.node->last_read = instr->index;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case HLSL_IR_LOAD:
|
|
|
|
{
|
|
|
|
struct hlsl_ir_load *load = hlsl_ir_load(instr);
|
|
|
|
|
|
|
|
var = load->src.var;
|
2021-10-15 14:54:07 -07:00
|
|
|
var->last_read = max(var->last_read, var_last_read);
|
2021-03-02 13:34:46 -08:00
|
|
|
if (load->src.offset.node)
|
|
|
|
load->src.offset.node->last_read = instr->index;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case HLSL_IR_LOOP:
|
|
|
|
{
|
|
|
|
struct hlsl_ir_loop *loop = hlsl_ir_loop(instr);
|
|
|
|
|
|
|
|
compute_liveness_recurse(&loop->body, loop_first ? loop_first : instr->index,
|
|
|
|
loop_last ? loop_last : loop->next_index);
|
|
|
|
break;
|
|
|
|
}
|
2021-10-07 19:58:57 -07:00
|
|
|
case HLSL_IR_RESOURCE_LOAD:
|
|
|
|
{
|
|
|
|
struct hlsl_ir_resource_load *load = hlsl_ir_resource_load(instr);
|
|
|
|
|
2021-10-15 14:54:07 -07:00
|
|
|
var = load->resource.var;
|
|
|
|
var->last_read = max(var->last_read, var_last_read);
|
2021-10-07 19:58:57 -07:00
|
|
|
if (load->resource.offset.node)
|
|
|
|
load->resource.offset.node->last_read = instr->index;
|
|
|
|
load->coords.node->last_read = instr->index;
|
|
|
|
break;
|
|
|
|
}
|
2021-03-02 13:34:46 -08:00
|
|
|
case HLSL_IR_SWIZZLE:
|
|
|
|
{
|
|
|
|
struct hlsl_ir_swizzle *swizzle = hlsl_ir_swizzle(instr);
|
|
|
|
|
|
|
|
swizzle->val.node->last_read = instr->index;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case HLSL_IR_CONSTANT:
|
|
|
|
case HLSL_IR_JUMP:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void compute_liveness(struct hlsl_ctx *ctx, struct hlsl_ir_function_decl *entry_func)
|
|
|
|
{
|
2021-03-17 22:22:22 -07:00
|
|
|
struct hlsl_scope *scope;
|
2021-03-02 13:34:46 -08:00
|
|
|
struct hlsl_ir_var *var;
|
|
|
|
|
2021-03-17 22:22:22 -07:00
|
|
|
/* Index 0 means unused; index 1 means function entry, so start at 2. */
|
|
|
|
index_instructions(entry_func->body, 2);
|
|
|
|
|
|
|
|
LIST_FOR_EACH_ENTRY(scope, &ctx->scopes, struct hlsl_scope, entry)
|
|
|
|
{
|
|
|
|
LIST_FOR_EACH_ENTRY(var, &scope->vars, struct hlsl_ir_var, scope_entry)
|
|
|
|
var->first_write = var->last_read = 0;
|
|
|
|
}
|
|
|
|
|
2021-04-15 17:03:44 -07:00
|
|
|
LIST_FOR_EACH_ENTRY(var, &ctx->extern_vars, struct hlsl_ir_var, extern_entry)
|
2021-03-02 13:34:46 -08:00
|
|
|
{
|
2021-04-27 10:14:20 -07:00
|
|
|
if (var->is_uniform || var->is_input_semantic)
|
2021-03-22 15:02:40 -07:00
|
|
|
var->first_write = 1;
|
2021-04-27 10:14:20 -07:00
|
|
|
else if (var->is_output_semantic)
|
2021-03-28 12:46:59 -07:00
|
|
|
var->last_read = UINT_MAX;
|
2021-03-02 13:34:46 -08:00
|
|
|
}
|
|
|
|
|
|
|
|
if (entry_func->return_var)
|
|
|
|
entry_func->return_var->last_read = UINT_MAX;
|
|
|
|
|
|
|
|
compute_liveness_recurse(entry_func->body, 0, 0);
|
|
|
|
}
|
|
|
|
|
2021-04-08 21:38:23 -07:00
|
|
|
struct liveness
|
|
|
|
{
|
|
|
|
size_t size;
|
2021-08-19 16:44:30 -07:00
|
|
|
uint32_t reg_count;
|
2021-04-08 21:38:23 -07:00
|
|
|
struct
|
|
|
|
{
|
|
|
|
/* 0 if not live yet. */
|
|
|
|
unsigned int last_read;
|
|
|
|
} *regs;
|
|
|
|
};
|
|
|
|
|
|
|
|
static unsigned int get_available_writemask(struct liveness *liveness,
|
|
|
|
unsigned int first_write, unsigned int component_idx, unsigned int component_count)
|
|
|
|
{
|
|
|
|
unsigned int i, writemask = 0, count = 0;
|
|
|
|
|
|
|
|
for (i = 0; i < 4; ++i)
|
|
|
|
{
|
|
|
|
if (liveness->regs[component_idx + i].last_read <= first_write)
|
|
|
|
{
|
|
|
|
writemask |= 1u << i;
|
|
|
|
if (++count == component_count)
|
|
|
|
return writemask;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2021-05-20 22:32:20 -07:00
|
|
|
static bool resize_liveness(struct hlsl_ctx *ctx, struct liveness *liveness, size_t new_count)
|
2021-04-08 21:38:23 -07:00
|
|
|
{
|
|
|
|
size_t old_capacity = liveness->size;
|
|
|
|
|
2021-05-20 22:32:20 -07:00
|
|
|
if (!hlsl_array_reserve(ctx, (void **)&liveness->regs, &liveness->size, new_count, sizeof(*liveness->regs)))
|
2021-04-08 21:38:23 -07:00
|
|
|
return false;
|
|
|
|
|
|
|
|
if (liveness->size > old_capacity)
|
|
|
|
memset(liveness->regs + old_capacity, 0, (liveness->size - old_capacity) * sizeof(*liveness->regs));
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2021-05-20 22:32:20 -07:00
|
|
|
static struct hlsl_reg allocate_register(struct hlsl_ctx *ctx, struct liveness *liveness,
|
2021-04-08 21:38:23 -07:00
|
|
|
unsigned int first_write, unsigned int last_read, unsigned int component_count)
|
|
|
|
{
|
|
|
|
unsigned int component_idx, writemask, i;
|
|
|
|
struct hlsl_reg ret = {0};
|
|
|
|
|
|
|
|
for (component_idx = 0; component_idx < liveness->size; component_idx += 4)
|
|
|
|
{
|
|
|
|
if ((writemask = get_available_writemask(liveness, first_write, component_idx, component_count)))
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (component_idx == liveness->size)
|
|
|
|
{
|
2021-05-20 22:32:20 -07:00
|
|
|
if (!resize_liveness(ctx, liveness, component_idx + 4))
|
2021-04-08 21:38:23 -07:00
|
|
|
return ret;
|
|
|
|
writemask = (1u << component_count) - 1;
|
|
|
|
}
|
|
|
|
for (i = 0; i < 4; ++i)
|
|
|
|
{
|
|
|
|
if (writemask & (1u << i))
|
|
|
|
liveness->regs[component_idx + i].last_read = last_read;
|
|
|
|
}
|
|
|
|
ret.id = component_idx / 4;
|
|
|
|
ret.writemask = writemask;
|
|
|
|
ret.allocated = true;
|
2021-08-19 16:44:30 -07:00
|
|
|
liveness->reg_count = max(liveness->reg_count, ret.id + 1);
|
2021-04-08 21:38:23 -07:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool is_range_available(struct liveness *liveness, unsigned int first_write,
|
|
|
|
unsigned int component_idx, unsigned int component_count)
|
|
|
|
{
|
|
|
|
unsigned int i;
|
|
|
|
|
|
|
|
for (i = 0; i < component_count; i += 4)
|
|
|
|
{
|
|
|
|
if (!get_available_writemask(liveness, first_write, component_idx + i, 4))
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2021-05-20 22:32:20 -07:00
|
|
|
static struct hlsl_reg allocate_range(struct hlsl_ctx *ctx, struct liveness *liveness,
|
2021-06-22 10:29:03 -07:00
|
|
|
unsigned int first_write, unsigned int last_read, unsigned int component_count)
|
2021-04-08 21:38:23 -07:00
|
|
|
{
|
|
|
|
unsigned int i, component_idx;
|
|
|
|
struct hlsl_reg ret = {0};
|
|
|
|
|
|
|
|
for (component_idx = 0; component_idx < liveness->size; component_idx += 4)
|
|
|
|
{
|
|
|
|
if (is_range_available(liveness, first_write, component_idx,
|
|
|
|
min(component_count, liveness->size - component_idx)))
|
|
|
|
break;
|
|
|
|
}
|
2021-05-20 22:32:20 -07:00
|
|
|
if (!resize_liveness(ctx, liveness, component_idx + component_count))
|
2021-04-08 21:38:23 -07:00
|
|
|
return ret;
|
|
|
|
|
|
|
|
for (i = 0; i < component_count; ++i)
|
|
|
|
liveness->regs[component_idx + i].last_read = last_read;
|
|
|
|
ret.id = component_idx / 4;
|
|
|
|
ret.allocated = true;
|
2021-08-19 16:44:30 -07:00
|
|
|
liveness->reg_count = max(liveness->reg_count, ret.id + align(component_count, 4));
|
2021-04-08 21:38:23 -07:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const char *debug_register(char class, struct hlsl_reg reg, const struct hlsl_type *type)
|
|
|
|
{
|
2021-06-23 21:57:34 -07:00
|
|
|
static const char writemask_offset[] = {'w','x','y','z'};
|
|
|
|
|
2021-06-22 10:29:03 -07:00
|
|
|
if (type->reg_size > 4)
|
2021-06-23 21:57:34 -07:00
|
|
|
{
|
|
|
|
if (type->reg_size & 3)
|
|
|
|
return vkd3d_dbg_sprintf("%c%u-%c%u.%c", class, reg.id, class,
|
|
|
|
reg.id + (type->reg_size / 4), writemask_offset[type->reg_size & 3]);
|
|
|
|
|
2021-04-08 21:38:23 -07:00
|
|
|
return vkd3d_dbg_sprintf("%c%u-%c%u", class, reg.id, class,
|
2021-06-22 10:29:03 -07:00
|
|
|
reg.id + (type->reg_size / 4) - 1);
|
2021-06-23 21:57:34 -07:00
|
|
|
}
|
2021-04-08 21:38:23 -07:00
|
|
|
return vkd3d_dbg_sprintf("%c%u%s", class, reg.id, debug_hlsl_writemask(reg.writemask));
|
|
|
|
}
|
|
|
|
|
2021-05-20 22:32:20 -07:00
|
|
|
static void allocate_variable_temp_register(struct hlsl_ctx *ctx, struct hlsl_ir_var *var, struct liveness *liveness)
|
2021-04-08 21:38:23 -07:00
|
|
|
{
|
2021-04-27 10:14:20 -07:00
|
|
|
if (var->is_input_semantic || var->is_output_semantic || var->is_uniform)
|
2021-04-08 21:38:23 -07:00
|
|
|
return;
|
|
|
|
|
|
|
|
if (!var->reg.allocated && var->last_read)
|
|
|
|
{
|
2021-06-22 10:29:03 -07:00
|
|
|
if (var->data_type->reg_size > 4)
|
2021-05-20 22:32:20 -07:00
|
|
|
var->reg = allocate_range(ctx, liveness, var->first_write,
|
2021-04-08 21:38:23 -07:00
|
|
|
var->last_read, var->data_type->reg_size);
|
|
|
|
else
|
2021-05-20 22:32:20 -07:00
|
|
|
var->reg = allocate_register(ctx, liveness, var->first_write,
|
2021-04-08 21:38:23 -07:00
|
|
|
var->last_read, var->data_type->dimx);
|
|
|
|
TRACE("Allocated %s to %s (liveness %u-%u).\n", var->name,
|
|
|
|
debug_register('r', var->reg, var->data_type), var->first_write, var->last_read);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-05-20 22:32:20 -07:00
|
|
|
static void allocate_temp_registers_recurse(struct hlsl_ctx *ctx, struct list *instrs, struct liveness *liveness)
|
2021-04-08 21:38:23 -07:00
|
|
|
{
|
|
|
|
struct hlsl_ir_node *instr;
|
|
|
|
|
|
|
|
LIST_FOR_EACH_ENTRY(instr, instrs, struct hlsl_ir_node, entry)
|
|
|
|
{
|
2021-04-08 21:38:24 -07:00
|
|
|
if (!instr->reg.allocated && instr->last_read)
|
|
|
|
{
|
2021-06-22 10:29:03 -07:00
|
|
|
if (instr->data_type->reg_size > 4)
|
2021-05-20 22:32:20 -07:00
|
|
|
instr->reg = allocate_range(ctx, liveness, instr->index,
|
2021-04-08 21:38:24 -07:00
|
|
|
instr->last_read, instr->data_type->reg_size);
|
|
|
|
else
|
2021-05-20 22:32:20 -07:00
|
|
|
instr->reg = allocate_register(ctx, liveness, instr->index,
|
2021-04-08 21:38:24 -07:00
|
|
|
instr->last_read, instr->data_type->dimx);
|
|
|
|
TRACE("Allocated anonymous expression @%u to %s (liveness %u-%u).\n", instr->index,
|
|
|
|
debug_register('r', instr->reg, instr->data_type), instr->index, instr->last_read);
|
|
|
|
}
|
|
|
|
|
2021-04-08 21:38:23 -07:00
|
|
|
switch (instr->type)
|
|
|
|
{
|
|
|
|
case HLSL_IR_IF:
|
|
|
|
{
|
|
|
|
struct hlsl_ir_if *iff = hlsl_ir_if(instr);
|
2021-05-20 22:32:20 -07:00
|
|
|
allocate_temp_registers_recurse(ctx, &iff->then_instrs, liveness);
|
|
|
|
allocate_temp_registers_recurse(ctx, &iff->else_instrs, liveness);
|
2021-04-08 21:38:23 -07:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
case HLSL_IR_LOAD:
|
|
|
|
{
|
|
|
|
struct hlsl_ir_load *load = hlsl_ir_load(instr);
|
|
|
|
/* We need to at least allocate a variable for undefs.
|
|
|
|
* FIXME: We should probably find a way to remove them instead. */
|
2021-05-20 22:32:20 -07:00
|
|
|
allocate_variable_temp_register(ctx, load->src.var, liveness);
|
2021-04-08 21:38:23 -07:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
case HLSL_IR_LOOP:
|
|
|
|
{
|
|
|
|
struct hlsl_ir_loop *loop = hlsl_ir_loop(instr);
|
2021-05-20 22:32:20 -07:00
|
|
|
allocate_temp_registers_recurse(ctx, &loop->body, liveness);
|
2021-04-08 21:38:23 -07:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
case HLSL_IR_STORE:
|
|
|
|
{
|
|
|
|
struct hlsl_ir_store *store = hlsl_ir_store(instr);
|
2021-05-20 22:32:20 -07:00
|
|
|
allocate_variable_temp_register(ctx, store->lhs.var, liveness);
|
2021-04-08 21:38:23 -07:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-04-27 10:14:17 -07:00
|
|
|
static void allocate_const_registers_recurse(struct hlsl_ctx *ctx, struct list *instrs, struct liveness *liveness)
|
2021-04-08 21:38:26 -07:00
|
|
|
{
|
2021-04-27 10:14:17 -07:00
|
|
|
struct hlsl_constant_defs *defs = &ctx->constant_defs;
|
2021-04-08 21:38:26 -07:00
|
|
|
struct hlsl_ir_node *instr;
|
|
|
|
|
|
|
|
LIST_FOR_EACH_ENTRY(instr, instrs, struct hlsl_ir_node, entry)
|
|
|
|
{
|
|
|
|
switch (instr->type)
|
|
|
|
{
|
|
|
|
case HLSL_IR_CONSTANT:
|
|
|
|
{
|
|
|
|
struct hlsl_ir_constant *constant = hlsl_ir_constant(instr);
|
2021-04-27 10:14:17 -07:00
|
|
|
const struct hlsl_type *type = instr->data_type;
|
2021-06-22 10:29:03 -07:00
|
|
|
unsigned int x, y, i, writemask, end_reg;
|
2021-04-27 10:14:17 -07:00
|
|
|
unsigned int reg_size = type->reg_size;
|
2021-04-08 21:38:26 -07:00
|
|
|
|
2021-06-22 10:29:03 -07:00
|
|
|
if (reg_size > 4)
|
2021-05-20 22:32:20 -07:00
|
|
|
constant->reg = allocate_range(ctx, liveness, 1, UINT_MAX, reg_size);
|
2021-04-08 21:38:26 -07:00
|
|
|
else
|
2021-05-20 22:32:20 -07:00
|
|
|
constant->reg = allocate_register(ctx, liveness, 1, UINT_MAX, type->dimx);
|
2021-04-27 10:14:17 -07:00
|
|
|
TRACE("Allocated constant @%u to %s.\n", instr->index, debug_register('c', constant->reg, type));
|
|
|
|
|
2021-05-20 22:32:20 -07:00
|
|
|
if (!hlsl_array_reserve(ctx, (void **)&defs->values, &defs->size,
|
2021-06-22 10:29:03 -07:00
|
|
|
constant->reg.id + reg_size / 4, sizeof(*defs->values)))
|
2021-04-27 10:14:17 -07:00
|
|
|
return;
|
2021-06-22 10:29:03 -07:00
|
|
|
end_reg = constant->reg.id + reg_size / 4;
|
|
|
|
if (end_reg > defs->count)
|
2021-06-21 21:37:06 -07:00
|
|
|
{
|
2021-06-22 10:29:03 -07:00
|
|
|
memset(&defs->values[defs->count], 0, sizeof(*defs->values) * (end_reg - defs->count));
|
|
|
|
defs->count = end_reg;
|
2021-06-21 21:37:06 -07:00
|
|
|
}
|
2021-04-27 10:14:17 -07:00
|
|
|
|
|
|
|
assert(type->type <= HLSL_CLASS_LAST_NUMERIC);
|
|
|
|
|
|
|
|
if (!(writemask = constant->reg.writemask))
|
|
|
|
writemask = (1u << type->dimx) - 1;
|
|
|
|
|
|
|
|
for (y = 0; y < type->dimy; ++y)
|
|
|
|
{
|
|
|
|
for (x = 0, i = 0; x < 4; ++x)
|
|
|
|
{
|
2021-09-20 14:40:10 -07:00
|
|
|
const union hlsl_constant_value *value;
|
2021-04-27 10:14:17 -07:00
|
|
|
float f;
|
|
|
|
|
|
|
|
if (!(writemask & (1u << x)))
|
|
|
|
continue;
|
2021-09-20 14:40:10 -07:00
|
|
|
value = &constant->value[i++];
|
2021-04-27 10:14:17 -07:00
|
|
|
|
|
|
|
switch (type->base_type)
|
|
|
|
{
|
|
|
|
case HLSL_TYPE_BOOL:
|
2021-09-20 14:40:10 -07:00
|
|
|
f = value->b;
|
2021-04-27 10:14:17 -07:00
|
|
|
break;
|
|
|
|
|
|
|
|
case HLSL_TYPE_FLOAT:
|
|
|
|
case HLSL_TYPE_HALF:
|
2021-09-20 14:40:10 -07:00
|
|
|
f = value->f;
|
2021-04-27 10:14:17 -07:00
|
|
|
break;
|
|
|
|
|
|
|
|
case HLSL_TYPE_INT:
|
2021-09-20 14:40:10 -07:00
|
|
|
f = value->i;
|
2021-04-27 10:14:17 -07:00
|
|
|
break;
|
|
|
|
|
|
|
|
case HLSL_TYPE_UINT:
|
2021-09-20 14:40:10 -07:00
|
|
|
f = value->u;
|
2021-04-27 10:14:17 -07:00
|
|
|
break;
|
|
|
|
|
|
|
|
case HLSL_TYPE_DOUBLE:
|
|
|
|
FIXME("Double constant.\n");
|
|
|
|
return;
|
|
|
|
|
|
|
|
default:
|
|
|
|
assert(0);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
defs->values[constant->reg.id + y].f[x] = f;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-04-08 21:38:26 -07:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
case HLSL_IR_IF:
|
|
|
|
{
|
|
|
|
struct hlsl_ir_if *iff = hlsl_ir_if(instr);
|
2021-04-27 10:14:17 -07:00
|
|
|
allocate_const_registers_recurse(ctx, &iff->then_instrs, liveness);
|
|
|
|
allocate_const_registers_recurse(ctx, &iff->else_instrs, liveness);
|
2021-04-08 21:38:26 -07:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
case HLSL_IR_LOOP:
|
|
|
|
{
|
|
|
|
struct hlsl_ir_loop *loop = hlsl_ir_loop(instr);
|
2021-04-27 10:14:17 -07:00
|
|
|
allocate_const_registers_recurse(ctx, &loop->body, liveness);
|
2021-04-08 21:38:26 -07:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-04-08 21:38:27 -07:00
|
|
|
static void allocate_const_registers(struct hlsl_ctx *ctx, struct hlsl_ir_function_decl *entry_func)
|
2021-04-08 21:38:26 -07:00
|
|
|
{
|
|
|
|
struct liveness liveness = {0};
|
2021-04-08 21:38:27 -07:00
|
|
|
struct hlsl_ir_var *var;
|
|
|
|
|
2021-04-27 10:14:17 -07:00
|
|
|
allocate_const_registers_recurse(ctx, entry_func->body, &liveness);
|
|
|
|
|
2021-04-15 17:03:44 -07:00
|
|
|
LIST_FOR_EACH_ENTRY(var, &ctx->extern_vars, struct hlsl_ir_var, extern_entry)
|
2021-04-08 21:38:27 -07:00
|
|
|
{
|
|
|
|
if (var->is_uniform && var->last_read)
|
|
|
|
{
|
2021-06-22 10:29:03 -07:00
|
|
|
if (var->data_type->reg_size > 4)
|
2021-05-20 22:32:20 -07:00
|
|
|
var->reg = allocate_range(ctx, &liveness, 1, UINT_MAX, var->data_type->reg_size);
|
2021-04-08 21:38:27 -07:00
|
|
|
else
|
|
|
|
{
|
2021-05-20 22:32:20 -07:00
|
|
|
var->reg = allocate_register(ctx, &liveness, 1, UINT_MAX, 4);
|
2021-04-08 21:38:27 -07:00
|
|
|
var->reg.writemask = (1u << var->data_type->dimx) - 1;
|
|
|
|
}
|
|
|
|
TRACE("Allocated %s to %s.\n", var->name, debug_register('c', var->reg, var->data_type));
|
|
|
|
}
|
|
|
|
}
|
2021-04-08 21:38:26 -07:00
|
|
|
}
|
|
|
|
|
2021-04-08 21:38:23 -07:00
|
|
|
/* Simple greedy temporary register allocation pass that just assigns a unique
|
|
|
|
* index to all (simultaneously live) variables or intermediate values. Agnostic
|
|
|
|
* as to how many registers are actually available for the current backend, and
|
|
|
|
* does not handle constants. */
|
2021-05-20 22:32:20 -07:00
|
|
|
static void allocate_temp_registers(struct hlsl_ctx *ctx, struct hlsl_ir_function_decl *entry_func)
|
2021-04-08 21:38:23 -07:00
|
|
|
{
|
|
|
|
struct liveness liveness = {0};
|
2021-05-20 22:32:20 -07:00
|
|
|
allocate_temp_registers_recurse(ctx, entry_func->body, &liveness);
|
2021-08-19 16:44:30 -07:00
|
|
|
ctx->temp_count = liveness.reg_count;
|
2021-09-27 05:41:31 -07:00
|
|
|
vkd3d_free(liveness.regs);
|
2021-04-08 21:38:23 -07:00
|
|
|
}
|
|
|
|
|
2021-04-27 10:14:21 -07:00
|
|
|
static void allocate_semantic_register(struct hlsl_ctx *ctx, struct hlsl_ir_var *var, unsigned int *counter, bool output)
|
|
|
|
{
|
2021-08-19 16:44:27 -07:00
|
|
|
static const char *shader_names[] =
|
|
|
|
{
|
|
|
|
[VKD3D_SHADER_TYPE_PIXEL] = "Pixel",
|
|
|
|
[VKD3D_SHADER_TYPE_VERTEX] = "Vertex",
|
|
|
|
[VKD3D_SHADER_TYPE_GEOMETRY] = "Geometry",
|
|
|
|
[VKD3D_SHADER_TYPE_HULL] = "Hull",
|
|
|
|
[VKD3D_SHADER_TYPE_DOMAIN] = "Domain",
|
|
|
|
[VKD3D_SHADER_TYPE_COMPUTE] = "Compute",
|
|
|
|
};
|
|
|
|
|
|
|
|
unsigned int type;
|
|
|
|
uint32_t reg;
|
|
|
|
bool builtin;
|
|
|
|
|
2021-04-27 10:14:21 -07:00
|
|
|
assert(var->semantic.name);
|
|
|
|
|
|
|
|
if (ctx->profile->major_version < 4)
|
|
|
|
{
|
2021-05-10 21:36:07 -07:00
|
|
|
D3DDECLUSAGE usage;
|
2021-08-19 16:44:27 -07:00
|
|
|
uint32_t usage_idx;
|
2021-05-10 21:36:07 -07:00
|
|
|
|
2021-08-09 19:56:17 -07:00
|
|
|
if (!hlsl_sm1_usage_from_semantic(&var->semantic, &usage, &usage_idx))
|
2021-05-10 21:36:07 -07:00
|
|
|
{
|
|
|
|
hlsl_error(ctx, var->loc, VKD3D_SHADER_ERROR_HLSL_INVALID_SEMANTIC,
|
|
|
|
"Invalid semantic '%s'.", var->semantic.name);
|
|
|
|
return;
|
|
|
|
}
|
2021-04-27 10:14:21 -07:00
|
|
|
|
2021-08-19 16:44:27 -07:00
|
|
|
if ((!output && !var->last_read) || (output && !var->first_write))
|
|
|
|
return;
|
|
|
|
|
|
|
|
builtin = hlsl_sm1_register_from_semantic(ctx, &var->semantic, output, &type, ®);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
D3D_NAME usage;
|
2021-08-19 16:44:29 -07:00
|
|
|
bool has_idx;
|
2021-08-19 16:44:27 -07:00
|
|
|
|
|
|
|
if (!hlsl_sm4_usage_from_semantic(ctx, &var->semantic, output, &usage))
|
2021-04-27 10:14:21 -07:00
|
|
|
{
|
2021-08-19 16:44:27 -07:00
|
|
|
hlsl_error(ctx, var->loc, VKD3D_SHADER_ERROR_HLSL_INVALID_SEMANTIC,
|
|
|
|
"Invalid semantic '%s'.", var->semantic.name);
|
|
|
|
return;
|
2021-04-27 10:14:21 -07:00
|
|
|
}
|
2021-08-19 16:44:29 -07:00
|
|
|
if ((builtin = hlsl_sm4_register_from_semantic(ctx, &var->semantic, output, &type, &has_idx)))
|
|
|
|
reg = has_idx ? var->semantic.index : 0;
|
2021-08-19 16:44:27 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
if (builtin)
|
|
|
|
{
|
|
|
|
TRACE("%s %s semantic %s[%u] matches predefined register %#x[%u].\n", shader_names[ctx->profile->type],
|
|
|
|
output ? "output" : "input", var->semantic.name, var->semantic.index, type, reg);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
var->reg.allocated = true;
|
|
|
|
var->reg.id = (*counter)++;
|
|
|
|
var->reg.writemask = (1 << var->data_type->dimx) - 1;
|
|
|
|
TRACE("Allocated %s to %s.\n", var->name, debug_register(output ? 'o' : 'v', var->reg, var->data_type));
|
2021-04-27 10:14:21 -07:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void allocate_semantic_registers(struct hlsl_ctx *ctx)
|
|
|
|
{
|
|
|
|
unsigned int input_counter = 0, output_counter = 0;
|
|
|
|
struct hlsl_ir_var *var;
|
|
|
|
|
|
|
|
LIST_FOR_EACH_ENTRY(var, &ctx->extern_vars, struct hlsl_ir_var, extern_entry)
|
|
|
|
{
|
2021-08-19 16:44:27 -07:00
|
|
|
if (var->is_input_semantic)
|
2021-04-27 10:14:21 -07:00
|
|
|
allocate_semantic_register(ctx, var, &input_counter, false);
|
2021-08-19 16:44:27 -07:00
|
|
|
if (var->is_output_semantic)
|
2021-04-27 10:14:21 -07:00
|
|
|
allocate_semantic_register(ctx, var, &output_counter, true);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-06-23 21:57:35 -07:00
|
|
|
static const struct hlsl_buffer *get_reserved_buffer(struct hlsl_ctx *ctx, uint32_t index)
|
|
|
|
{
|
|
|
|
const struct hlsl_buffer *buffer;
|
|
|
|
|
|
|
|
LIST_FOR_EACH_ENTRY(buffer, &ctx->buffers, const struct hlsl_buffer, entry)
|
|
|
|
{
|
|
|
|
if (buffer->used_size && buffer->reservation.type == 'b' && buffer->reservation.index == index)
|
|
|
|
return buffer;
|
|
|
|
}
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void calculate_buffer_offset(struct hlsl_ir_var *var)
|
|
|
|
{
|
|
|
|
struct hlsl_buffer *buffer = var->buffer;
|
|
|
|
|
|
|
|
buffer->size = hlsl_type_get_sm4_offset(var->data_type, buffer->size);
|
|
|
|
|
|
|
|
var->buffer_offset = buffer->size;
|
|
|
|
TRACE("Allocated buffer offset %u to %s.\n", var->buffer_offset, var->name);
|
|
|
|
buffer->size += var->data_type->reg_size;
|
|
|
|
if (var->last_read)
|
|
|
|
buffer->used_size = buffer->size;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void allocate_buffers(struct hlsl_ctx *ctx)
|
|
|
|
{
|
2021-07-08 19:13:18 -07:00
|
|
|
struct hlsl_buffer *buffer;
|
2021-06-23 21:57:35 -07:00
|
|
|
struct hlsl_ir_var *var;
|
|
|
|
uint32_t index = 0;
|
|
|
|
|
|
|
|
LIST_FOR_EACH_ENTRY(var, &ctx->extern_vars, struct hlsl_ir_var, extern_entry)
|
|
|
|
{
|
|
|
|
if (var->is_uniform)
|
|
|
|
{
|
|
|
|
if (var->is_param)
|
2021-07-08 19:13:18 -07:00
|
|
|
var->buffer = ctx->params_buffer;
|
2021-06-23 21:57:35 -07:00
|
|
|
|
|
|
|
calculate_buffer_offset(var);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
LIST_FOR_EACH_ENTRY(buffer, &ctx->buffers, struct hlsl_buffer, entry)
|
|
|
|
{
|
|
|
|
if (!buffer->used_size)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
if (buffer->type == HLSL_BUFFER_CONSTANT)
|
|
|
|
{
|
|
|
|
if (buffer->reservation.type == 'b')
|
|
|
|
{
|
|
|
|
const struct hlsl_buffer *reserved_buffer = get_reserved_buffer(ctx, buffer->reservation.index);
|
|
|
|
|
|
|
|
if (reserved_buffer && reserved_buffer != buffer)
|
|
|
|
{
|
|
|
|
hlsl_error(ctx, buffer->loc, VKD3D_SHADER_ERROR_HLSL_OVERLAPPING_RESERVATIONS,
|
|
|
|
"Multiple buffers bound to cb%u.", buffer->reservation.index);
|
|
|
|
hlsl_note(ctx, reserved_buffer->loc, VKD3D_SHADER_LOG_ERROR,
|
|
|
|
"Buffer %s is already bound to cb%u.", reserved_buffer->name, buffer->reservation.index);
|
|
|
|
}
|
|
|
|
|
|
|
|
buffer->reg.id = buffer->reservation.index;
|
|
|
|
buffer->reg.allocated = true;
|
|
|
|
TRACE("Allocated reserved %s to cb%u.\n", buffer->name, index);
|
|
|
|
}
|
|
|
|
else if (!buffer->reservation.type)
|
|
|
|
{
|
|
|
|
while (get_reserved_buffer(ctx, index))
|
|
|
|
++index;
|
|
|
|
|
|
|
|
buffer->reg.id = index;
|
|
|
|
buffer->reg.allocated = true;
|
|
|
|
TRACE("Allocated %s to cb%u.\n", buffer->name, index);
|
|
|
|
++index;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
hlsl_error(ctx, buffer->loc, VKD3D_SHADER_ERROR_HLSL_INVALID_RESERVATION,
|
|
|
|
"Constant buffers must be allocated to register type 'b'.");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
FIXME("Allocate registers for texture buffers.\n");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-10-11 19:58:46 -07:00
|
|
|
static const struct hlsl_ir_var *get_reserved_texture(struct hlsl_ctx *ctx, uint32_t index)
|
|
|
|
{
|
|
|
|
const struct hlsl_ir_var *var;
|
|
|
|
|
|
|
|
LIST_FOR_EACH_ENTRY(var, &ctx->extern_vars, const struct hlsl_ir_var, extern_entry)
|
|
|
|
{
|
2021-10-15 14:54:07 -07:00
|
|
|
if (var->last_read && var->reg_reservation.type == 't' && var->reg_reservation.index == index)
|
2021-10-11 19:58:46 -07:00
|
|
|
return var;
|
|
|
|
}
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void allocate_textures(struct hlsl_ctx *ctx)
|
|
|
|
{
|
|
|
|
struct hlsl_ir_var *var;
|
|
|
|
uint32_t index = 0;
|
|
|
|
|
|
|
|
LIST_FOR_EACH_ENTRY(var, &ctx->extern_vars, struct hlsl_ir_var, extern_entry)
|
|
|
|
{
|
2021-10-15 14:54:07 -07:00
|
|
|
if (!var->last_read || var->data_type->type != HLSL_CLASS_OBJECT
|
2021-10-11 19:58:46 -07:00
|
|
|
|| var->data_type->base_type != HLSL_TYPE_TEXTURE)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
if (var->reg_reservation.type == 't')
|
|
|
|
{
|
|
|
|
const struct hlsl_ir_var *reserved_texture = get_reserved_texture(ctx, var->reg_reservation.index);
|
|
|
|
|
|
|
|
if (reserved_texture && reserved_texture != var)
|
|
|
|
{
|
|
|
|
hlsl_error(ctx, var->loc, VKD3D_SHADER_ERROR_HLSL_OVERLAPPING_RESERVATIONS,
|
|
|
|
"Multiple textures bound to t%u.", var->reg_reservation.index);
|
|
|
|
hlsl_note(ctx, reserved_texture->loc, VKD3D_SHADER_LOG_ERROR,
|
|
|
|
"Texture '%s' is already bound to t%u.", reserved_texture->name,
|
|
|
|
var->reg_reservation.index);
|
|
|
|
}
|
|
|
|
|
|
|
|
var->reg.id = var->reg_reservation.index;
|
|
|
|
var->reg.allocated = true;
|
|
|
|
TRACE("Allocated reserved %s to t%u.\n", var->name, index);
|
|
|
|
}
|
|
|
|
else if (!var->reg_reservation.type)
|
|
|
|
{
|
|
|
|
while (get_reserved_texture(ctx, index))
|
|
|
|
++index;
|
|
|
|
|
|
|
|
var->reg.id = index;
|
|
|
|
var->reg.allocated = true;
|
|
|
|
TRACE("Allocated %s to t%u.\n", var->name, index);
|
|
|
|
++index;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
hlsl_error(ctx, var->loc, VKD3D_SHADER_ERROR_HLSL_INVALID_RESERVATION,
|
|
|
|
"Textures must be bound to register type 't'.");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-05-10 21:36:08 -07:00
|
|
|
static bool type_is_single_reg(const struct hlsl_type *type)
|
|
|
|
{
|
|
|
|
return type->type == HLSL_CLASS_SCALAR || type->type == HLSL_CLASS_VECTOR;
|
|
|
|
}
|
|
|
|
|
2021-09-23 06:42:50 -07:00
|
|
|
unsigned int hlsl_offset_from_deref(const struct hlsl_deref *deref)
|
2021-05-10 21:36:08 -07:00
|
|
|
{
|
|
|
|
struct hlsl_ir_node *offset_node = deref->offset.node;
|
2021-09-23 06:42:50 -07:00
|
|
|
|
|
|
|
if (!offset_node)
|
|
|
|
return 0;
|
2021-05-10 21:36:08 -07:00
|
|
|
|
2021-05-16 10:47:53 -07:00
|
|
|
/* We should always have generated a cast to UINT. */
|
2021-09-23 06:42:50 -07:00
|
|
|
assert(offset_node->data_type->type == HLSL_CLASS_SCALAR
|
|
|
|
&& offset_node->data_type->base_type == HLSL_TYPE_UINT);
|
2021-05-16 10:47:53 -07:00
|
|
|
|
2021-09-23 06:42:50 -07:00
|
|
|
if (offset_node->type != HLSL_IR_CONSTANT)
|
2021-05-10 21:36:08 -07:00
|
|
|
{
|
|
|
|
FIXME("Dereference with non-constant offset of type %s.\n", hlsl_node_type_to_string(offset_node->type));
|
2021-09-23 14:47:02 -07:00
|
|
|
return 0;
|
2021-05-10 21:36:08 -07:00
|
|
|
}
|
|
|
|
|
2021-09-23 06:42:50 -07:00
|
|
|
return hlsl_ir_constant(offset_node)->value[0].u;
|
|
|
|
}
|
|
|
|
|
|
|
|
struct hlsl_reg hlsl_reg_from_deref(const struct hlsl_deref *deref, const struct hlsl_type *type)
|
|
|
|
{
|
|
|
|
const struct hlsl_ir_var *var = deref->var;
|
|
|
|
struct hlsl_reg ret = var->reg;
|
|
|
|
unsigned int offset = hlsl_offset_from_deref(deref);
|
2021-05-10 21:36:08 -07:00
|
|
|
|
|
|
|
ret.id += offset / 4;
|
|
|
|
|
|
|
|
if (type_is_single_reg(var->data_type))
|
|
|
|
{
|
|
|
|
assert(!offset);
|
|
|
|
ret.writemask = var->reg.writemask;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
assert(type_is_single_reg(type));
|
2021-09-23 06:42:50 -07:00
|
|
|
ret.writemask = ((1 << type->dimx) - 1) << (offset % 4);
|
2021-05-10 21:36:08 -07:00
|
|
|
}
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2021-04-15 17:03:43 -07:00
|
|
|
int hlsl_emit_dxbc(struct hlsl_ctx *ctx, struct hlsl_ir_function_decl *entry_func, struct vkd3d_shader_code *out)
|
2021-03-02 13:34:46 -08:00
|
|
|
{
|
2021-03-28 12:46:55 -07:00
|
|
|
struct hlsl_ir_var *var;
|
2021-08-12 17:36:14 -07:00
|
|
|
bool progress;
|
2021-03-28 12:46:55 -07:00
|
|
|
|
2021-03-02 13:34:46 -08:00
|
|
|
list_move_head(entry_func->body, &ctx->static_initializers);
|
|
|
|
|
2021-03-28 12:46:55 -07:00
|
|
|
LIST_FOR_EACH_ENTRY(var, &ctx->globals->vars, struct hlsl_ir_var, scope_entry)
|
|
|
|
{
|
2021-10-15 14:54:08 -07:00
|
|
|
if (var->modifiers & HLSL_STORAGE_UNIFORM)
|
2021-03-28 12:46:55 -07:00
|
|
|
prepend_uniform_copy(ctx, entry_func->body, var);
|
|
|
|
}
|
|
|
|
|
|
|
|
LIST_FOR_EACH_ENTRY(var, entry_func->parameters, struct hlsl_ir_var, param_entry)
|
|
|
|
{
|
2021-10-15 14:54:08 -07:00
|
|
|
if (var->data_type->type == HLSL_CLASS_OBJECT || (var->modifiers & HLSL_STORAGE_UNIFORM))
|
2021-04-27 10:14:18 -07:00
|
|
|
{
|
2021-10-15 14:54:08 -07:00
|
|
|
prepend_uniform_copy(ctx, entry_func->body, var);
|
2021-04-27 10:14:18 -07:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2021-10-15 14:54:08 -07:00
|
|
|
if (var->data_type->type != HLSL_CLASS_STRUCT && !var->semantic.name)
|
|
|
|
hlsl_error(ctx, var->loc, VKD3D_SHADER_ERROR_HLSL_MISSING_SEMANTIC,
|
|
|
|
"Parameter \"%s\" is missing a semantic.", var->name);
|
|
|
|
|
|
|
|
if (var->modifiers & HLSL_STORAGE_IN)
|
|
|
|
prepend_input_var_copy(ctx, entry_func->body, var);
|
|
|
|
if (var->modifiers & HLSL_STORAGE_OUT)
|
|
|
|
append_output_var_copy(ctx, entry_func->body, var);
|
2021-04-27 10:14:18 -07:00
|
|
|
}
|
2021-03-28 12:46:55 -07:00
|
|
|
}
|
2021-03-28 12:46:59 -07:00
|
|
|
if (entry_func->return_var)
|
2021-04-27 10:14:18 -07:00
|
|
|
{
|
2021-04-27 10:14:19 -07:00
|
|
|
if (entry_func->return_var->data_type->type != HLSL_CLASS_STRUCT && !entry_func->return_var->semantic.name)
|
2021-04-27 10:14:18 -07:00
|
|
|
hlsl_error(ctx, entry_func->loc, VKD3D_SHADER_ERROR_HLSL_MISSING_SEMANTIC,
|
|
|
|
"Entry point \"%s\" is missing a return value semantic.", entry_func->func->name);
|
|
|
|
|
2021-03-28 12:46:59 -07:00
|
|
|
append_output_var_copy(ctx, entry_func->body, entry_func->return_var);
|
2021-04-27 10:14:18 -07:00
|
|
|
}
|
2021-03-28 12:46:55 -07:00
|
|
|
|
2021-03-16 14:31:55 -07:00
|
|
|
while (transform_ir(ctx, fold_redundant_casts, entry_func->body, NULL));
|
2021-08-12 17:36:14 -07:00
|
|
|
do
|
|
|
|
{
|
|
|
|
progress = transform_ir(ctx, split_array_copies, entry_func->body, NULL);
|
|
|
|
progress |= transform_ir(ctx, split_struct_copies, entry_func->body, NULL);
|
|
|
|
}
|
|
|
|
while (progress);
|
2021-03-16 14:31:53 -07:00
|
|
|
while (transform_ir(ctx, fold_constants, entry_func->body, NULL));
|
2021-03-17 22:22:22 -07:00
|
|
|
|
2021-05-20 22:32:24 -07:00
|
|
|
if (ctx->profile->major_version < 4)
|
|
|
|
transform_ir(ctx, lower_division, entry_func->body, NULL);
|
|
|
|
|
2021-03-17 22:22:22 -07:00
|
|
|
do
|
|
|
|
compute_liveness(ctx, entry_func);
|
2021-03-16 14:31:54 -07:00
|
|
|
while (transform_ir(ctx, dce, entry_func->body, NULL));
|
2021-03-16 14:31:53 -07:00
|
|
|
|
2021-03-17 22:22:22 -07:00
|
|
|
compute_liveness(ctx, entry_func);
|
2021-03-02 13:34:46 -08:00
|
|
|
|
|
|
|
if (TRACE_ON())
|
2021-05-20 22:32:22 -07:00
|
|
|
rb_for_each_entry(&ctx->functions, dump_function, ctx);
|
2021-03-02 13:34:46 -08:00
|
|
|
|
2021-05-20 22:32:20 -07:00
|
|
|
allocate_temp_registers(ctx, entry_func);
|
2021-04-08 21:38:26 -07:00
|
|
|
if (ctx->profile->major_version < 4)
|
2021-10-11 19:58:46 -07:00
|
|
|
{
|
2021-04-08 21:38:27 -07:00
|
|
|
allocate_const_registers(ctx, entry_func);
|
2021-10-11 19:58:46 -07:00
|
|
|
}
|
2021-06-23 21:57:35 -07:00
|
|
|
else
|
2021-10-11 19:58:46 -07:00
|
|
|
{
|
2021-06-23 21:57:35 -07:00
|
|
|
allocate_buffers(ctx);
|
2021-10-11 19:58:46 -07:00
|
|
|
allocate_textures(ctx);
|
|
|
|
}
|
2021-04-27 10:14:21 -07:00
|
|
|
allocate_semantic_registers(ctx);
|
2021-04-08 21:38:23 -07:00
|
|
|
|
2021-05-20 22:32:23 -07:00
|
|
|
if (ctx->result)
|
|
|
|
return ctx->result;
|
2021-04-15 17:03:43 -07:00
|
|
|
|
|
|
|
if (ctx->profile->major_version < 4)
|
2021-08-09 19:56:17 -07:00
|
|
|
return hlsl_sm1_write(ctx, entry_func, out);
|
2021-04-15 17:03:43 -07:00
|
|
|
else
|
2021-08-17 10:38:57 -07:00
|
|
|
return hlsl_sm4_write(ctx, entry_func, out);
|
2021-03-02 13:34:46 -08:00
|
|
|
}
|