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vkd3d-shader: Allocate temporary registers for variables.
Signed-off-by: Zebediah Figura <zfigura@codeweavers.com> Signed-off-by: Henri Verbeet <hverbeet@codeweavers.com> Signed-off-by: Matteo Bruni <mbruni@codeweavers.com> Signed-off-by: Alexandre Julliard <julliard@winehq.org>
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027f994fe0
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16163021b9
@ -890,7 +890,7 @@ static void dump_deref(struct vkd3d_string_buffer *buffer, const struct hlsl_der
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}
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}
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static const char *debug_writemask(DWORD writemask)
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const char *debug_hlsl_writemask(unsigned int writemask)
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{
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static const char components[] = {'x', 'y', 'z', 'w'};
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char string[5];
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@ -1074,7 +1074,7 @@ static void dump_ir_store(struct vkd3d_string_buffer *buffer, const struct hlsl_
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vkd3d_string_buffer_printf(buffer, "= (");
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dump_deref(buffer, &store->lhs);
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if (store->writemask != VKD3DSP_WRITEMASK_ALL)
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vkd3d_string_buffer_printf(buffer, "%s", debug_writemask(store->writemask));
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vkd3d_string_buffer_printf(buffer, "%s", debug_hlsl_writemask(store->writemask));
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vkd3d_string_buffer_printf(buffer, " ");
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dump_src(buffer, &store->rhs);
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vkd3d_string_buffer_printf(buffer, ")");
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@ -137,6 +137,13 @@ struct hlsl_struct_field
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unsigned int reg_offset;
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};
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struct hlsl_reg
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{
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uint32_t id;
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unsigned int writemask;
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bool allocated;
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};
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enum hlsl_ir_node_type
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{
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HLSL_IR_CONSTANT,
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@ -208,6 +215,7 @@ struct hlsl_ir_var
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struct list scope_entry, param_entry;
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unsigned int first_write, last_read;
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struct hlsl_reg reg;
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uint32_t is_input_varying : 1;
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uint32_t is_output_varying : 1;
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@ -493,6 +501,7 @@ static inline void hlsl_src_remove(struct hlsl_src *src)
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}
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const char *debug_hlsl_type(const struct hlsl_type *type) DECLSPEC_HIDDEN;
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const char *debug_hlsl_writemask(unsigned int writemask) DECLSPEC_HIDDEN;
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struct vkd3d_string_buffer *hlsl_type_to_string(struct vkd3d_string_buffer_cache *string_buffers,
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const struct hlsl_type *type) DECLSPEC_HIDDEN;
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@ -611,6 +611,191 @@ static void compute_liveness(struct hlsl_ctx *ctx, struct hlsl_ir_function_decl
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compute_liveness_recurse(entry_func->body, 0, 0);
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}
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struct liveness
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{
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size_t size;
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struct
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{
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/* 0 if not live yet. */
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unsigned int last_read;
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} *regs;
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};
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static unsigned int get_available_writemask(struct liveness *liveness,
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unsigned int first_write, unsigned int component_idx, unsigned int component_count)
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{
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unsigned int i, writemask = 0, count = 0;
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for (i = 0; i < 4; ++i)
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{
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if (liveness->regs[component_idx + i].last_read <= first_write)
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{
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writemask |= 1u << i;
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if (++count == component_count)
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return writemask;
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}
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}
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return 0;
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}
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static bool resize_liveness(struct liveness *liveness, size_t new_count)
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{
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size_t old_capacity = liveness->size;
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if (!vkd3d_array_reserve((void **)&liveness->regs, &liveness->size, new_count, sizeof(*liveness->regs)))
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return false;
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if (liveness->size > old_capacity)
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memset(liveness->regs + old_capacity, 0, (liveness->size - old_capacity) * sizeof(*liveness->regs));
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return true;
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}
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static struct hlsl_reg allocate_register(struct liveness *liveness,
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unsigned int first_write, unsigned int last_read, unsigned int component_count)
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{
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unsigned int component_idx, writemask, i;
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struct hlsl_reg ret = {0};
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for (component_idx = 0; component_idx < liveness->size; component_idx += 4)
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{
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if ((writemask = get_available_writemask(liveness, first_write, component_idx, component_count)))
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break;
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}
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if (component_idx == liveness->size)
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{
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if (!resize_liveness(liveness, component_idx + 4))
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return ret;
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writemask = (1u << component_count) - 1;
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}
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for (i = 0; i < 4; ++i)
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{
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if (writemask & (1u << i))
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liveness->regs[component_idx + i].last_read = last_read;
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}
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ret.id = component_idx / 4;
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ret.writemask = writemask;
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ret.allocated = true;
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return ret;
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}
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static bool is_range_available(struct liveness *liveness, unsigned int first_write,
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unsigned int component_idx, unsigned int component_count)
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{
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unsigned int i;
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for (i = 0; i < component_count; i += 4)
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{
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if (!get_available_writemask(liveness, first_write, component_idx + i, 4))
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return false;
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}
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return true;
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}
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static struct hlsl_reg allocate_range(struct liveness *liveness,
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unsigned int first_write, unsigned int last_read, unsigned int reg_count)
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{
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const unsigned int component_count = reg_count * 4;
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unsigned int i, component_idx;
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struct hlsl_reg ret = {0};
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for (component_idx = 0; component_idx < liveness->size; component_idx += 4)
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{
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if (is_range_available(liveness, first_write, component_idx,
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min(component_count, liveness->size - component_idx)))
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break;
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}
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if (!resize_liveness(liveness, component_idx + component_count))
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return ret;
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for (i = 0; i < component_count; ++i)
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liveness->regs[component_idx + i].last_read = last_read;
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ret.id = component_idx / 4;
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ret.allocated = true;
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return ret;
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}
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static const char *debug_register(char class, struct hlsl_reg reg, const struct hlsl_type *type)
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{
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if (type->reg_size > 4)
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return vkd3d_dbg_sprintf("%c%u-%c%u", class, reg.id, class,
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reg.id + type->reg_size - 1);
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return vkd3d_dbg_sprintf("%c%u%s", class, reg.id, debug_hlsl_writemask(reg.writemask));
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}
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static void allocate_variable_temp_register(struct hlsl_ir_var *var, struct liveness *liveness)
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{
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if (var->is_input_varying || var->is_output_varying || var->is_uniform)
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return;
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if (!var->reg.allocated && var->last_read)
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{
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if (var->data_type->reg_size > 1)
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var->reg = allocate_range(liveness, var->first_write,
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var->last_read, var->data_type->reg_size);
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else
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var->reg = allocate_register(liveness, var->first_write,
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var->last_read, var->data_type->dimx);
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TRACE("Allocated %s to %s (liveness %u-%u).\n", var->name,
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debug_register('r', var->reg, var->data_type), var->first_write, var->last_read);
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}
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}
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static void allocate_temp_registers_recurse(struct list *instrs, struct liveness *liveness)
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{
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struct hlsl_ir_node *instr;
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LIST_FOR_EACH_ENTRY(instr, instrs, struct hlsl_ir_node, entry)
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{
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switch (instr->type)
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{
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case HLSL_IR_IF:
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{
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struct hlsl_ir_if *iff = hlsl_ir_if(instr);
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allocate_temp_registers_recurse(&iff->then_instrs, liveness);
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allocate_temp_registers_recurse(&iff->else_instrs, liveness);
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break;
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}
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case HLSL_IR_LOAD:
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{
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struct hlsl_ir_load *load = hlsl_ir_load(instr);
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/* We need to at least allocate a variable for undefs.
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* FIXME: We should probably find a way to remove them instead. */
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allocate_variable_temp_register(load->src.var, liveness);
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break;
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}
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case HLSL_IR_LOOP:
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{
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struct hlsl_ir_loop *loop = hlsl_ir_loop(instr);
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allocate_temp_registers_recurse(&loop->body, liveness);
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break;
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}
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case HLSL_IR_STORE:
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{
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struct hlsl_ir_store *store = hlsl_ir_store(instr);
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allocate_variable_temp_register(store->lhs.var, liveness);
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break;
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}
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default:
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break;
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}
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}
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}
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/* Simple greedy temporary register allocation pass that just assigns a unique
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* index to all (simultaneously live) variables or intermediate values. Agnostic
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* as to how many registers are actually available for the current backend, and
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* does not handle constants. */
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static void allocate_temp_registers(struct hlsl_ir_function_decl *entry_func)
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{
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struct liveness liveness = {0};
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allocate_temp_registers_recurse(entry_func->body, &liveness);
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}
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int hlsl_emit_dxbc(struct hlsl_ctx *ctx, struct hlsl_ir_function_decl *entry_func)
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{
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struct hlsl_ir_var *var;
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@ -648,6 +833,8 @@ int hlsl_emit_dxbc(struct hlsl_ctx *ctx, struct hlsl_ir_function_decl *entry_fun
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if (TRACE_ON())
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rb_for_each_entry(&ctx->functions, dump_function, NULL);
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allocate_temp_registers(entry_func);
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if (ctx->failed)
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return VKD3D_ERROR_INVALID_SHADER;
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return VKD3D_ERROR_NOT_IMPLEMENTED;
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