Commit Graph

57 Commits

Author SHA1 Message Date
Giovanni Mascellani
7503429555 vkd3d-shader/ir: Check that TEMP registers have consistent dimensions. 2024-01-15 19:56:59 +01:00
Giovanni Mascellani
df2ae56de8 vkd3d-shader/d3dbc: Override the write mask when the destination is not vec4. 2024-01-04 22:23:20 +01:00
Zebediah Figura
1ce7e3d8b1 vkd3d-shader/d3dbc: Assign unique register indices for VKD3DSPR_RASTOUT. 2024-01-04 22:23:09 +01:00
Zebediah Figura
3f52fda8ad vkd3d-shader: Lower shader model 1/2 inter-stage I/O to a flat array.
An alternative is that we stash the reg_type in the signature, but this seems
far simpler for the backend to deal with.
2024-01-04 22:23:07 +01:00
Henri Verbeet
e33d3b3954 vkd3d-shader/ir: Rename the "immconst_uint" field of struct vkd3d_shader_register to "immconst_u32".
For consistency with the rest of vkd3d-shader; e.g. put_u32() and
read_u32().
2024-01-03 22:37:39 +01:00
Henri Verbeet
8a1de71fb1 vkd3d-shader/ir: Pass a uint32_t swizzle to vkd3d_swizzle_get_component(). 2023-12-14 23:19:49 +01:00
Zebediah Figura
ca8492c855 vkd3d-shader/d3dbc: Avoid shadowing "instr" in write_sm1_jump(). 2023-12-07 21:57:28 +01:00
Henri Verbeet
73c563ffb7 vkd3d-shader/d3dbc: Adjust the token count for DEF and DEFI instructions in shader_sm1_skip_opcode().
This was broken by commit e390bc35e2c9b0a2110370f916033eea2366317e; that
commit fixed the source count for these instructions, but didn't adjust
shader_sm1_skip_opcode(). Note that this only affects shader model 1;
later versions have a token count embedded in the initial opcode token.
2023-11-20 22:07:29 +01:00
Nikolay Sivov
dd6a9135f4 vkd3d-shader/hlsl: Implement tex2Dproj().
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2023-11-10 20:23:41 +01:00
Nikolay Sivov
76e42fbd21 vkd3d-shader/hlsl: Implement ternary operator for SM1.
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2023-11-08 22:49:31 +01:00
Giovanni Mascellani
2ba8c5771c vkd3d-shader: Deduplicate profile version comparison functions. 2023-11-02 18:22:35 +01:00
Zebediah Figura
6b7834d635 vkd3d-shader/d3dbc: Set the interpolation mode for signature elements. 2023-10-31 21:59:36 +01:00
Francisco Casas
38a7309758 vkd3d-shader/d3dbc: Use D3DSIO_TEXKILL instead of VKD3D_SM1_OP_TEXKILL (clangd). 2023-10-12 23:27:24 +02:00
Francisco Casas
74d79c7e45 vkd3d-shader/d3dbc: Initialize register dimension for all register types. 2023-09-26 22:07:06 +02:00
Francisco Casas
e904660497 vkd3d-shader: Turn vkd3d_shader_register.immconst_type into vkd3d_shader_register.dimension. 2023-09-26 22:07:04 +02:00
Francisco Casas
dc35125d73 vkd3d-shader/tpf: Use vsir_register_init() in shader_sm1_parse_dst_param(). 2023-09-26 22:07:03 +02:00
Francisco Casas
51aa5a45e9 vkd3d-shader/tpf: Use vsir_register_init() in shader_sm1_parse_src_param(). 2023-09-26 22:07:02 +02:00
Giovanni Mascellani
c052cd8998 vkd3d-shader/ir: Introduce a boilerplate to validate the generated IR.
For the moment the validator is trivial, it never fails. Checks will
be added incrementally.
2023-09-22 11:06:13 +02:00
Giovanni Mascellani
cf871d2cb2 vkd3d-shader: Embed the parsing location in vkd3d_shader_instruction.
So that it can be used for printing meaningful error locations by
downstream processors.
2023-09-22 11:06:12 +02:00
Giovanni Mascellani
a2fb9588c7 vkd3d-shader/d3dbc: Destroy the SM1 parser on parsing errors. 2023-09-22 11:06:09 +02:00
Giovanni Mascellani
d1cb6b41b1 vkd3d-shader/d3dbc: Skip DCL semantic tokens properly. 2023-09-22 11:06:08 +02:00
Giovanni Mascellani
05af25eecb vkd3d-shader: Rename shader_instruction_init(). 2023-09-22 11:06:05 +02:00
Zebediah Figura
9417c7cfb7 vkd3d-shader/d3dbc: Translate sm1 fragment outputs to system values. 2023-09-21 19:16:31 +02:00
Nikolay Sivov
ee6c66eb1b vkd3d-shader/d3dbc: Disallow 1D sampler types when writing sampler declaration.
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2023-09-13 23:11:14 +02:00
Zebediah Figura
63e056512d vkd3d-shader/hlsl: Introduce an hlsl_sprintf_alloc() helper. 2023-08-30 22:48:55 +02:00
Francisco Casas
96f66aa4f8 vkd3d-shader/d3dbc: Use the bind count instead of the allocation size in d3dbc.c.
This should have no effect, since in SM1 the allocation size is the
same as the bind count because there are no texture registers.
It is just done for consistency.
2023-08-15 21:51:33 +02:00
Francisco Casas
7eba063136 vkd3d-shader/hlsl: Rename hlsl_reg.bind_count to hlsl_reg.allocation_size.
We have to distinguish between the "bind count" and the "allocation size"
of variables.

The "allocation size" affects the starting register id for the resource to
be allocated next, while the "bind count" is determined by the last field
actually used. The former may be larger than the latter.

What we are currently calling hlsl_reg.bind_count is actually the
"allocation size", so a rename is in order.

The real "bind count", which will be introduced in following patches,
is important because it is what should be shown in the RDEF table and
some resource allocation rules depend on it.

For instance, for this shader:

    texture2D texs[3];
    texture2D tex;

    float4 main() : sv_target
    {
        return texs[0].Load(int3(0, 0, 0)) + tex.Load(int3(0, 0, 0));
    }

the variable "texs" has a "bind count" of 1, but an "allocation size" of
3:

    // Resource Bindings:
    //
    // Name                                 Type  Format         Dim      HLSL Bind  Count
    // ------------------------------ ---------- ------- ----------- -------------- ------
    // texs                              texture  float4          2d             t0      1
    // tex                               texture  float4          2d             t3      1
2023-08-15 21:51:27 +02:00
Zebediah Figura
cb96482500 vkd3d-shader: Add a separate field for the target location of a signature element.
We want to be able to remap input signatures based on the signature index, but
signature normalization both reorders the signature, and requires the old
register index, so add a new field for this.
2023-08-03 21:20:39 +09:00
Zebediah Figura
bad72d1874 vkd3d-shader/d3dbc: Make sure all inter-stage varyings have a unique register index.
spirv will need this.
2023-08-03 21:20:22 +09:00
Zebediah Figura
71afb78126 vkd3d-shader/d3dbc: Return ctx->result from hlsl_sm1_write(). 2023-08-02 20:18:59 +09:00
Zebediah Figura
6e370777b4 vkd3d-shader/d3dbc: Free vkd3d_bytecode_buffer data on failure. 2023-08-02 20:18:58 +09:00
Zebediah Figura
1bd873fb2b vkd3d-shader/d3dbc: Skip generic sampler declarations.
Instead of asserting.
2023-08-02 20:18:56 +09:00
Zebediah Figura
d077562f79 vkd3d-shader/d3dbc: Scan descriptors for constant register sets. 2023-07-17 22:56:39 +02:00
Zebediah Figura
53e9ad3e4c vkd3d-shader/hlsl: Do not emit DEF instructions for uniform constants. 2023-07-04 22:40:20 +02:00
Zebediah Figura
e390bc35e2 vkd3d-shader/d3dbc: Set the source count for DEF instructions to 1 (Valgrind).
We emit one source with multiple components.
2023-07-04 22:40:04 +02:00
Zebediah Figura
73d422a0e0 vkd3d-shader/d3dbc: Scan for the maximum temporary register index. 2023-07-04 22:39:48 +02:00
Nikolay Sivov
861078d63a vkd3d-shader/hlsl: Handle 'texkill' discard type for sm4+.
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2023-06-27 22:33:50 +02:00
Zebediah Figura
7e1fcdca89 vkd3d-shader: Synthesize signatures for d3dbc shaders. 2023-06-27 22:33:41 +02:00
Francisco Casas
c1ca0dafe8 vkd3d-shader/d3dbc: Avoid hlsl_type_get_regset() in d3dbc.c.
In SM1 we can expect all variables to always belong to a single regset.
structs in particular, should always be allocated to HLSL_REGSET_NUM,
since they are only allowed if all their components are numeric.

We are not covering the structs case because of the use of
hlsl_type_get_regset(), which is currently not defined for structs.

So the current shader

    struct
    {
        float4 a;
        float4 b;
    } apple;

    float4 main() : sv_target
    {
        return apple.a + apple.b;
    }

fails with

    vkd3d/libs/vkd3d-shader/hlsl.c:224: Aborting, reached unreachable code.

The solution is to iterate over all regsets to find the one where the
variable is allocated (if any), and ignore all others.
2023-06-22 22:00:14 +02:00
Conor McCarthy
adf7db021c vkd3d-shader/tpf: Validate input/output register index counts. 2023-05-09 21:51:17 +02:00
Francisco Casas
a91e6d4563 vkd3d-shader/hlsl: Write resource loads in SM1. 2023-05-08 20:24:15 +02:00
Francisco Casas
96c844ffb8 vkd3d-shader/hlsl: Write sampler declarations in SM1. 2023-05-08 20:24:15 +02:00
Francisco Casas
69ff249ef4 vkd3d-shader/hlsl: Support multiple-register variables in object regsets.
Variables that contain more than one object (arrays or structs) require
the allocation of contiguous registers in the respective object
register spaces.
2023-05-08 20:22:14 +02:00
Zebediah Figura
8b57a612d7 vkd3d-shader/hlsl: Map the colour output for ps_1_* to r0. 2023-05-03 21:12:39 +02:00
Conor McCarthy
85eb231492 vkd3d-shader/d3dbc: Return an error from vkd3d_shader_sm1_parser_create() if the parser failed. 2023-05-03 21:12:03 +02:00
Francisco Casas
b589c2b32d vkd3d-shader/hlsl: Move get_array_size() and get_array_type() to hlsl.c. 2023-05-01 22:18:19 +02:00
Ethan Lee
138c32ce88 vkd3d-shader/hlsl: Add support for ddx(), ddy() intrinsics.
SPIR-V already handled DSX/DSY, so only D3DBC/TPF needed new case blocks.

Signed-off-by: Ethan Lee <flibitijibibo@gmail.com>
2023-04-28 21:03:40 +02:00
Henri Verbeet
8e0df3f720 vkd3d-shader/sm1: Merge hlsl_sm1.c into d3dbc.c. 2023-04-20 22:54:32 +02:00
Henri Verbeet
1b7b694190 vkd3d-shader/sm1: Pass a vkd3d_shader_sm1_parser structure to shader_sm1_is_end(). 2023-04-12 21:54:55 +02:00
Henri Verbeet
df6a34e1bd vkd3d-shader/sm1: Pass a vkd3d_shader_sm1_parser structure to shader_sm1_read_instruction(). 2023-04-12 21:54:54 +02:00