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747 Commits

Author SHA1 Message Date
Conor McCarthy
5ebe0cc717 vkd3d-shader/spirv: Do not assert VKD3D_DATA_UINT in spirv_compiler_emit_ld_raw_structured_srv_uav(). 2024-01-22 22:18:17 +01:00
Giovanni Mascellani
1d45b7a422 vkd3d-shader/spirv: Normalise the shader before allocating registers. 
So registers are allocated after normalisation (which could require
additional registers).
 2024-01-18 23:15:48 +01:00
Conor McCarthy
ba1ee27b4b vkd3d-shader/dxil: Handle the DXIL PHI instruction. 2024-01-18 23:15:12 +01:00
Conor McCarthy
4c30b23821 vkd3d-shader: Make the control point count the outer dimension of I/O arrays. 
The relative-addressed case in shader_register_normalise_arrayed_addressing()
leaves the control point id in idx[0], while for constant register
indices it is placed in idx[1]. The latter case could be fixed instead,
but placing the control point count in the outer dimension is more
logical.
 2024-01-17 22:28:59 +01:00
Conor McCarthy
559d9d4ee0 vkd3d-shader/ir: Include an initial label instruction in the first control flow block. 2024-01-17 22:28:41 +01:00
Conor McCarthy
d402804851 vkd3d-shader/spirv: Do not emit function code before the main prolog. 2024-01-17 22:28:40 +01:00
Conor McCarthy
b4b2b0d3ac vkd3d-shader/spirv: Declare indexable temps as Private unless function scope is specified. 2024-01-17 22:28:39 +01:00
Conor McCarthy
37d9dba512 vkd3d-shader/ir: Store code block names in struct vkd3d_shader_desc. 2024-01-17 22:28:38 +01:00
Conor McCarthy
ffc65215ba vkd3d-shader/ir: Flatten SWITCH/CASE/DEFAULT/ENDSWITCH control flow instructions. 2024-01-17 22:28:36 +01:00
Conor McCarthy
dcb8527327 vkd3d-shader/ir: Flatten LOOP/BREAK/CONTINUE/ENDLOOP control flow instructions. 2024-01-17 22:28:35 +01:00
Conor McCarthy
e1dddc01b7 vkd3d-shader/ir: Flatten IF/ELSE/ENDIF control flow instructions. 2024-01-17 22:28:34 +01:00
Conor McCarthy
f3d464de0e vkd3d-shader/spirv: Handle RETP in spirv_compiler_handle_instruction(). 2024-01-17 22:28:33 +01:00
Conor McCarthy
bc1b5e7132 vkd3d-shader/spirv: Handle DISCARD and TEXKILL in spirv_compiler_handle_instruction(). 2024-01-17 22:28:31 +01:00
Conor McCarthy
db0d51675c vkd3d-shader/spirv: Emit descriptor offset loads in the function entry block. 
Ensures they are loaded only once per function independent of the
control flow graph.
 2024-01-17 22:28:29 +01:00
Conor McCarthy
52902b042f vkd3d-shader/spirv: Support vector source param for FIRSTBIT_HI and FIRSTBIT_SHI instructions. 2024-01-15 19:56:35 +01:00
Henri Verbeet
fd8a0d7fb6 vkd3d-shader/spirv: Pass a uint32_t write mask to spirv_compiler_emit_neg(). 2024-01-11 23:05:03 +01:00
Henri Verbeet
b4da553d28 vkd3d-shader/spirv: Pass a uint32_t write mask to spirv_compiler_emit_abs(). 2024-01-11 23:05:02 +01:00
Henri Verbeet
97acca715e vkd3d-shader/spirv: Pass a uin32_t write mask to spirv_compiler_emit_load_src(). 2024-01-11 23:05:01 +01:00
Henri Verbeet
5c2d0f42b5 vkd3d-shader/spirv: Pass a uint32_t write mask to vkd3d_symbol_set_register_info(). 2024-01-11 23:05:00 +01:00
Giovanni Mascellani
7f9803620f vkd3d-shader/spirv: Specify behavior for bit field instructions. 
Bit field instructions in SPIR-V do not specify what happens when
offset + count exceeds the type bit width. After this commit we
refine the emitted code's behavior to match TPF.

This fixes a few failures on MoltenVK.
 2024-01-08 21:44:52 +01:00
Henri Verbeet
60842b7181 vkd3d-shader/ir: Store source parameter swizzles as a uint32_t. 2024-01-04 22:23:51 +01:00
Henri Verbeet
9f4ca3bc9c vkd3d-shader/ir: Store instruction flags as a uint32_t. 2024-01-04 22:23:49 +01:00
Henri Verbeet
7f94fda05c vkd3d-shader/ir: Rename the "immconst_uint64" field of struct vkd3d_shader_register to "immconst_u64". 2024-01-03 22:37:43 +01:00
Henri Verbeet
e33d3b3954 vkd3d-shader/ir: Rename the "immconst_uint" field of struct vkd3d_shader_register to "immconst_u32". 
For consistency with the rest of vkd3d-shader; e.g. put_u32() and
read_u32().
 2024-01-03 22:37:39 +01:00
Conor McCarthy
78343dcf87 vkd3d-shader/spirv: Decorate non-float32 non-built-in pixel shader inputs as Flat. 
As per VUID-StandaloneSpirv-Flat-04744. Not strictly a regression, but
revealed by 66cb2815f because it declares unused inputs.
 2024-01-02 23:03:59 +01:00
Conor McCarthy
812f01c2e2 vkd3d-shader/spirv: Handle ITOI and UTOU in spirv_compiler_map_alu_instruction(). 
These instructions perform integer casts to/from 64 bits.
 2024-01-02 23:03:07 +01:00
Conor McCarthy
1eaa7d1dbe vkd3d-shader/spirv: Support UINT64 source in spirv_compiler_emit_bool_cast(). 2024-01-02 23:03:06 +01:00
Conor McCarthy
99924d913b vkd3d-shader/spirv: Support 64-bit sources in spirv_compiler_emit_int_div(). 2024-01-02 23:03:05 +01:00
Conor McCarthy
13459a55f1 vkd3d-shader/spirv: Introduce a UINT64 component type. 2024-01-02 23:03:04 +01:00
Conor McCarthy
fe44873979 vkd3d-shader/spirv: Introduce a data_type_is_64_bit() helper function. 2024-01-02 23:03:03 +01:00
Conor McCarthy
511c66d595 vkd3d-shader/spirv: Use data_type_is_integer() in spirv_compiler_emit_neg(). 2024-01-02 23:03:02 +01:00
Henri Verbeet
f96a791807 vkd3d-shader/ir: Pass a uint32_t swizzle to vkd3d_swizzle_get_component64(). 2023-12-14 23:19:51 +01:00
Henri Verbeet
8a1de71fb1 vkd3d-shader/ir: Pass a uint32_t swizzle to vkd3d_swizzle_get_component(). 2023-12-14 23:19:49 +01:00
Henri Verbeet
21491d1bbb vkd3d-shader/ir: Pass a uint32_t write mask to vkd3d_write_mask_32_from_64(). 2023-12-13 22:33:07 +01:00
Henri Verbeet
713adaa56a vkd3d-shader/ir: Pass a uint32_t write mask to vkd3d_write_mask_component_count(). 2023-12-13 22:33:04 +01:00
Henri Verbeet
e1aa12f94b vkd3d-shader/ir: Pass a uint32_t write mask to vkd3d_write_mask_get_component_idx(). 2023-12-13 22:33:03 +01:00
Giovanni Mascellani
ec4986e9e2 vkd3d-shader/spirv: Honor force_validation after emitting SPIR-V code. 2023-12-13 22:32:25 +01:00
Conor McCarthy
cdb9eecfd1 vkd3d-shader/spirv: Introduce a compiler feature flag for int64 capability. 2023-12-12 22:50:53 +01:00
Conor McCarthy
0610867334 vkd3d-shader/spirv: Emit an error if 64-bit integers are used. 2023-12-12 22:50:48 +01:00
Conor McCarthy
1929432559 vkd3d-shader: Introduce an instruction flag to suppress masking of bitwise shift counts. 
DXIL does not use implicit masking of shift counts.
 2023-12-12 22:50:46 +01:00
Conor McCarthy
2037daae32 vkd3d-shader/spirv: Bitcast if necessary in the spirv_compiler_emit_mov() general implementation. 
In SM 6, this is needed when storing an asfloat() or asuint() result in
an indexable temp, because dxc performs the bitcast by casting the
destination pointer.
 2023-12-11 23:18:52 +01:00
Zebediah Figura
66cb2815f0 vkd3d-shader/spirv: Declare I/O registers from the signature. 
Instead of parsing DCL instructions.

This allows sm1 to work without further effort, and simplifies sm6 code.
 2023-12-11 23:18:44 +01:00
Zebediah Figura
8876030590 vkd3d-shader/spirv: Do not use the output_info array for patch constants. 2023-12-11 23:18:40 +01:00
Conor McCarthy
cb88844a3d vkd3d-shader: Add a register index to struct vkd3d_shader_immediate_constant_buffer. 2023-12-07 21:56:47 +01:00
Conor McCarthy
ef940cb778 vkd3d-shader/spirv: Support declared component type and count in immediate constant buffers. 2023-12-07 21:56:45 +01:00
Conor McCarthy
16cb6fdbad vkd3d-shader/spirv: Support constant initialisers in indexable temps. 2023-12-07 21:56:44 +01:00
Conor McCarthy
69c3946c85 vkd3d-shader/spirv: Support declared component type and count in indexable temps. 2023-12-07 21:56:41 +01:00
Henri Verbeet
0c33f82f72 Release 1.10. 2023-12-06 15:31:21 +01:00
Conor McCarthy
9fcc904834 vkd3d-shader/spirv: Always emit clip/cull builtins as an array. 
Clip/cull distance can appear as input in pixel shaders, and the
array size must not be forced to zero.
 2023-12-06 15:31:20 +01:00
Conor McCarthy
b4d03c0221 vkd3d-shader/spirv: Do not emit a fixme for SV_TARGET in vkd3d_get_spirv_builtin(). 2023-12-04 22:22:55 +01:00