Commit Graph

101 Commits

Author SHA1 Message Date
Giovanni Mascellani
56f9057985 vkd3d-shader/ir: Do not allow IMMCONST and IMMCONST64 as destination registers. 2024-01-23 20:26:06 +01:00
Giovanni Mascellani
21633fcc52 vkd3d-shader/ir: Refactor register-type-specific code in parameter validation.
To better accommodate code for other register types.
2024-01-23 20:26:05 +01:00
Giovanni Mascellani
fb6409bda1 vkd3d-shader/ir: Check that all instructions appear in a block. 2024-01-23 20:26:03 +01:00
Henri Verbeet
adc02eada8 vkd3d-shader/ir: Store the temporary register count in struct vsir_program. 2024-01-22 22:18:53 +01:00
Henri Verbeet
94ca46916a vkd3d-shader/ir: Store the SSA register count in struct vsir_program. 2024-01-22 22:18:52 +01:00
Henri Verbeet
7b85cd6a31 vkd3d-shader/ir: Store the "use_vocp" field in struct vsir_program. 2024-01-22 22:18:51 +01:00
Henri Verbeet
23dcd4f22b vkd3d-shader/ir: Store the shader version in struct vsir_program. 2024-01-22 22:18:50 +01:00
Henri Verbeet
fc9043be3c vkd3d-shader/ir: Introduce struct vsir_program. 2024-01-22 22:18:48 +01:00
Giovanni Mascellani
67902d4304 vkd3d-shader/ir: Validate RET instructions. 2024-01-18 23:15:58 +01:00
Giovanni Mascellani
af96730276 vkd3d-shader/ir: Validate SWITCH_MONOLITHIC instructions. 2024-01-18 23:15:57 +01:00
Giovanni Mascellani
46ebb404d7 vkd3d-shader/ir: Validate BRANCH instructions. 2024-01-18 23:15:56 +01:00
Giovanni Mascellani
bc9db34cdc vkd3d-shader/ir: Validate LABEL instructions. 2024-01-18 23:15:55 +01:00
Giovanni Mascellani
dd1b2feec0 vkd3d-shader/ir: Validate LABEL registers. 2024-01-18 23:15:54 +01:00
Giovanni Mascellani
17f4afc2b5 vkd3d-shader/ir: Validate that structured CF does not appear in block-based shaders. 2024-01-18 23:15:53 +01:00
Conor McCarthy
83851133c5 vkd3d-shader/ir: Set merged signature element interpolation mode only from used elements. 2024-01-18 23:15:27 +01:00
Conor McCarthy
b8280e4210 vkd3d-shader/ir: Revert "Do not merge signature elements which have different interpolation modes.".
This reverts commit b5c067b41a.

The commit causes regressions in other shaders because unused elements
do not have an interpolation mode.
2024-01-18 23:15:25 +01:00
Conor McCarthy
efe800f7f0 vkd3d-shader/dxil: Handle the DXIL SWITCH instruction. 2024-01-18 23:15:14 +01:00
Conor McCarthy
4c30b23821 vkd3d-shader: Make the control point count the outer dimension of I/O arrays.
The relative-addressed case in shader_register_normalise_arrayed_addressing()
leaves the control point id in idx[0], while for constant register
indices it is placed in idx[1]. The latter case could be fixed instead,
but placing the control point count in the outer dimension is more
logical.
2024-01-17 22:28:59 +01:00
Conor McCarthy
418e8d8100 vkd3d-shader/ir: Expand index range write masks to cover all element masks.
For example, this occurred in a shader:

reg_idx write_mask
   0      xyz
   1      xyzw
   2      xyzw
   3      xyz

The dcl_indexrange instruction covered only xyz, so once merged, searching for
xyzw failed.

It is impossible to declare an input array where elements have different
component counts, but the optimiser can create this case. One way for
this to occur is to dynamically index input values via a local array
containing copies of the input values. The optimiser converts this to
dynamically indexed inputs.
2024-01-17 22:28:56 +01:00
Conor McCarthy
559d9d4ee0 vkd3d-shader/ir: Include an initial label instruction in the first control flow block. 2024-01-17 22:28:41 +01:00
Conor McCarthy
37d9dba512 vkd3d-shader/ir: Store code block names in struct vkd3d_shader_desc. 2024-01-17 22:28:38 +01:00
Conor McCarthy
ffc65215ba vkd3d-shader/ir: Flatten SWITCH/CASE/DEFAULT/ENDSWITCH control flow instructions. 2024-01-17 22:28:36 +01:00
Conor McCarthy
dcb8527327 vkd3d-shader/ir: Flatten LOOP/BREAK/CONTINUE/ENDLOOP control flow instructions. 2024-01-17 22:28:35 +01:00
Conor McCarthy
e1dddc01b7 vkd3d-shader/ir: Flatten IF/ELSE/ENDIF control flow instructions. 2024-01-17 22:28:34 +01:00
Giovanni Mascellani
b0c8a47f9d vkd3d-shader/ir: Check that SSA registers are used validly.
Specifically, they are assigned only once and only assigned components
are used.

Right now we don't check that the assignment dominates all usages.
2024-01-15 19:57:01 +01:00
Giovanni Mascellani
26bebe8f91 vkd3d-shader/ir: Check that SSA registers have consistent dimensions. 2024-01-15 19:57:00 +01:00
Giovanni Mascellani
7503429555 vkd3d-shader/ir: Check that TEMP registers have consistent dimensions. 2024-01-15 19:56:59 +01:00
Giovanni Mascellani
fbd77486de vkd3d-shader/ir: Use vkd3d_free() instead of free(). 2024-01-15 19:56:58 +01:00
Giovanni Mascellani
26c6a87268 vkd3d-shader/ir: Simplify control flow in vsir_validate_register(). 2024-01-15 19:56:56 +01:00
Giovanni Mascellani
78d95889bd vkd3d-shader: Make *src and *dst mutable in vkd3d_shader_instruction.
They were originally made const because no optimization/normalization
pass existed. Now having to cast away const all the time is becoming
more and more burdening.
2024-01-11 23:05:11 +01:00
Giovanni Mascellani
bd9118cac4 vkd3d-shader/ir: Validate destination write masks depending on the dimension. 2024-01-04 22:23:25 +01:00
Giovanni Mascellani
15e7711786 vkd3d-shader/ir: Validate source swizzles depending on the dimension. 2024-01-04 22:23:24 +01:00
Giovanni Mascellani
e91da41dea vkd3d-shader/ir: Validate SSA registers. 2024-01-04 22:23:23 +01:00
Zebediah Figura
1ce7e3d8b1 vkd3d-shader/d3dbc: Assign unique register indices for VKD3DSPR_RASTOUT. 2024-01-04 22:23:09 +01:00
Zebediah Figura
3f52fda8ad vkd3d-shader: Lower shader model 1/2 inter-stage I/O to a flat array.
An alternative is that we stash the reg_type in the signature, but this seems
far simpler for the backend to deal with.
2024-01-04 22:23:07 +01:00
Henri Verbeet
e33d3b3954 vkd3d-shader/ir: Rename the "immconst_uint" field of struct vkd3d_shader_register to "immconst_u32".
For consistency with the rest of vkd3d-shader; e.g. put_u32() and
read_u32().
2024-01-03 22:37:39 +01:00
Henri Verbeet
8a1de71fb1 vkd3d-shader/ir: Pass a uint32_t swizzle to vkd3d_swizzle_get_component(). 2023-12-14 23:19:49 +01:00
Henri Verbeet
713adaa56a vkd3d-shader/ir: Pass a uint32_t write mask to vkd3d_write_mask_component_count(). 2023-12-13 22:33:04 +01:00
Henri Verbeet
e1aa12f94b vkd3d-shader/ir: Pass a uint32_t write mask to vkd3d_write_mask_get_component_idx(). 2023-12-13 22:33:03 +01:00
Conor McCarthy
45679a966c vkd3d-shader/ir: Pass a local copy of location to control_point_normaliser_emit_hs_input(). 2023-12-07 21:57:49 +01:00
Conor McCarthy
b5c067b41a vkd3d-shader/ir: Do not merge signature elements which have different interpolation modes.
Regression in signature normalisation, however the old code was not
correct either because it would apply the interpolation mode to all
components. Found in an Assassin's Creed: Valhalla shader.
2023-12-06 15:31:18 +01:00
Conor McCarthy
eb05e434ff vkd3d-shader/dxil: Implement the DXIL LOAD instruction. 2023-11-22 22:07:59 +01:00
Conor McCarthy
59730ecfd8 vkd3d-shader/dxil: Implement the DXIL GEP instruction. 2023-11-22 22:07:58 +01:00
Giovanni Mascellani
b1123ed35f vkd3d-shader/ir: Correctly compute the TEMP count after hull shader flattening.
The previous computation was incorrect because the count was taken
after resetting it to zero (as part of setting the instruction to NOP).
2023-11-20 22:07:41 +01:00
Giovanni Mascellani
5cb17cfd1c vkd3d-shader/ir: Validate IFC instructions. 2023-11-20 22:07:36 +01:00
Giovanni Mascellani
849a8f3add vkd3d-shader/ir: Expect two sources for LOOP in SM1-3. 2023-11-20 22:07:35 +01:00
Giovanni Mascellani
0c5c18bdce vkd3d-shader/ir: Validate index count for IMMCONST64 registers. 2023-11-09 21:15:51 +01:00
Giovanni Mascellani
b74470b9d2 vkd3d-shader/ir: Validate index count for IMMCONST registers. 2023-11-09 21:15:49 +01:00
Giovanni Mascellani
c867682982 vkd3d-shader/ir: Validate index count for NULL registers. 2023-11-09 21:15:47 +01:00
Giovanni Mascellani
12fcb8dcc6 vkd3d-shader/ir: Validate register indices. 2023-11-09 21:15:44 +01:00