On radv with AMD Polaris GPUs, the alignment may be as high as 0x20000
or 0x40000. World of Warcraft seems to ignore the alignment returned
from GetResourceAllocationInfo(), and simply aligns to 0x10000
(D3D12_DEFAULT_RESOURCE_PLACEMENT_ALIGNMENT).
Signed-off-by: Józef Kucia <jkucia@codeweavers.com>
Signed-off-by: Henri Verbeet <hverbeet@codeweavers.com>
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
We use transfer operations instead of unordered access.
Signed-off-by: Józef Kucia <jkucia@codeweavers.com>
Signed-off-by: Henri Verbeet <hverbeet@codeweavers.com>
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
If residencyNonResidentStrict is supported.
Signed-off-by: Józef Kucia <jkucia@codeweavers.com>
Signed-off-by: Henri Verbeet <hverbeet@codeweavers.com>
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
Used by Resident Evil 2.
Signed-off-by: Philip Rebohle <philip.rebohle@tu-dortmund.de>
Signed-off-by: Józef Kucia <jkucia@codeweavers.com>
Signed-off-by: Henri Verbeet <hverbeet@codeweavers.com>
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
Allows us to create the render pass while creating the pipeline state.
Signed-off-by: Józef Kucia <jkucia@codeweavers.com>
Signed-off-by: Henri Verbeet <hverbeet@codeweavers.com>
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
Use the last attachment for depth-stencil instead of the first.
Signed-off-by: Józef Kucia <jkucia@codeweavers.com>
Signed-off-by: Henri Verbeet <hverbeet@codeweavers.com>
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
Fixes a regression introduced by
9eba55403d9a3b9cd58f76a6f14ddf5f745df73a.
Signed-off-by: Józef Kucia <jkucia@codeweavers.com>
Signed-off-by: Henri Verbeet <hverbeet@codeweavers.com>
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
This is invalid usage according to the D3D12 validation layer. However,
Shadow of the Tomb Raider uses PSOs with DSVFormat equal to
DXGI_FORMAT_UNKNOWN and enabled depth-stencil tests. Moreover, the test
in the next commit passes on Windows with AMD, Intel and Nvidia GPUs.
Signed-off-by: Józef Kucia <jkucia@codeweavers.com>
Signed-off-by: Henri Verbeet <hverbeet@codeweavers.com>
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
Framebuffers are created with a render pass from the graphics pipeline.
In the next commits, we defer the creation of render passes for graphics
pipelines with invalid DSV formats.
Signed-off-by: Józef Kucia <jkucia@codeweavers.com>
Signed-off-by: Henri Verbeet <hverbeet@codeweavers.com>
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
An application uses the following pattern:
Wait(queue, fence, value);
ExecuteCommandLists(queue, count, lists);
Wait(queue, fence, value);
ExecuteCommandLists(queue, count2, lists2);
In this case, we don't need to wait for the fence again.
Signed-off-by: Józef Kucia <jkucia@codeweavers.com>
Signed-off-by: Henri Verbeet <hverbeet@codeweavers.com>
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
A NULL RTV is expected to be used when RTVFormat is DXGI_FORMAT_UNKNOWN.
Signed-off-by: Józef Kucia <jkucia@codeweavers.com>
Signed-off-by: Henri Verbeet <hverbeet@codeweavers.com>
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
The Vulkan spec states:
If sharingMode is VK_SHARING_MODE_CONCURRENT, queueFamilyIndexCount
must be greater than 1.
Signed-off-by: Józef Kucia <jkucia@codeweavers.com>
Signed-off-by: Henri Verbeet <hverbeet@codeweavers.com>
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
Waiting before the signal is not supported yet.
Signed-off-by: Józef Kucia <jkucia@codeweavers.com>
Signed-off-by: Henri Verbeet <hverbeet@codeweavers.com>
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
In preparation for the following commmit.
Sequence numbers allows us to more easily track progress on queues in
comparison to tracking each VkFence individually.
Signed-off-by: Józef Kucia <jkucia@codeweavers.com>
Signed-off-by: Henri Verbeet <hverbeet@codeweavers.com>
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
