2022-01-26 17:40:27 -08:00
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/*
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* Copyright 2020-2021 Zebediah Figura for CodeWeavers
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA
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*/
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2022-01-26 17:40:28 -08:00
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#include "config.h"
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#include <assert.h>
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2024-04-18 11:05:16 -07:00
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#ifndef __MINGW32__
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#define WIDL_C_INLINE_WRAPPERS
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#endif
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2022-01-26 17:40:27 -08:00
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#define COBJMACROS
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#define CONST_VTABLE
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#define VKD3D_TEST_NO_DEFS
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2022-01-26 17:40:28 -08:00
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#include "d3d12_crosstest.h"
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2022-01-26 17:40:27 -08:00
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#include "shader_runner.h"
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2023-09-14 02:29:24 -07:00
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#include "dxcompiler.h"
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2022-01-26 17:40:27 -08:00
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2024-05-02 11:56:04 -07:00
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VKD3D_AGILITY_SDK_EXPORTS
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2022-03-21 18:42:17 -07:00
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struct d3d12_resource
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2022-01-26 17:40:30 -08:00
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{
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2022-03-21 18:42:17 -07:00
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struct resource r;
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2022-01-26 17:40:30 -08:00
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D3D12_DESCRIPTOR_RANGE descriptor_range;
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ID3D12Resource *resource;
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unsigned int root_index;
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};
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2022-03-21 18:42:17 -07:00
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static struct d3d12_resource *d3d12_resource(struct resource *r)
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2022-01-26 17:40:30 -08:00
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{
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2022-03-21 18:42:17 -07:00
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return CONTAINING_RECORD(r, struct d3d12_resource, r);
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2022-01-26 17:40:30 -08:00
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}
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2022-03-19 10:35:32 -07:00
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struct d3d12_shader_runner
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2022-01-26 17:40:28 -08:00
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{
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2022-03-19 10:35:32 -07:00
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struct shader_runner r;
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2024-02-19 07:47:11 -08:00
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struct shader_runner_caps caps;
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2022-01-26 17:40:28 -08:00
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struct test_context test_context;
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2022-03-12 13:02:15 -08:00
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2024-04-14 17:33:15 -07:00
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ID3D12DescriptorHeap *heap, *rtv_heap, *dsv_heap;
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2021-08-13 14:37:31 -07:00
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ID3D12CommandQueue *compute_queue;
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ID3D12CommandAllocator *compute_allocator;
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ID3D12GraphicsCommandList *compute_list;
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2023-09-14 02:29:24 -07:00
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IDxcCompiler3 *dxc_compiler;
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2022-01-26 17:40:28 -08:00
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};
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2022-03-19 10:35:32 -07:00
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static struct d3d12_shader_runner *d3d12_shader_runner(struct shader_runner *r)
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2022-01-26 17:40:28 -08:00
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{
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2022-03-19 10:35:32 -07:00
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return CONTAINING_RECORD(r, struct d3d12_shader_runner, r);
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2022-01-26 17:40:28 -08:00
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}
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2023-09-20 21:32:25 -07:00
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static ID3D10Blob *compile_shader(const struct d3d12_shader_runner *runner, const char *source, enum shader_type type)
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2022-01-26 17:40:27 -08:00
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{
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ID3D10Blob *blob = NULL, *errors = NULL;
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2022-03-21 18:42:14 -07:00
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char profile[7];
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2022-01-26 17:40:27 -08:00
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HRESULT hr;
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static const char *const shader_models[] =
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{
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2022-03-21 18:42:14 -07:00
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[SHADER_MODEL_2_0] = "4_0",
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2023-04-30 17:27:58 -07:00
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[SHADER_MODEL_3_0] = "4_0",
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2022-03-21 18:42:14 -07:00
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[SHADER_MODEL_4_0] = "4_0",
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[SHADER_MODEL_4_1] = "4_1",
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[SHADER_MODEL_5_0] = "5_0",
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[SHADER_MODEL_5_1] = "5_1",
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2023-09-14 02:29:24 -07:00
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[SHADER_MODEL_6_0] = "6_0",
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2022-01-26 17:40:27 -08:00
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};
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2023-09-14 02:29:24 -07:00
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if (runner->r.minimum_shader_model >= SHADER_MODEL_6_0)
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{
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assert(runner->dxc_compiler);
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hr = dxc_compiler_compile_shader(runner->dxc_compiler, type, runner->r.compile_options, source, &blob, &errors);
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}
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else
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{
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sprintf(profile, "%s_%s", shader_type_string(type), shader_models[runner->r.minimum_shader_model]);
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hr = D3DCompile(source, strlen(source), NULL, NULL, NULL, "main", profile, runner->r.compile_options, 0, &blob, &errors);
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}
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2022-04-14 03:52:33 -07:00
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ok(FAILED(hr) == !blob, "Got unexpected hr %#x, blob %p.\n", hr, blob);
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2022-01-26 17:40:27 -08:00
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if (errors)
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{
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if (vkd3d_test_state.debug_level)
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trace("%s\n", (char *)ID3D10Blob_GetBufferPointer(errors));
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ID3D10Blob_Release(errors);
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}
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return blob;
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}
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2022-06-08 16:18:35 -07:00
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#define MAX_RESOURCE_DESCRIPTORS (MAX_RESOURCES * 2)
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2022-03-12 13:02:15 -08:00
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2022-03-21 18:42:17 -07:00
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static struct resource *d3d12_runner_create_resource(struct shader_runner *r, const struct resource_params *params)
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2022-01-26 17:40:29 -08:00
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{
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2022-03-19 10:35:32 -07:00
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struct d3d12_shader_runner *runner = d3d12_shader_runner(r);
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struct test_context *test_context = &runner->test_context;
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2022-01-26 17:40:29 -08:00
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ID3D12Device *device = test_context->device;
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2024-03-20 18:21:12 -07:00
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D3D12_SUBRESOURCE_DATA resource_data[3] = {0};
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2022-03-21 18:42:17 -07:00
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struct d3d12_resource *resource;
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2023-04-30 17:23:00 -07:00
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unsigned int buffer_offset = 0;
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2024-02-12 11:27:52 -08:00
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D3D12_RESOURCE_STATES state;
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2023-04-30 17:23:00 -07:00
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2024-06-17 14:01:04 -07:00
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if (params->desc.level_count > ARRAY_SIZE(resource_data))
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fatal_error("Level count %u is too high.\n", params->desc.level_count);
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2022-01-26 17:40:29 -08:00
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2022-03-21 18:42:17 -07:00
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resource = calloc(1, sizeof(*resource));
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2022-06-08 16:18:35 -07:00
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init_resource(&resource->r, params);
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2022-03-12 13:02:15 -08:00
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2024-06-17 14:01:04 -07:00
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for (unsigned int level = 0; level < params->desc.level_count; ++level)
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2023-04-30 17:23:00 -07:00
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{
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2024-06-17 14:01:04 -07:00
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unsigned int level_width = get_level_dimension(params->desc.width, level);
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unsigned int level_height = get_level_dimension(params->desc.height, level);
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2023-04-30 17:23:00 -07:00
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resource_data[level].pData = ¶ms->data[buffer_offset];
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2024-06-17 14:01:04 -07:00
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resource_data[level].RowPitch = level_width * params->desc.texel_size;
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2023-04-30 17:23:00 -07:00
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resource_data[level].SlicePitch = level_height * resource_data[level].RowPitch;
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buffer_offset += resource_data[level].SlicePitch;
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}
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2024-06-17 14:01:04 -07:00
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switch (params->desc.type)
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2022-03-21 18:42:17 -07:00
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{
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2022-06-08 16:18:37 -07:00
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case RESOURCE_TYPE_RENDER_TARGET:
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if (!runner->rtv_heap)
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runner->rtv_heap = create_cpu_descriptor_heap(device,
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D3D12_DESCRIPTOR_HEAP_TYPE_RTV, MAX_RESOURCE_DESCRIPTORS);
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2024-06-17 14:01:04 -07:00
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if (params->desc.slot >= D3D12_SIMULTANEOUS_RENDER_TARGET_COUNT)
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fatal_error("RTV slot %u is too high.\n", params->desc.slot);
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if (params->desc.sample_count > 1 && params->desc.level_count > 1)
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2024-04-09 20:51:06 -07:00
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fatal_error("Multisampled texture has multiple levels.\n");
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2022-06-08 16:18:37 -07:00
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2024-04-09 20:51:06 -07:00
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resource->resource = create_default_texture_(__LINE__, device, D3D12_RESOURCE_DIMENSION_TEXTURE2D,
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2024-06-17 14:01:04 -07:00
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params->desc.width, params->desc.height, 1, params->desc.level_count, params->desc.sample_count, params->desc.format,
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2024-04-09 20:51:06 -07:00
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D3D12_RESOURCE_FLAG_ALLOW_RENDER_TARGET, D3D12_RESOURCE_STATE_RENDER_TARGET);
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2022-06-08 16:18:37 -07:00
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ID3D12Device_CreateRenderTargetView(device, resource->resource,
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2024-06-17 14:01:04 -07:00
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NULL, get_cpu_rtv_handle(test_context, runner->rtv_heap, resource->r.desc.slot));
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2022-06-08 16:18:37 -07:00
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break;
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2024-04-14 17:33:15 -07:00
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case RESOURCE_TYPE_DEPTH_STENCIL:
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if (!runner->dsv_heap)
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runner->dsv_heap = create_cpu_descriptor_heap(device, D3D12_DESCRIPTOR_HEAP_TYPE_DSV, 1);
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2024-06-17 14:01:04 -07:00
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resource->resource = create_default_texture2d(device, params->desc.width, params->desc.height, 1, params->desc.level_count,
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params->desc.format, D3D12_RESOURCE_FLAG_ALLOW_DEPTH_STENCIL, D3D12_RESOURCE_STATE_DEPTH_WRITE);
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2024-04-14 17:33:15 -07:00
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ID3D12Device_CreateDepthStencilView(device, resource->resource,
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NULL, get_cpu_dsv_handle(test_context, runner->dsv_heap, 0));
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break;
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2022-03-21 18:42:17 -07:00
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case RESOURCE_TYPE_TEXTURE:
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if (!runner->heap)
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runner->heap = create_gpu_descriptor_heap(device,
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D3D12_DESCRIPTOR_HEAP_TYPE_CBV_SRV_UAV, MAX_RESOURCE_DESCRIPTORS);
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2024-06-17 14:01:04 -07:00
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if (params->desc.dimension == RESOURCE_DIMENSION_BUFFER)
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2024-01-23 15:26:11 -08:00
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{
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D3D12_SHADER_RESOURCE_VIEW_DESC srv_desc = { 0 };
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resource->resource = create_default_buffer(device, params->data_size,
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0, D3D12_RESOURCE_STATE_COPY_DEST);
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upload_buffer_data_with_states(resource->resource, 0, params->data_size, resource_data[0].pData,
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test_context->queue, test_context->list,
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RESOURCE_STATE_DO_NOT_CHANGE,
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D3D12_RESOURCE_STATE_NON_PIXEL_SHADER_RESOURCE | D3D12_RESOURCE_STATE_PIXEL_SHADER_RESOURCE);
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reset_command_list(test_context->list, test_context->allocator);
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2024-06-17 14:01:04 -07:00
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srv_desc.Format = params->desc.format;
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2024-01-23 15:26:11 -08:00
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srv_desc.ViewDimension = D3D12_SRV_DIMENSION_BUFFER;
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srv_desc.Shader4ComponentMapping = D3D12_DEFAULT_SHADER_4_COMPONENT_MAPPING;
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2024-06-17 14:01:04 -07:00
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srv_desc.Buffer.NumElements = params->desc.width * params->desc.height;
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2024-01-23 15:26:11 -08:00
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ID3D12Device_CreateShaderResourceView(device, resource->resource,
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2024-06-17 14:01:04 -07:00
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&srv_desc, get_cpu_descriptor_handle(test_context, runner->heap, resource->r.desc.slot));
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2024-01-23 15:26:11 -08:00
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}
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else
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{
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2024-06-17 14:01:04 -07:00
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if (params->desc.sample_count > 1 && params->desc.level_count > 1)
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2024-04-09 20:51:06 -07:00
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fatal_error("Multisampled texture has multiple levels.\n");
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resource->resource = create_default_texture_(__LINE__, device, D3D12_RESOURCE_DIMENSION_TEXTURE2D,
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2024-06-17 14:01:04 -07:00
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params->desc.width, params->desc.height, 1, params->desc.level_count, params->desc.sample_count, params->desc.format,
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2024-04-09 20:51:06 -07:00
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/* Multisampled textures must have ALLOW_RENDER_TARGET set. */
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2024-06-17 14:01:04 -07:00
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(params->desc.sample_count > 1) ? D3D12_RESOURCE_FLAG_ALLOW_RENDER_TARGET : 0,
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2024-04-09 20:51:06 -07:00
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D3D12_RESOURCE_STATE_COPY_DEST);
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if (params->data)
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{
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2024-06-17 14:01:04 -07:00
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if (params->desc.sample_count > 1)
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2024-04-09 20:51:06 -07:00
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fatal_error("Cannot upload data to a multisampled texture.\n");
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upload_texture_data_with_states(resource->resource, resource_data,
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2024-06-17 14:01:04 -07:00
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params->desc.level_count, test_context->queue, test_context->list,
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2024-04-09 20:51:06 -07:00
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RESOURCE_STATE_DO_NOT_CHANGE,
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D3D12_RESOURCE_STATE_NON_PIXEL_SHADER_RESOURCE | D3D12_RESOURCE_STATE_PIXEL_SHADER_RESOURCE);
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reset_command_list(test_context->list, test_context->allocator);
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}
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2024-01-23 15:26:11 -08:00
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ID3D12Device_CreateShaderResourceView(device, resource->resource,
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2024-06-17 14:01:04 -07:00
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NULL, get_cpu_descriptor_handle(test_context, runner->heap, resource->r.desc.slot));
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2024-01-23 15:26:11 -08:00
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}
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2022-03-21 18:42:17 -07:00
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break;
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2022-03-21 18:42:18 -07:00
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2022-06-08 16:18:35 -07:00
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case RESOURCE_TYPE_UAV:
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if (!runner->heap)
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runner->heap = create_gpu_descriptor_heap(device,
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D3D12_DESCRIPTOR_HEAP_TYPE_CBV_SRV_UAV, MAX_RESOURCE_DESCRIPTORS);
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2024-06-17 14:01:04 -07:00
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if (params->desc.dimension == RESOURCE_DIMENSION_BUFFER)
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2024-02-12 11:27:52 -08:00
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{
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2024-01-22 15:20:18 -08:00
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D3D12_UNORDERED_ACCESS_VIEW_DESC uav_desc = { 0 };
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resource->resource = create_default_buffer(device, params->data_size,
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D3D12_RESOURCE_FLAG_ALLOW_UNORDERED_ACCESS, D3D12_RESOURCE_STATE_COPY_DEST);
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upload_buffer_data_with_states(resource->resource, 0, params->data_size, resource_data[0].pData,
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test_context->queue, test_context->list,
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2024-02-12 11:27:52 -08:00
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RESOURCE_STATE_DO_NOT_CHANGE, D3D12_RESOURCE_STATE_UNORDERED_ACCESS);
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reset_command_list(test_context->list, test_context->allocator);
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2023-05-18 03:46:33 -07:00
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2024-06-17 14:01:04 -07:00
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uav_desc.Format = params->desc.format;
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2024-01-22 15:20:18 -08:00
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uav_desc.ViewDimension = D3D12_UAV_DIMENSION_BUFFER;
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2024-06-17 14:01:04 -07:00
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uav_desc.Buffer.NumElements = params->desc.width * params->desc.height;
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2024-01-31 22:01:45 -08:00
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uav_desc.Buffer.StructureByteStride = params->stride;
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2024-05-31 06:46:38 -07:00
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uav_desc.Buffer.Flags = params->is_raw ? D3D12_BUFFER_UAV_FLAG_RAW : 0;
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2023-05-18 03:46:33 -07:00
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2024-01-22 15:20:18 -08:00
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ID3D12Device_CreateUnorderedAccessView(device, resource->resource,
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2024-03-12 23:36:59 -07:00
|
|
|
params->is_uav_counter ? resource->resource : NULL, &uav_desc,
|
2024-06-17 14:01:04 -07:00
|
|
|
get_cpu_descriptor_handle(test_context, runner->heap, resource->r.desc.slot + MAX_RESOURCES));
|
2024-01-22 15:20:18 -08:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
state = params->data ? D3D12_RESOURCE_STATE_COPY_DEST : D3D12_RESOURCE_STATE_UNORDERED_ACCESS;
|
2024-06-17 14:01:04 -07:00
|
|
|
resource->resource = create_default_texture2d(device, params->desc.width, params->desc.height, 1, params->desc.level_count,
|
|
|
|
params->desc.format, D3D12_RESOURCE_FLAG_ALLOW_UNORDERED_ACCESS, state);
|
2024-01-22 15:20:18 -08:00
|
|
|
if (params->data)
|
|
|
|
{
|
|
|
|
upload_texture_data_with_states(resource->resource, resource_data,
|
2024-06-17 14:01:04 -07:00
|
|
|
params->desc.level_count, test_context->queue, test_context->list,
|
2024-01-22 15:20:18 -08:00
|
|
|
RESOURCE_STATE_DO_NOT_CHANGE, D3D12_RESOURCE_STATE_UNORDERED_ACCESS);
|
|
|
|
reset_command_list(test_context->list, test_context->allocator);
|
|
|
|
}
|
|
|
|
ID3D12Device_CreateUnorderedAccessView(device, resource->resource, NULL, NULL,
|
2024-06-17 14:01:04 -07:00
|
|
|
get_cpu_descriptor_handle(test_context, runner->heap, resource->r.desc.slot + MAX_RESOURCES));
|
2024-01-22 15:20:18 -08:00
|
|
|
}
|
2023-05-18 03:46:33 -07:00
|
|
|
break;
|
2024-01-22 15:20:18 -08:00
|
|
|
|
2022-03-21 18:42:18 -07:00
|
|
|
case RESOURCE_TYPE_VERTEX_BUFFER:
|
|
|
|
resource->resource = create_upload_buffer(device, params->data_size, params->data);
|
|
|
|
break;
|
2022-03-21 18:42:17 -07:00
|
|
|
}
|
2022-01-26 17:40:29 -08:00
|
|
|
|
2022-03-21 18:42:17 -07:00
|
|
|
return &resource->r;
|
2022-01-26 17:40:29 -08:00
|
|
|
}
|
|
|
|
|
2022-03-21 18:42:17 -07:00
|
|
|
static void d3d12_runner_destroy_resource(struct shader_runner *r, struct resource *res)
|
2022-01-26 17:40:29 -08:00
|
|
|
{
|
2022-03-21 18:42:17 -07:00
|
|
|
struct d3d12_resource *resource = d3d12_resource(res);
|
2022-01-26 17:40:30 -08:00
|
|
|
|
2022-03-21 18:42:17 -07:00
|
|
|
ID3D12Resource_Release(resource->resource);
|
|
|
|
free(resource);
|
2022-01-26 17:40:29 -08:00
|
|
|
}
|
|
|
|
|
2021-08-13 14:37:31 -07:00
|
|
|
static ID3D12RootSignature *d3d12_runner_create_root_signature(struct d3d12_shader_runner *runner,
|
|
|
|
ID3D12CommandQueue *queue, ID3D12CommandAllocator *allocator,
|
|
|
|
ID3D12GraphicsCommandList *command_list, unsigned int *uniform_index)
|
2022-01-26 17:40:28 -08:00
|
|
|
{
|
|
|
|
D3D12_ROOT_SIGNATURE_DESC root_signature_desc = {0};
|
2023-07-25 01:46:54 -07:00
|
|
|
D3D12_ROOT_PARAMETER root_params[17], *root_param;
|
|
|
|
D3D12_STATIC_SAMPLER_DESC static_samplers[7];
|
2024-01-29 18:01:57 -08:00
|
|
|
struct d3d12_resource *base_resource = NULL;
|
2021-08-13 14:37:31 -07:00
|
|
|
ID3D12RootSignature *root_signature;
|
2024-01-29 18:01:57 -08:00
|
|
|
unsigned int slot;
|
2022-01-26 17:40:28 -08:00
|
|
|
HRESULT hr;
|
|
|
|
size_t i;
|
|
|
|
|
|
|
|
root_signature_desc.NumParameters = 0;
|
|
|
|
root_signature_desc.pParameters = root_params;
|
|
|
|
root_signature_desc.NumStaticSamplers = 0;
|
|
|
|
root_signature_desc.pStaticSamplers = static_samplers;
|
2022-03-21 18:42:16 -07:00
|
|
|
root_signature_desc.Flags = D3D12_ROOT_SIGNATURE_FLAG_ALLOW_INPUT_ASSEMBLER_INPUT_LAYOUT;
|
2022-01-26 17:40:28 -08:00
|
|
|
|
2022-03-19 10:35:32 -07:00
|
|
|
if (runner->r.uniform_count)
|
2022-01-26 17:40:28 -08:00
|
|
|
{
|
2021-08-13 14:37:31 -07:00
|
|
|
*uniform_index = root_signature_desc.NumParameters++;
|
|
|
|
root_param = &root_params[*uniform_index];
|
2022-01-26 17:40:28 -08:00
|
|
|
root_param->ParameterType = D3D12_ROOT_PARAMETER_TYPE_32BIT_CONSTANTS;
|
|
|
|
root_param->Constants.ShaderRegister = 0;
|
|
|
|
root_param->Constants.RegisterSpace = 0;
|
2022-03-19 10:35:32 -07:00
|
|
|
root_param->Constants.Num32BitValues = runner->r.uniform_count;
|
2022-01-26 17:40:28 -08:00
|
|
|
root_param->ShaderVisibility = D3D12_SHADER_VISIBILITY_ALL;
|
|
|
|
}
|
|
|
|
|
2022-03-21 18:42:17 -07:00
|
|
|
for (i = 0; i < runner->r.resource_count; ++i)
|
2022-01-26 17:40:28 -08:00
|
|
|
{
|
2022-03-21 18:42:17 -07:00
|
|
|
struct d3d12_resource *resource = d3d12_resource(runner->r.resources[i]);
|
2022-01-26 17:40:28 -08:00
|
|
|
D3D12_DESCRIPTOR_RANGE *range;
|
|
|
|
|
2024-06-17 14:01:04 -07:00
|
|
|
switch (resource->r.desc.type)
|
2022-03-21 18:42:17 -07:00
|
|
|
{
|
|
|
|
case RESOURCE_TYPE_TEXTURE:
|
2022-06-08 16:18:35 -07:00
|
|
|
case RESOURCE_TYPE_UAV:
|
2022-03-21 18:42:17 -07:00
|
|
|
range = &resource->descriptor_range;
|
|
|
|
|
2024-06-17 14:01:04 -07:00
|
|
|
if (base_resource && resource->r.desc.type == base_resource->r.desc.type && resource->r.desc.slot == slot + 1)
|
2024-01-29 18:01:57 -08:00
|
|
|
{
|
|
|
|
++base_resource->descriptor_range.NumDescriptors;
|
|
|
|
resource->descriptor_range.NumDescriptors = 0;
|
|
|
|
++slot;
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
2022-03-21 18:42:17 -07:00
|
|
|
resource->root_index = root_signature_desc.NumParameters++;
|
|
|
|
root_param = &root_params[resource->root_index];
|
|
|
|
root_param->ParameterType = D3D12_ROOT_PARAMETER_TYPE_DESCRIPTOR_TABLE;
|
|
|
|
root_param->DescriptorTable.NumDescriptorRanges = 1;
|
|
|
|
root_param->DescriptorTable.pDescriptorRanges = range;
|
|
|
|
root_param->ShaderVisibility = D3D12_SHADER_VISIBILITY_ALL;
|
|
|
|
|
2024-06-17 14:01:04 -07:00
|
|
|
if (resource->r.desc.type == RESOURCE_TYPE_UAV)
|
2022-06-08 16:18:35 -07:00
|
|
|
range->RangeType = D3D12_DESCRIPTOR_RANGE_TYPE_UAV;
|
|
|
|
else
|
|
|
|
range->RangeType = D3D12_DESCRIPTOR_RANGE_TYPE_SRV;
|
2022-03-21 18:42:17 -07:00
|
|
|
range->NumDescriptors = 1;
|
2024-06-17 14:01:04 -07:00
|
|
|
range->BaseShaderRegister = resource->r.desc.slot;
|
2022-03-21 18:42:17 -07:00
|
|
|
range->RegisterSpace = 0;
|
|
|
|
range->OffsetInDescriptorsFromTableStart = 0;
|
2024-01-29 18:01:57 -08:00
|
|
|
|
|
|
|
base_resource = resource;
|
2024-06-17 14:01:04 -07:00
|
|
|
slot = resource->r.desc.slot;
|
2022-03-21 18:42:17 -07:00
|
|
|
break;
|
2022-03-21 18:42:18 -07:00
|
|
|
|
2022-06-08 16:18:37 -07:00
|
|
|
case RESOURCE_TYPE_RENDER_TARGET:
|
2024-04-14 17:33:15 -07:00
|
|
|
case RESOURCE_TYPE_DEPTH_STENCIL:
|
2022-03-21 18:42:18 -07:00
|
|
|
case RESOURCE_TYPE_VERTEX_BUFFER:
|
|
|
|
break;
|
2022-03-21 18:42:17 -07:00
|
|
|
}
|
2022-01-26 17:40:28 -08:00
|
|
|
}
|
|
|
|
|
|
|
|
assert(root_signature_desc.NumParameters <= ARRAY_SIZE(root_params));
|
|
|
|
|
2022-03-19 10:35:32 -07:00
|
|
|
for (i = 0; i < runner->r.sampler_count; ++i)
|
2022-01-26 17:40:28 -08:00
|
|
|
{
|
|
|
|
D3D12_STATIC_SAMPLER_DESC *sampler_desc = &static_samplers[root_signature_desc.NumStaticSamplers++];
|
2022-03-19 10:35:32 -07:00
|
|
|
const struct sampler *sampler = &runner->r.samplers[i];
|
2022-01-26 17:40:28 -08:00
|
|
|
|
|
|
|
memset(sampler_desc, 0, sizeof(*sampler_desc));
|
|
|
|
sampler_desc->Filter = sampler->filter;
|
|
|
|
sampler_desc->AddressU = sampler->u_address;
|
|
|
|
sampler_desc->AddressV = sampler->v_address;
|
|
|
|
sampler_desc->AddressW = sampler->w_address;
|
2024-02-22 18:30:16 -08:00
|
|
|
sampler_desc->ComparisonFunc = sampler->func;
|
2023-04-30 17:23:00 -07:00
|
|
|
sampler_desc->MaxLOD = FLT_MAX;
|
2022-01-26 17:40:28 -08:00
|
|
|
sampler_desc->ShaderRegister = sampler->slot;
|
|
|
|
sampler_desc->RegisterSpace = 0;
|
|
|
|
sampler_desc->ShaderVisibility = D3D12_SHADER_VISIBILITY_ALL;
|
|
|
|
}
|
|
|
|
|
2021-08-13 14:37:31 -07:00
|
|
|
hr = create_root_signature(runner->test_context.device, &root_signature_desc, &root_signature);
|
|
|
|
ok(hr == S_OK, "Failed to create root signature, hr %#x.\n", hr);
|
|
|
|
return root_signature;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void add_pso(struct test_context *test_context, ID3D12PipelineState *pso)
|
|
|
|
{
|
|
|
|
vkd3d_array_reserve((void **)&test_context->pso, &test_context->pso_capacity,
|
|
|
|
test_context->pso_count + 1, sizeof(*test_context->pso));
|
|
|
|
test_context->pso[test_context->pso_count++] = pso;
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool d3d12_runner_dispatch(struct shader_runner *r, unsigned int x, unsigned int y, unsigned int z)
|
|
|
|
{
|
|
|
|
struct d3d12_shader_runner *runner = d3d12_shader_runner(r);
|
|
|
|
struct test_context *test_context = &runner->test_context;
|
|
|
|
|
|
|
|
ID3D12GraphicsCommandList *command_list = runner->compute_list;
|
|
|
|
ID3D12CommandAllocator *allocator = runner->compute_allocator;
|
|
|
|
ID3D12CommandQueue *queue = runner->compute_queue;
|
|
|
|
ID3D12Device *device = test_context->device;
|
|
|
|
ID3D12RootSignature *root_signature;
|
|
|
|
unsigned int uniform_index;
|
|
|
|
ID3D12PipelineState *pso;
|
|
|
|
D3D12_SHADER_BYTECODE cs;
|
|
|
|
ID3D10Blob *cs_code;
|
|
|
|
HRESULT hr;
|
|
|
|
size_t i;
|
|
|
|
|
2023-09-20 21:32:25 -07:00
|
|
|
cs_code = compile_shader(runner, runner->r.cs_source, SHADER_TYPE_CS);
|
2023-09-14 02:29:24 -07:00
|
|
|
todo_if(runner->r.is_todo && runner->r.minimum_shader_model < SHADER_MODEL_6_0) ok(cs_code, "Failed to compile shader.\n");
|
2021-08-13 14:37:31 -07:00
|
|
|
if (!cs_code)
|
|
|
|
return false;
|
|
|
|
|
|
|
|
root_signature = d3d12_runner_create_root_signature(runner, queue, allocator, command_list, &uniform_index);
|
|
|
|
|
|
|
|
cs.pShaderBytecode = ID3D10Blob_GetBufferPointer(cs_code);
|
|
|
|
cs.BytecodeLength = ID3D10Blob_GetBufferSize(cs_code);
|
2023-09-14 02:29:24 -07:00
|
|
|
todo_if(runner->r.is_todo)
|
2021-08-13 14:37:31 -07:00
|
|
|
pso = create_compute_pipeline_state(device, root_signature, cs);
|
|
|
|
ID3D10Blob_Release(cs_code);
|
2023-09-14 02:29:24 -07:00
|
|
|
|
|
|
|
if (!pso)
|
|
|
|
{
|
|
|
|
ID3D12RootSignature_Release(root_signature);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2021-08-13 14:37:31 -07:00
|
|
|
add_pso(test_context, pso);
|
|
|
|
|
|
|
|
ID3D12GraphicsCommandList_SetComputeRootSignature(command_list, root_signature);
|
|
|
|
if (runner->r.uniform_count)
|
|
|
|
ID3D12GraphicsCommandList_SetComputeRoot32BitConstants(command_list, uniform_index,
|
|
|
|
runner->r.uniform_count, runner->r.uniforms, 0);
|
|
|
|
for (i = 0; i < runner->r.resource_count; ++i)
|
|
|
|
{
|
|
|
|
struct d3d12_resource *resource = d3d12_resource(runner->r.resources[i]);
|
|
|
|
|
2024-06-17 14:01:04 -07:00
|
|
|
switch (resource->r.desc.type)
|
2021-08-13 14:37:31 -07:00
|
|
|
{
|
|
|
|
case RESOURCE_TYPE_TEXTURE:
|
2024-01-29 18:01:57 -08:00
|
|
|
if (resource->descriptor_range.NumDescriptors)
|
|
|
|
ID3D12GraphicsCommandList_SetComputeRootDescriptorTable(command_list, resource->root_index,
|
2024-06-17 14:01:04 -07:00
|
|
|
get_gpu_descriptor_handle(test_context, runner->heap, resource->r.desc.slot));
|
2021-08-13 14:37:31 -07:00
|
|
|
break;
|
|
|
|
|
|
|
|
case RESOURCE_TYPE_UAV:
|
2024-01-29 18:01:57 -08:00
|
|
|
if (resource->descriptor_range.NumDescriptors)
|
|
|
|
ID3D12GraphicsCommandList_SetComputeRootDescriptorTable(command_list, resource->root_index,
|
2024-06-17 14:01:04 -07:00
|
|
|
get_gpu_descriptor_handle(test_context, runner->heap, resource->r.desc.slot + MAX_RESOURCES));
|
2021-08-13 14:37:31 -07:00
|
|
|
break;
|
|
|
|
|
|
|
|
case RESOURCE_TYPE_RENDER_TARGET:
|
2024-04-14 17:33:15 -07:00
|
|
|
case RESOURCE_TYPE_DEPTH_STENCIL:
|
2021-08-13 14:37:31 -07:00
|
|
|
case RESOURCE_TYPE_VERTEX_BUFFER:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
ID3D12GraphicsCommandList_SetPipelineState(command_list, pso);
|
|
|
|
ID3D12GraphicsCommandList_Dispatch(command_list, x, y, z);
|
|
|
|
ID3D12RootSignature_Release(root_signature);
|
|
|
|
|
|
|
|
/* Finish the command list so that we can destroy objects.
|
|
|
|
* Also, subsequent UAV probes will use the graphics command list, so make
|
|
|
|
* sure that the above barriers are actually executed. */
|
|
|
|
hr = ID3D12GraphicsCommandList_Close(command_list);
|
|
|
|
ok(hr == S_OK, "Failed to close command list, hr %#x.\n", hr);
|
|
|
|
exec_command_list(queue, command_list);
|
|
|
|
wait_queue_idle(device, queue);
|
|
|
|
reset_command_list(command_list, allocator);
|
|
|
|
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2024-04-14 17:33:15 -07:00
|
|
|
static void d3d12_runner_clear(struct shader_runner *r, struct resource *resource, const struct vec4 *clear_value)
|
|
|
|
{
|
|
|
|
struct d3d12_shader_runner *runner = d3d12_shader_runner(r);
|
|
|
|
struct test_context *test_context = &runner->test_context;
|
|
|
|
|
|
|
|
ID3D12GraphicsCommandList *command_list = test_context->list;
|
|
|
|
ID3D12CommandQueue *queue = test_context->queue;
|
|
|
|
ID3D12Device *device = test_context->device;
|
|
|
|
D3D12_CPU_DESCRIPTOR_HANDLE view;
|
|
|
|
HRESULT hr;
|
|
|
|
|
2024-06-17 14:01:04 -07:00
|
|
|
switch (resource->desc.type)
|
2024-04-14 17:33:15 -07:00
|
|
|
{
|
2024-04-14 17:37:37 -07:00
|
|
|
case RESOURCE_TYPE_RENDER_TARGET:
|
2024-06-17 14:01:04 -07:00
|
|
|
view = get_cpu_rtv_handle(test_context, runner->rtv_heap, resource->desc.slot);
|
2024-04-14 17:37:37 -07:00
|
|
|
ID3D12GraphicsCommandList_ClearRenderTargetView(command_list, view, (const float *)clear_value, 0, NULL);
|
|
|
|
break;
|
|
|
|
|
2024-04-14 17:33:15 -07:00
|
|
|
case RESOURCE_TYPE_DEPTH_STENCIL:
|
|
|
|
view = get_cpu_dsv_handle(test_context, runner->dsv_heap, 0);
|
|
|
|
ID3D12GraphicsCommandList_ClearDepthStencilView(command_list, view,
|
|
|
|
D3D12_CLEAR_FLAG_DEPTH, clear_value->x, 0, 0, NULL);
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
2024-06-17 14:01:04 -07:00
|
|
|
fatal_error("Clears are not implemented for resource type %u.\n", resource->desc.type);
|
2024-04-14 17:33:15 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
hr = ID3D12GraphicsCommandList_Close(command_list);
|
|
|
|
ok(hr == S_OK, "Failed to close command list, hr %#x.\n", hr);
|
|
|
|
exec_command_list(queue, command_list);
|
|
|
|
wait_queue_idle(device, queue);
|
|
|
|
reset_command_list(command_list, test_context->allocator);
|
|
|
|
}
|
|
|
|
|
2024-04-18 19:33:56 -07:00
|
|
|
static D3D12_PRIMITIVE_TOPOLOGY_TYPE d3d12_primitive_topology_type_from_primitive_topology(
|
|
|
|
D3D_PRIMITIVE_TOPOLOGY primitive_topology)
|
|
|
|
{
|
|
|
|
switch (primitive_topology)
|
|
|
|
{
|
|
|
|
case D3D_PRIMITIVE_TOPOLOGY_POINTLIST:
|
|
|
|
return D3D12_PRIMITIVE_TOPOLOGY_TYPE_POINT;
|
|
|
|
case D3D_PRIMITIVE_TOPOLOGY_LINELIST:
|
|
|
|
case D3D_PRIMITIVE_TOPOLOGY_LINESTRIP:
|
|
|
|
case D3D_PRIMITIVE_TOPOLOGY_LINELIST_ADJ:
|
|
|
|
case D3D_PRIMITIVE_TOPOLOGY_LINESTRIP_ADJ:
|
|
|
|
return D3D12_PRIMITIVE_TOPOLOGY_TYPE_LINE;
|
|
|
|
case D3D_PRIMITIVE_TOPOLOGY_TRIANGLELIST:
|
|
|
|
case D3D_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP:
|
|
|
|
case D3D_PRIMITIVE_TOPOLOGY_TRIANGLELIST_ADJ:
|
|
|
|
case D3D_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP_ADJ:
|
|
|
|
return D3D12_PRIMITIVE_TOPOLOGY_TYPE_TRIANGLE;
|
|
|
|
default:
|
|
|
|
if (primitive_topology >= D3D_PRIMITIVE_TOPOLOGY_1_CONTROL_POINT_PATCHLIST
|
|
|
|
&& primitive_topology <= D3D_PRIMITIVE_TOPOLOGY_32_CONTROL_POINT_PATCHLIST)
|
|
|
|
return D3D12_PRIMITIVE_TOPOLOGY_TYPE_PATCH;
|
|
|
|
fatal_error("Unhandled primitive topology %u.\n", primitive_topology);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2024-08-31 08:57:38 -07:00
|
|
|
static D3D12_INPUT_ELEMENT_DESC *create_element_descs(const struct d3d12_shader_runner *runner)
|
|
|
|
{
|
|
|
|
D3D12_INPUT_ELEMENT_DESC *input_element_descs = calloc(runner->r.input_element_count, sizeof(*input_element_descs));
|
|
|
|
for (size_t i = 0; i < runner->r.input_element_count; ++i)
|
|
|
|
{
|
|
|
|
const struct input_element *element = &runner->r.input_elements[i];
|
|
|
|
D3D12_INPUT_ELEMENT_DESC *desc = &input_element_descs[i];
|
|
|
|
|
|
|
|
desc->SemanticName = element->name;
|
|
|
|
desc->SemanticIndex = element->index;
|
|
|
|
desc->Format = element->format;
|
|
|
|
desc->InputSlot = element->slot;
|
|
|
|
desc->AlignedByteOffset = D3D12_APPEND_ALIGNED_ELEMENT;
|
|
|
|
desc->InputSlotClass = D3D12_INPUT_CLASSIFICATION_PER_VERTEX_DATA;
|
|
|
|
}
|
|
|
|
|
|
|
|
return input_element_descs;
|
|
|
|
}
|
|
|
|
|
2024-08-30 18:17:17 -07:00
|
|
|
static ID3D12PipelineState *create_pipeline(struct d3d12_shader_runner *runner,
|
|
|
|
D3D12_PRIMITIVE_TOPOLOGY primitive_topology, ID3D10Blob *vs_code, ID3D10Blob *ps_code,
|
|
|
|
ID3D10Blob *hs_code, ID3D10Blob *ds_code, ID3D10Blob *gs_code)
|
2021-08-13 14:37:31 -07:00
|
|
|
{
|
|
|
|
struct test_context *test_context = &runner->test_context;
|
|
|
|
D3D12_GRAPHICS_PIPELINE_STATE_DESC pso_desc = {0};
|
|
|
|
D3D12_INPUT_ELEMENT_DESC *input_element_descs;
|
|
|
|
ID3D12Device *device = test_context->device;
|
2024-08-30 18:17:17 -07:00
|
|
|
unsigned int sample_count = 1;
|
2021-08-13 14:37:31 -07:00
|
|
|
ID3D12PipelineState *pso;
|
|
|
|
HRESULT hr;
|
|
|
|
|
2024-08-30 18:17:17 -07:00
|
|
|
for (size_t i = 0; i < runner->r.resource_count; ++i)
|
2021-08-13 14:37:31 -07:00
|
|
|
{
|
|
|
|
struct d3d12_resource *resource = d3d12_resource(runner->r.resources[i]);
|
|
|
|
|
2024-06-17 14:01:04 -07:00
|
|
|
if (resource->r.desc.type == RESOURCE_TYPE_RENDER_TARGET)
|
2021-08-13 14:37:31 -07:00
|
|
|
{
|
2024-06-17 14:01:04 -07:00
|
|
|
pso_desc.RTVFormats[resource->r.desc.slot] = resource->r.desc.format;
|
|
|
|
pso_desc.NumRenderTargets = max(pso_desc.NumRenderTargets, resource->r.desc.slot + 1);
|
|
|
|
pso_desc.BlendState.RenderTarget[resource->r.desc.slot].RenderTargetWriteMask = D3D12_COLOR_WRITE_ENABLE_ALL;
|
|
|
|
if (resource->r.desc.sample_count)
|
|
|
|
sample_count = resource->r.desc.sample_count;
|
2021-08-13 14:37:31 -07:00
|
|
|
}
|
2024-06-17 14:01:04 -07:00
|
|
|
else if (resource->r.desc.type == RESOURCE_TYPE_DEPTH_STENCIL)
|
2024-04-14 17:33:15 -07:00
|
|
|
{
|
2024-06-17 14:01:04 -07:00
|
|
|
assert(!resource->r.desc.slot);
|
|
|
|
pso_desc.DSVFormat = resource->r.desc.format;
|
2024-04-14 17:33:15 -07:00
|
|
|
pso_desc.DepthStencilState.DepthEnable = true;
|
|
|
|
pso_desc.DepthStencilState.DepthWriteMask = D3D12_DEPTH_WRITE_MASK_ALL;
|
|
|
|
pso_desc.DepthStencilState.DepthFunc = runner->r.depth_func;
|
|
|
|
}
|
2021-08-13 14:37:31 -07:00
|
|
|
}
|
2022-01-26 17:40:28 -08:00
|
|
|
|
2021-08-13 14:37:31 -07:00
|
|
|
pso_desc.VS.pShaderBytecode = ID3D10Blob_GetBufferPointer(vs_code);
|
|
|
|
pso_desc.VS.BytecodeLength = ID3D10Blob_GetBufferSize(vs_code);
|
|
|
|
pso_desc.PS.pShaderBytecode = ID3D10Blob_GetBufferPointer(ps_code);
|
|
|
|
pso_desc.PS.BytecodeLength = ID3D10Blob_GetBufferSize(ps_code);
|
2024-04-07 21:37:32 -07:00
|
|
|
if (hs_code)
|
|
|
|
{
|
|
|
|
pso_desc.HS.pShaderBytecode = ID3D10Blob_GetBufferPointer(hs_code);
|
|
|
|
pso_desc.HS.BytecodeLength = ID3D10Blob_GetBufferSize(hs_code);
|
2024-08-30 18:17:17 -07:00
|
|
|
}
|
|
|
|
if (ds_code)
|
|
|
|
{
|
2024-04-07 21:37:32 -07:00
|
|
|
pso_desc.DS.pShaderBytecode = ID3D10Blob_GetBufferPointer(ds_code);
|
|
|
|
pso_desc.DS.BytecodeLength = ID3D10Blob_GetBufferSize(ds_code);
|
|
|
|
}
|
2024-04-18 19:33:56 -07:00
|
|
|
if (gs_code)
|
2024-04-07 21:37:32 -07:00
|
|
|
{
|
2024-04-18 19:33:56 -07:00
|
|
|
pso_desc.GS.pShaderBytecode = ID3D10Blob_GetBufferPointer(gs_code);
|
|
|
|
pso_desc.GS.BytecodeLength = ID3D10Blob_GetBufferSize(gs_code);
|
2024-04-07 21:37:32 -07:00
|
|
|
}
|
2024-04-18 19:33:56 -07:00
|
|
|
pso_desc.PrimitiveTopologyType = d3d12_primitive_topology_type_from_primitive_topology(primitive_topology);
|
2021-08-13 14:37:31 -07:00
|
|
|
pso_desc.RasterizerState.FillMode = D3D12_FILL_MODE_SOLID;
|
2023-04-10 11:45:15 -07:00
|
|
|
pso_desc.RasterizerState.CullMode = D3D12_CULL_MODE_NONE;
|
2024-04-09 20:51:06 -07:00
|
|
|
pso_desc.SampleDesc.Count = sample_count;
|
2024-08-30 18:17:17 -07:00
|
|
|
pso_desc.SampleMask = runner->r.sample_mask ? runner->r.sample_mask : ~(UINT)0;
|
2022-06-08 16:18:37 -07:00
|
|
|
pso_desc.pRootSignature = test_context->root_signature;
|
|
|
|
|
2024-08-31 08:57:38 -07:00
|
|
|
input_element_descs = create_element_descs(runner);
|
2022-06-08 16:18:37 -07:00
|
|
|
pso_desc.InputLayout.pInputElementDescs = input_element_descs;
|
|
|
|
pso_desc.InputLayout.NumElements = runner->r.input_element_count;
|
2022-03-21 18:42:16 -07:00
|
|
|
|
2022-06-08 16:18:37 -07:00
|
|
|
hr = ID3D12Device_CreateGraphicsPipelineState(device, &pso_desc,
|
|
|
|
&IID_ID3D12PipelineState, (void **)&pso);
|
2023-09-14 02:29:24 -07:00
|
|
|
todo_if(runner->r.is_todo) ok(hr == S_OK, "Failed to create state, hr %#x.\n", hr);
|
2024-08-30 18:17:17 -07:00
|
|
|
|
|
|
|
free(input_element_descs);
|
|
|
|
|
|
|
|
if (FAILED(hr))
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
return pso;
|
|
|
|
}
|
|
|
|
|
2024-08-31 08:57:38 -07:00
|
|
|
static ID3D12PipelineState *create_pipeline_device2(struct d3d12_shader_runner *runner,
|
|
|
|
D3D12_PRIMITIVE_TOPOLOGY primitive_topology, ID3D10Blob *vs_code, ID3D10Blob *ps_code,
|
|
|
|
ID3D10Blob *hs_code, ID3D10Blob *ds_code, ID3D10Blob *gs_code)
|
|
|
|
{
|
|
|
|
struct test_context *test_context = &runner->test_context;
|
|
|
|
ID3D12Device2 *device2 = test_context->device2;
|
|
|
|
D3D12_PIPELINE_STATE_STREAM_DESC pipeline_desc;
|
|
|
|
D3D12_INPUT_ELEMENT_DESC *input_element_descs;
|
|
|
|
unsigned int sample_count = 1;
|
|
|
|
ID3D12PipelineState *pso;
|
|
|
|
HRESULT hr;
|
|
|
|
|
|
|
|
struct
|
|
|
|
{
|
|
|
|
struct d3d12_root_signature_subobject root_signature;
|
|
|
|
struct d3d12_shader_bytecode_subobject vs;
|
|
|
|
struct d3d12_shader_bytecode_subobject ps;
|
|
|
|
struct d3d12_shader_bytecode_subobject hs;
|
|
|
|
struct d3d12_shader_bytecode_subobject ds;
|
|
|
|
struct d3d12_shader_bytecode_subobject gs;
|
|
|
|
struct d3d12_render_target_formats_subobject rtv_format;
|
|
|
|
struct d3d12_blend_subobject blend;
|
|
|
|
struct d3d12_depth_stencil_format_subobject dsv_format;
|
|
|
|
struct d3d12_depth_stencil1_subobject dsv;
|
|
|
|
struct d3d12_rasterizer_subobject rasterizer;
|
|
|
|
struct d3d12_primitive_topology_subobject topology;
|
|
|
|
struct d3d12_sample_desc_subobject sample_desc;
|
|
|
|
struct d3d12_sample_mask_subobject sample_mask;
|
|
|
|
struct d3d12_input_layout_subobject input_layout;
|
|
|
|
}
|
|
|
|
pipeline =
|
|
|
|
{
|
|
|
|
.root_signature =
|
|
|
|
{
|
|
|
|
.type = D3D12_PIPELINE_STATE_SUBOBJECT_TYPE_ROOT_SIGNATURE,
|
|
|
|
.root_signature = test_context->root_signature,
|
|
|
|
},
|
|
|
|
.vs =
|
|
|
|
{
|
|
|
|
.type = D3D12_PIPELINE_STATE_SUBOBJECT_TYPE_VS,
|
|
|
|
.shader_bytecode = shader_bytecode_from_blob(vs_code),
|
|
|
|
},
|
|
|
|
.ps =
|
|
|
|
{
|
|
|
|
.type = D3D12_PIPELINE_STATE_SUBOBJECT_TYPE_PS,
|
|
|
|
.shader_bytecode = shader_bytecode_from_blob(ps_code),
|
|
|
|
},
|
|
|
|
.hs =
|
|
|
|
{
|
|
|
|
.type = D3D12_PIPELINE_STATE_SUBOBJECT_TYPE_HS,
|
|
|
|
.shader_bytecode = hs_code ? shader_bytecode_from_blob(hs_code) : (D3D12_SHADER_BYTECODE) {0},
|
|
|
|
},
|
|
|
|
.ds =
|
|
|
|
{
|
|
|
|
.type = D3D12_PIPELINE_STATE_SUBOBJECT_TYPE_DS,
|
|
|
|
.shader_bytecode = ds_code ? shader_bytecode_from_blob(ds_code) : (D3D12_SHADER_BYTECODE) {0},
|
|
|
|
},
|
|
|
|
.gs =
|
|
|
|
{
|
|
|
|
.type = D3D12_PIPELINE_STATE_SUBOBJECT_TYPE_GS,
|
|
|
|
.shader_bytecode = gs_code ? shader_bytecode_from_blob(gs_code) : (D3D12_SHADER_BYTECODE) {0},
|
|
|
|
},
|
|
|
|
.rtv_format =
|
|
|
|
{
|
|
|
|
.type = D3D12_PIPELINE_STATE_SUBOBJECT_TYPE_RENDER_TARGET_FORMATS,
|
|
|
|
},
|
|
|
|
.blend =
|
|
|
|
{
|
|
|
|
.type = D3D12_PIPELINE_STATE_SUBOBJECT_TYPE_BLEND,
|
|
|
|
},
|
|
|
|
.dsv_format =
|
|
|
|
{
|
|
|
|
.type = D3D12_PIPELINE_STATE_SUBOBJECT_TYPE_DEPTH_STENCIL_FORMAT,
|
|
|
|
},
|
|
|
|
.dsv =
|
|
|
|
{
|
|
|
|
.type = D3D12_PIPELINE_STATE_SUBOBJECT_TYPE_DEPTH_STENCIL1,
|
|
|
|
},
|
|
|
|
.rasterizer =
|
|
|
|
{
|
|
|
|
.type = D3D12_PIPELINE_STATE_SUBOBJECT_TYPE_RASTERIZER,
|
|
|
|
.rasterizer_desc =
|
|
|
|
{
|
|
|
|
.FillMode = D3D12_FILL_MODE_SOLID,
|
|
|
|
.CullMode = D3D12_CULL_MODE_NONE,
|
|
|
|
}
|
|
|
|
},
|
|
|
|
.topology =
|
|
|
|
{
|
|
|
|
.type = D3D12_PIPELINE_STATE_SUBOBJECT_TYPE_PRIMITIVE_TOPOLOGY,
|
|
|
|
.primitive_topology_type = d3d12_primitive_topology_type_from_primitive_topology(primitive_topology),
|
|
|
|
},
|
|
|
|
.sample_desc =
|
|
|
|
{
|
|
|
|
.type = D3D12_PIPELINE_STATE_SUBOBJECT_TYPE_SAMPLE_DESC,
|
|
|
|
},
|
|
|
|
.sample_mask =
|
|
|
|
{
|
|
|
|
.type = D3D12_PIPELINE_STATE_SUBOBJECT_TYPE_SAMPLE_MASK,
|
|
|
|
.sample_mask = runner->r.sample_mask ? runner->r.sample_mask : ~(UINT)0,
|
|
|
|
},
|
|
|
|
.input_layout =
|
|
|
|
{
|
|
|
|
.type = D3D12_PIPELINE_STATE_SUBOBJECT_TYPE_INPUT_LAYOUT,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
if (!device2)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
input_element_descs = create_element_descs(runner);
|
|
|
|
pipeline.input_layout.input_layout.NumElements = runner->r.input_element_count;
|
|
|
|
pipeline.input_layout.input_layout.pInputElementDescs = input_element_descs;
|
|
|
|
|
|
|
|
for (size_t i = 0; i < runner->r.resource_count; ++i)
|
|
|
|
{
|
|
|
|
struct d3d12_resource *resource = d3d12_resource(runner->r.resources[i]);
|
|
|
|
|
|
|
|
if (resource->r.desc.type == RESOURCE_TYPE_RENDER_TARGET)
|
|
|
|
{
|
|
|
|
pipeline.rtv_format.render_target_formats.RTFormats[resource->r.desc.slot] = resource->r.desc.format;
|
|
|
|
pipeline.rtv_format.render_target_formats.NumRenderTargets =
|
|
|
|
max(pipeline.rtv_format.render_target_formats.NumRenderTargets, resource->r.desc.slot + 1);
|
|
|
|
pipeline.blend.blend_desc.RenderTarget[resource->r.desc.slot].RenderTargetWriteMask =
|
|
|
|
D3D12_COLOR_WRITE_ENABLE_ALL;
|
|
|
|
if (resource->r.desc.sample_count)
|
|
|
|
sample_count = resource->r.desc.sample_count;
|
|
|
|
}
|
|
|
|
else if (resource->r.desc.type == RESOURCE_TYPE_DEPTH_STENCIL)
|
|
|
|
{
|
|
|
|
assert(!resource->r.desc.slot);
|
|
|
|
pipeline.dsv_format.depth_stencil_format = resource->r.desc.format;
|
|
|
|
pipeline.dsv.depth_stencil_desc.DepthEnable = true;
|
|
|
|
pipeline.dsv.depth_stencil_desc.DepthWriteMask = D3D12_DEPTH_WRITE_MASK_ALL;
|
|
|
|
pipeline.dsv.depth_stencil_desc.DepthFunc = runner->r.depth_func;
|
2024-08-31 09:54:44 -07:00
|
|
|
pipeline.dsv.depth_stencil_desc.DepthBoundsTestEnable = runner->r.depth_bounds;
|
2024-08-31 08:57:38 -07:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
pipeline.sample_desc.sample_desc.Count = sample_count;
|
|
|
|
|
|
|
|
pipeline_desc.SizeInBytes = sizeof(pipeline);
|
|
|
|
pipeline_desc.pPipelineStateSubobjectStream = &pipeline;
|
|
|
|
|
|
|
|
hr = ID3D12Device2_CreatePipelineState(device2, &pipeline_desc, &IID_ID3D12PipelineState, (void **)&pso);
|
|
|
|
todo_if(runner->r.is_todo) ok(hr == S_OK, "Failed to create state, hr %#x.\n", hr);
|
|
|
|
|
|
|
|
free(input_element_descs);
|
|
|
|
|
|
|
|
if (FAILED(hr))
|
|
|
|
return NULL;
|
|
|
|
return pso;
|
|
|
|
}
|
|
|
|
|
2024-08-30 18:17:17 -07:00
|
|
|
static bool d3d12_runner_draw(struct shader_runner *r,
|
|
|
|
D3D_PRIMITIVE_TOPOLOGY primitive_topology, unsigned int vertex_count, unsigned int instance_count)
|
|
|
|
{
|
|
|
|
struct d3d12_shader_runner *runner = d3d12_shader_runner(r);
|
|
|
|
struct test_context *test_context = &runner->test_context;
|
|
|
|
|
|
|
|
ID3D10Blob *vs_code, *ps_code, *hs_code = NULL, *ds_code = NULL, *gs_code = NULL;
|
|
|
|
D3D12_CPU_DESCRIPTOR_HANDLE rtvs[D3D12_SIMULTANEOUS_RENDER_TARGET_COUNT] = {0};
|
2024-08-31 09:54:44 -07:00
|
|
|
ID3D12GraphicsCommandList1 *command_list1 = test_context->list1;
|
2024-08-30 18:17:17 -07:00
|
|
|
ID3D12GraphicsCommandList *command_list = test_context->list;
|
|
|
|
ID3D12CommandQueue *queue = test_context->queue;
|
|
|
|
ID3D12Device *device = test_context->device;
|
|
|
|
unsigned int uniform_index, rtv_count = 0;
|
|
|
|
D3D12_CPU_DESCRIPTOR_HANDLE dsv = {0};
|
|
|
|
ID3D12PipelineState *pso;
|
|
|
|
bool succeeded;
|
|
|
|
HRESULT hr;
|
|
|
|
size_t i;
|
|
|
|
|
|
|
|
ps_code = compile_shader(runner, runner->r.ps_source, SHADER_TYPE_PS);
|
|
|
|
vs_code = compile_shader(runner, runner->r.vs_source, SHADER_TYPE_VS);
|
|
|
|
succeeded = ps_code && vs_code;
|
|
|
|
|
|
|
|
if (runner->r.hs_source)
|
|
|
|
{
|
|
|
|
hs_code = compile_shader(runner, runner->r.hs_source, SHADER_TYPE_HS);
|
|
|
|
succeeded = succeeded && hs_code;
|
|
|
|
}
|
|
|
|
if (runner->r.ds_source)
|
|
|
|
{
|
|
|
|
ds_code = compile_shader(runner, runner->r.ds_source, SHADER_TYPE_DS);
|
|
|
|
succeeded = succeeded && ds_code;
|
|
|
|
}
|
|
|
|
if (runner->r.gs_source)
|
|
|
|
{
|
|
|
|
gs_code = compile_shader(runner, runner->r.gs_source, SHADER_TYPE_GS);
|
|
|
|
succeeded = succeeded && gs_code;
|
|
|
|
}
|
|
|
|
|
|
|
|
todo_if(runner->r.is_todo && runner->r.minimum_shader_model < SHADER_MODEL_6_0)
|
|
|
|
ok(succeeded, "Failed to compile shaders.\n");
|
|
|
|
|
|
|
|
if (!succeeded)
|
|
|
|
{
|
|
|
|
if (ps_code)
|
|
|
|
ID3D10Blob_Release(ps_code);
|
|
|
|
if (vs_code)
|
|
|
|
ID3D10Blob_Release(vs_code);
|
|
|
|
if (hs_code)
|
|
|
|
ID3D10Blob_Release(hs_code);
|
|
|
|
if (ds_code)
|
|
|
|
ID3D10Blob_Release(ds_code);
|
|
|
|
if (gs_code)
|
|
|
|
ID3D10Blob_Release(gs_code);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (test_context->root_signature)
|
|
|
|
ID3D12RootSignature_Release(test_context->root_signature);
|
|
|
|
test_context->root_signature = d3d12_runner_create_root_signature(runner,
|
|
|
|
queue, test_context->allocator, command_list, &uniform_index);
|
|
|
|
|
2024-08-31 08:57:38 -07:00
|
|
|
pso = test_context->device2
|
|
|
|
? create_pipeline_device2(runner, primitive_topology, vs_code, ps_code, hs_code, ds_code, gs_code)
|
|
|
|
: create_pipeline(runner, primitive_topology, vs_code, ps_code, hs_code, ds_code, gs_code);
|
2024-08-30 18:17:17 -07:00
|
|
|
|
2022-03-21 18:42:15 -07:00
|
|
|
ID3D10Blob_Release(vs_code);
|
2022-01-26 17:40:31 -08:00
|
|
|
ID3D10Blob_Release(ps_code);
|
2024-04-07 21:37:32 -07:00
|
|
|
if (hs_code)
|
|
|
|
ID3D10Blob_Release(hs_code);
|
|
|
|
if (ds_code)
|
|
|
|
ID3D10Blob_Release(ds_code);
|
2024-04-18 19:33:56 -07:00
|
|
|
if (gs_code)
|
|
|
|
ID3D10Blob_Release(gs_code);
|
2023-09-14 02:29:24 -07:00
|
|
|
|
2024-08-30 18:17:17 -07:00
|
|
|
if (!pso)
|
2023-09-14 02:29:24 -07:00
|
|
|
return false;
|
|
|
|
|
2021-08-13 14:37:31 -07:00
|
|
|
add_pso(test_context, pso);
|
2022-01-26 17:40:28 -08:00
|
|
|
|
|
|
|
ID3D12GraphicsCommandList_SetGraphicsRootSignature(command_list, test_context->root_signature);
|
2022-03-19 10:35:32 -07:00
|
|
|
if (runner->r.uniform_count)
|
2022-01-26 17:40:28 -08:00
|
|
|
ID3D12GraphicsCommandList_SetGraphicsRoot32BitConstants(command_list, uniform_index,
|
2022-03-19 10:35:32 -07:00
|
|
|
runner->r.uniform_count, runner->r.uniforms, 0);
|
2023-05-18 03:46:33 -07:00
|
|
|
if (runner->heap)
|
|
|
|
ID3D12GraphicsCommandList_SetDescriptorHeaps(command_list, 1, &runner->heap);
|
2022-03-21 18:42:17 -07:00
|
|
|
for (i = 0; i < runner->r.resource_count; ++i)
|
2022-01-26 17:40:28 -08:00
|
|
|
{
|
2022-03-21 18:42:17 -07:00
|
|
|
struct d3d12_resource *resource = d3d12_resource(runner->r.resources[i]);
|
2022-03-21 18:42:18 -07:00
|
|
|
D3D12_VERTEX_BUFFER_VIEW vbv;
|
2022-03-21 18:42:17 -07:00
|
|
|
|
2024-06-17 14:01:04 -07:00
|
|
|
switch (resource->r.desc.type)
|
2022-03-21 18:42:17 -07:00
|
|
|
{
|
2022-06-08 16:18:37 -07:00
|
|
|
case RESOURCE_TYPE_RENDER_TARGET:
|
2024-06-17 14:01:04 -07:00
|
|
|
rtvs[resource->r.desc.slot] = get_cpu_rtv_handle(test_context, runner->rtv_heap, resource->r.desc.slot);
|
|
|
|
rtv_count = max(rtv_count, resource->r.desc.slot + 1);
|
2022-06-08 16:18:37 -07:00
|
|
|
break;
|
|
|
|
|
2024-04-14 17:33:15 -07:00
|
|
|
case RESOURCE_TYPE_DEPTH_STENCIL:
|
|
|
|
dsv = get_cpu_dsv_handle(test_context, runner->dsv_heap, 0);
|
|
|
|
break;
|
|
|
|
|
2022-03-21 18:42:17 -07:00
|
|
|
case RESOURCE_TYPE_TEXTURE:
|
2024-01-29 18:01:57 -08:00
|
|
|
if (resource->descriptor_range.NumDescriptors)
|
|
|
|
ID3D12GraphicsCommandList_SetGraphicsRootDescriptorTable(command_list, resource->root_index,
|
2024-06-17 14:01:04 -07:00
|
|
|
get_gpu_descriptor_handle(test_context, runner->heap, resource->r.desc.slot));
|
2022-03-21 18:42:17 -07:00
|
|
|
break;
|
2022-03-21 18:42:18 -07:00
|
|
|
|
2022-06-08 16:18:35 -07:00
|
|
|
case RESOURCE_TYPE_UAV:
|
2024-01-29 18:01:57 -08:00
|
|
|
if (resource->descriptor_range.NumDescriptors)
|
|
|
|
ID3D12GraphicsCommandList_SetGraphicsRootDescriptorTable(command_list, resource->root_index,
|
2024-06-17 14:01:04 -07:00
|
|
|
get_gpu_descriptor_handle(test_context, runner->heap, resource->r.desc.slot + MAX_RESOURCES));
|
2022-06-08 16:18:35 -07:00
|
|
|
break;
|
|
|
|
|
2022-03-21 18:42:18 -07:00
|
|
|
case RESOURCE_TYPE_VERTEX_BUFFER:
|
|
|
|
vbv.BufferLocation = ID3D12Resource_GetGPUVirtualAddress(resource->resource);
|
2024-06-17 14:01:04 -07:00
|
|
|
vbv.StrideInBytes = get_vb_stride(&runner->r, resource->r.desc.slot);
|
|
|
|
vbv.SizeInBytes = resource->r.desc.width;
|
2022-03-21 18:42:18 -07:00
|
|
|
|
2024-06-17 14:01:04 -07:00
|
|
|
ID3D12GraphicsCommandList_IASetVertexBuffers(command_list, resource->r.desc.slot, 1, &vbv);
|
2022-03-21 18:42:18 -07:00
|
|
|
break;
|
2022-03-21 18:42:17 -07:00
|
|
|
}
|
2022-01-26 17:40:28 -08:00
|
|
|
}
|
|
|
|
|
2024-04-14 17:33:15 -07:00
|
|
|
ID3D12GraphicsCommandList_OMSetRenderTargets(command_list, rtv_count, rtvs, false, dsv.ptr ? &dsv : NULL);
|
2022-06-08 16:18:37 -07:00
|
|
|
|
2024-08-31 09:54:44 -07:00
|
|
|
if (runner->r.depth_bounds)
|
|
|
|
ID3D12GraphicsCommandList1_OMSetDepthBounds(command_list1, runner->r.depth_min, runner->r.depth_max);
|
2022-01-26 17:40:28 -08:00
|
|
|
ID3D12GraphicsCommandList_RSSetScissorRects(command_list, 1, &test_context->scissor_rect);
|
|
|
|
ID3D12GraphicsCommandList_RSSetViewports(command_list, 1, &test_context->viewport);
|
2022-03-21 18:42:20 -07:00
|
|
|
ID3D12GraphicsCommandList_IASetPrimitiveTopology(command_list, primitive_topology);
|
2022-01-26 17:40:28 -08:00
|
|
|
ID3D12GraphicsCommandList_SetPipelineState(command_list, pso);
|
2024-04-21 19:55:44 -07:00
|
|
|
ID3D12GraphicsCommandList_DrawInstanced(command_list, vertex_count, instance_count, 0, 0);
|
2022-01-26 17:40:28 -08:00
|
|
|
|
|
|
|
/* Finish the command list so that we can destroy objects. */
|
|
|
|
hr = ID3D12GraphicsCommandList_Close(command_list);
|
|
|
|
ok(hr == S_OK, "Failed to close command list, hr %#x.\n", hr);
|
|
|
|
exec_command_list(queue, command_list);
|
|
|
|
wait_queue_idle(device, queue);
|
|
|
|
reset_command_list(command_list, test_context->allocator);
|
2022-04-14 03:52:32 -07:00
|
|
|
|
|
|
|
return true;
|
2022-01-26 17:40:28 -08:00
|
|
|
}
|
|
|
|
|
2022-06-08 16:18:37 -07:00
|
|
|
static struct resource_readback *d3d12_runner_get_resource_readback(struct shader_runner *r, struct resource *res)
|
2022-01-26 17:40:28 -08:00
|
|
|
{
|
2022-03-19 10:35:32 -07:00
|
|
|
struct d3d12_shader_runner *runner = d3d12_shader_runner(r);
|
|
|
|
struct test_context *test_context = &runner->test_context;
|
2022-05-17 06:45:41 -07:00
|
|
|
struct d3d12_resource_readback *rb = malloc(sizeof(*rb));
|
2022-06-08 16:18:37 -07:00
|
|
|
struct d3d12_resource *resource = d3d12_resource(res);
|
2022-06-08 16:18:38 -07:00
|
|
|
D3D12_RESOURCE_STATES state;
|
2022-01-26 17:40:28 -08:00
|
|
|
|
2024-06-17 14:01:04 -07:00
|
|
|
if (resource->r.desc.type == RESOURCE_TYPE_RENDER_TARGET)
|
2022-06-08 16:18:38 -07:00
|
|
|
state = D3D12_RESOURCE_STATE_RENDER_TARGET;
|
2024-06-17 14:01:04 -07:00
|
|
|
else if (resource->r.desc.type == RESOURCE_TYPE_DEPTH_STENCIL)
|
2024-04-14 17:33:15 -07:00
|
|
|
state = D3D12_RESOURCE_STATE_DEPTH_WRITE;
|
2022-06-08 16:18:38 -07:00
|
|
|
else
|
|
|
|
state = D3D12_RESOURCE_STATE_UNORDERED_ACCESS;
|
2022-06-08 16:18:37 -07:00
|
|
|
|
2023-10-23 12:53:51 -07:00
|
|
|
get_resource_readback_with_command_list_and_states(resource->resource, 0, rb,
|
|
|
|
test_context->queue, test_context->list, state, state);
|
2022-06-08 16:18:37 -07:00
|
|
|
reset_command_list(test_context->list, test_context->allocator);
|
2022-05-17 06:45:41 -07:00
|
|
|
|
|
|
|
return &rb->rb;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void d3d12_runner_release_readback(struct shader_runner *r, struct resource_readback *rb)
|
|
|
|
{
|
|
|
|
struct d3d12_resource_readback *d3d12_rb = CONTAINING_RECORD(rb, struct d3d12_resource_readback, rb);
|
|
|
|
|
|
|
|
release_resource_readback(d3d12_rb);
|
|
|
|
free(d3d12_rb);
|
2022-01-26 17:40:28 -08:00
|
|
|
}
|
|
|
|
|
2022-01-26 17:40:27 -08:00
|
|
|
static const struct shader_runner_ops d3d12_runner_ops =
|
|
|
|
{
|
2022-03-21 18:42:17 -07:00
|
|
|
.create_resource = d3d12_runner_create_resource,
|
|
|
|
.destroy_resource = d3d12_runner_destroy_resource,
|
2021-08-13 14:37:31 -07:00
|
|
|
.dispatch = d3d12_runner_dispatch,
|
2024-04-14 17:33:15 -07:00
|
|
|
.clear = d3d12_runner_clear,
|
2022-03-21 18:42:19 -07:00
|
|
|
.draw = d3d12_runner_draw,
|
2022-06-08 16:18:37 -07:00
|
|
|
.get_resource_readback = d3d12_runner_get_resource_readback,
|
2022-05-17 06:45:41 -07:00
|
|
|
.release_readback = d3d12_runner_release_readback,
|
2022-01-26 17:40:27 -08:00
|
|
|
};
|
|
|
|
|
2024-08-01 16:13:31 -07:00
|
|
|
static uint32_t get_format_support(ID3D12Device *device, enum DXGI_FORMAT format)
|
|
|
|
{
|
|
|
|
D3D12_FEATURE_DATA_FORMAT_SUPPORT format_support = {.Format = format};
|
|
|
|
uint32_t ret = 0;
|
|
|
|
HRESULT hr;
|
|
|
|
|
|
|
|
hr = ID3D12Device_CheckFeatureSupport(device, D3D12_FEATURE_FORMAT_SUPPORT,
|
|
|
|
&format_support, sizeof(format_support));
|
|
|
|
ok(hr == S_OK, "Failed to query format support, hr %#x.\n", hr);
|
|
|
|
|
|
|
|
if (format_support.Support2 & D3D12_FORMAT_SUPPORT2_UAV_TYPED_LOAD)
|
|
|
|
ret |= FORMAT_CAP_UAV_LOAD;
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2024-06-04 21:13:24 -07:00
|
|
|
static void d3d12_runner_init_caps(struct d3d12_shader_runner *runner,
|
|
|
|
enum shader_model minimum_shader_model, enum shader_model maximum_shader_model)
|
2024-02-19 07:47:11 -08:00
|
|
|
{
|
|
|
|
ID3D12Device *device = runner->test_context.device;
|
2024-08-31 09:54:44 -07:00
|
|
|
D3D12_FEATURE_DATA_D3D12_OPTIONS2 options2;
|
2024-02-19 07:47:11 -08:00
|
|
|
D3D12_FEATURE_DATA_D3D12_OPTIONS1 options1;
|
|
|
|
D3D12_FEATURE_DATA_D3D12_OPTIONS options;
|
|
|
|
HRESULT hr;
|
|
|
|
|
2024-09-02 14:35:17 -07:00
|
|
|
static const char *const tags[] =
|
|
|
|
{
|
|
|
|
"d3d12",
|
|
|
|
};
|
|
|
|
|
2024-08-01 16:13:31 -07:00
|
|
|
static const enum DXGI_FORMAT formats[] =
|
|
|
|
{
|
|
|
|
DXGI_FORMAT_R32_FLOAT,
|
|
|
|
DXGI_FORMAT_R32_UINT,
|
|
|
|
DXGI_FORMAT_R32_SINT,
|
|
|
|
DXGI_FORMAT_R32G32B32A32_FLOAT,
|
|
|
|
DXGI_FORMAT_R32G32B32A32_UINT,
|
|
|
|
DXGI_FORMAT_R32G32B32A32_SINT,
|
|
|
|
DXGI_FORMAT_R16G16B16A16_FLOAT,
|
|
|
|
DXGI_FORMAT_R16G16B16A16_UINT,
|
|
|
|
DXGI_FORMAT_R16G16B16A16_SINT,
|
|
|
|
DXGI_FORMAT_R8G8B8A8_UNORM,
|
|
|
|
DXGI_FORMAT_R8G8B8A8_UINT,
|
|
|
|
DXGI_FORMAT_R8G8B8A8_SINT,
|
|
|
|
DXGI_FORMAT_R16_FLOAT,
|
|
|
|
DXGI_FORMAT_R16_UINT,
|
|
|
|
DXGI_FORMAT_R16_SINT,
|
|
|
|
DXGI_FORMAT_R8_UNORM,
|
|
|
|
DXGI_FORMAT_R8_UINT,
|
|
|
|
DXGI_FORMAT_R8_SINT,
|
|
|
|
};
|
|
|
|
|
2024-02-19 07:47:11 -08:00
|
|
|
hr = ID3D12Device_CheckFeatureSupport(device, D3D12_FEATURE_D3D12_OPTIONS, &options, sizeof(options));
|
|
|
|
ok(hr == S_OK, "Failed to check feature options support, hr %#x.\n", hr);
|
|
|
|
hr = ID3D12Device_CheckFeatureSupport(device, D3D12_FEATURE_D3D12_OPTIONS1, &options1, sizeof(options1));
|
|
|
|
ok(hr == S_OK, "Failed to check feature options1 support, hr %#x.\n", hr);
|
2024-08-31 09:54:44 -07:00
|
|
|
hr = ID3D12Device_CheckFeatureSupport(device, D3D12_FEATURE_D3D12_OPTIONS2, &options2, sizeof(options2));
|
|
|
|
ok(hr == S_OK, "Failed to check feature options2 support, hr %#x.\n", hr);
|
2024-02-19 07:47:11 -08:00
|
|
|
|
2024-02-19 08:01:00 -08:00
|
|
|
#ifdef VKD3D_CROSSTEST
|
|
|
|
runner->caps.runner = "d3d12.dll";
|
|
|
|
#else
|
|
|
|
runner->caps.runner = "vkd3d";
|
|
|
|
#endif
|
2024-06-04 21:13:24 -07:00
|
|
|
runner->caps.minimum_shader_model = minimum_shader_model;
|
|
|
|
runner->caps.maximum_shader_model = maximum_shader_model;
|
2024-02-19 07:47:11 -08:00
|
|
|
runner->caps.float64 = options.DoublePrecisionFloatShaderOps;
|
|
|
|
runner->caps.int64 = options1.Int64ShaderOps;
|
|
|
|
runner->caps.rov = options.ROVsSupported;
|
2024-04-23 18:29:17 -07:00
|
|
|
runner->caps.wave_ops = options1.WaveOps;
|
2024-08-31 09:54:44 -07:00
|
|
|
runner->caps.depth_bounds = options2.DepthBoundsTestSupported;
|
2024-09-02 14:35:17 -07:00
|
|
|
runner->caps.tags = tags;
|
|
|
|
runner->caps.tag_count = ARRAY_SIZE(tags);
|
2024-08-01 16:13:31 -07:00
|
|
|
|
|
|
|
for (unsigned int i = 0; i < ARRAY_SIZE(formats); ++i)
|
|
|
|
{
|
|
|
|
runner->caps.format_caps[formats[i]] = get_format_support(device, formats[i]);
|
|
|
|
}
|
2024-02-19 07:47:11 -08:00
|
|
|
}
|
|
|
|
|
2024-04-23 17:51:11 -07:00
|
|
|
static bool device_supports_shader_model_6_0(ID3D12Device *device)
|
|
|
|
{
|
|
|
|
D3D12_FEATURE_DATA_SHADER_MODEL sm = {D3D_SHADER_MODEL_6_0};
|
|
|
|
HRESULT hr;
|
|
|
|
|
|
|
|
hr = ID3D12Device_CheckFeatureSupport(device, D3D12_FEATURE_SHADER_MODEL, &sm, sizeof(sm));
|
|
|
|
ok(hr == S_OK, "Failed to check feature shader model support, hr %#x.\n", hr);
|
|
|
|
return sm.HighestShaderModel >= D3D_SHADER_MODEL_6_0;
|
|
|
|
}
|
|
|
|
|
2024-06-04 21:13:24 -07:00
|
|
|
static void run_shader_tests_for_model_range(void *dxc_compiler,
|
|
|
|
enum shader_model minimum_shader_model, enum shader_model maximum_shader_model)
|
2022-01-26 17:40:27 -08:00
|
|
|
{
|
2022-01-26 17:40:28 -08:00
|
|
|
static const struct test_context_desc desc =
|
|
|
|
{
|
2022-03-19 10:35:34 -07:00
|
|
|
.rt_width = RENDER_TARGET_WIDTH,
|
|
|
|
.rt_height = RENDER_TARGET_HEIGHT,
|
2022-01-26 17:40:28 -08:00
|
|
|
.no_root_signature = true,
|
|
|
|
.rt_format = DXGI_FORMAT_R32G32B32A32_FLOAT,
|
|
|
|
};
|
2022-03-19 10:35:32 -07:00
|
|
|
struct d3d12_shader_runner runner = {0};
|
2021-08-13 14:37:31 -07:00
|
|
|
ID3D12Device *device;
|
|
|
|
HRESULT hr;
|
2022-01-26 17:40:28 -08:00
|
|
|
|
2024-09-23 09:11:35 -07:00
|
|
|
#ifndef VKD3D_SHADER_UNSUPPORTED_DXIL
|
|
|
|
if (minimum_shader_model >= SHADER_MODEL_6_0)
|
|
|
|
{
|
|
|
|
skip("DXIL support is not enabled. If this is unintentional, "
|
|
|
|
"add -DVKD3D_SHADER_UNSUPPORTED_DXIL to CPPFLAGS.\n");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2023-04-04 05:49:04 -07:00
|
|
|
if (!init_test_context(&runner.test_context, &desc))
|
|
|
|
return;
|
2021-08-13 14:37:31 -07:00
|
|
|
device = runner.test_context.device;
|
|
|
|
|
2024-06-04 21:13:24 -07:00
|
|
|
if (minimum_shader_model >= SHADER_MODEL_6_0 && !device_supports_shader_model_6_0(device))
|
|
|
|
{
|
|
|
|
trace("Device does not support shader model 6.0.\n");
|
|
|
|
destroy_test_context(&runner.test_context);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
d3d12_runner_init_caps(&runner, minimum_shader_model, maximum_shader_model);
|
|
|
|
|
2023-09-14 02:29:24 -07:00
|
|
|
runner.dxc_compiler = dxc_compiler;
|
|
|
|
|
2021-08-13 14:37:31 -07:00
|
|
|
runner.compute_queue = create_command_queue(device,
|
|
|
|
D3D12_COMMAND_LIST_TYPE_COMPUTE, D3D12_COMMAND_QUEUE_PRIORITY_NORMAL);
|
|
|
|
|
|
|
|
hr = ID3D12Device_CreateCommandAllocator(device, D3D12_COMMAND_LIST_TYPE_COMPUTE,
|
|
|
|
&IID_ID3D12CommandAllocator, (void **)&runner.compute_allocator);
|
|
|
|
ok(hr == S_OK, "Failed to create command allocator, hr %#x.\n", hr);
|
|
|
|
|
|
|
|
hr = ID3D12Device_CreateCommandList(device, 0, D3D12_COMMAND_LIST_TYPE_COMPUTE,
|
|
|
|
runner.compute_allocator, NULL, &IID_ID3D12GraphicsCommandList, (void **)&runner.compute_list);
|
|
|
|
ok(hr == S_OK, "Failed to create command list, hr %#x.\n", hr);
|
2022-03-12 13:02:15 -08:00
|
|
|
|
2024-06-04 21:13:24 -07:00
|
|
|
run_shader_tests(&runner.r, &runner.caps, &d3d12_runner_ops, dxc_compiler);
|
2022-03-12 13:02:15 -08:00
|
|
|
|
2021-08-13 14:37:31 -07:00
|
|
|
ID3D12GraphicsCommandList_Release(runner.compute_list);
|
|
|
|
ID3D12CommandAllocator_Release(runner.compute_allocator);
|
|
|
|
ID3D12CommandQueue_Release(runner.compute_queue);
|
2022-03-19 10:35:32 -07:00
|
|
|
if (runner.heap)
|
|
|
|
ID3D12DescriptorHeap_Release(runner.heap);
|
2022-06-08 16:18:37 -07:00
|
|
|
if (runner.rtv_heap)
|
|
|
|
ID3D12DescriptorHeap_Release(runner.rtv_heap);
|
2024-04-14 17:33:15 -07:00
|
|
|
if (runner.dsv_heap)
|
|
|
|
ID3D12DescriptorHeap_Release(runner.dsv_heap);
|
2022-03-19 10:35:32 -07:00
|
|
|
destroy_test_context(&runner.test_context);
|
2022-01-26 17:40:27 -08:00
|
|
|
}
|
2024-06-04 21:13:24 -07:00
|
|
|
|
|
|
|
void run_shader_tests_d3d12(void *dxc_compiler)
|
|
|
|
{
|
|
|
|
enable_d3d12_debug_layer();
|
|
|
|
init_adapter_info();
|
|
|
|
|
|
|
|
run_shader_tests_for_model_range(NULL, SHADER_MODEL_4_0, SHADER_MODEL_5_1);
|
|
|
|
|
|
|
|
if (dxc_compiler)
|
|
|
|
run_shader_tests_for_model_range(dxc_compiler, SHADER_MODEL_6_0, SHADER_MODEL_6_0);
|
|
|
|
}
|