2022-01-26 17:40:27 -08:00
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/*
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* Copyright 2020-2021 Zebediah Figura for CodeWeavers
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA
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*/
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2022-01-26 17:40:28 -08:00
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#include "config.h"
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#include <assert.h>
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2022-01-26 17:40:27 -08:00
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#define COBJMACROS
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#define CONST_VTABLE
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#define VKD3D_TEST_NO_DEFS
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#include "d3d12_crosstest.h"
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#include "shader_runner.h"
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struct d3d12_resource
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{
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struct resource r;
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D3D12_DESCRIPTOR_RANGE descriptor_range;
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ID3D12Resource *resource;
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unsigned int root_index;
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};
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static struct d3d12_resource *d3d12_resource(struct resource *r)
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{
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return CONTAINING_RECORD(r, struct d3d12_resource, r);
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}
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2022-03-19 10:35:32 -07:00
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struct d3d12_shader_runner
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{
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struct shader_runner r;
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struct test_context test_context;
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2022-03-12 13:02:15 -08:00
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ID3D12DescriptorHeap *heap;
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};
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static struct d3d12_shader_runner *d3d12_shader_runner(struct shader_runner *r)
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{
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return CONTAINING_RECORD(r, struct d3d12_shader_runner, r);
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}
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2022-03-21 18:42:14 -07:00
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static ID3D10Blob *compile_shader(const char *source, const char *type, enum shader_model shader_model)
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{
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ID3D10Blob *blob = NULL, *errors = NULL;
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char profile[7];
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HRESULT hr;
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static const char *const shader_models[] =
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{
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[SHADER_MODEL_2_0] = "4_0",
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[SHADER_MODEL_4_0] = "4_0",
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[SHADER_MODEL_4_1] = "4_1",
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[SHADER_MODEL_5_0] = "5_0",
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[SHADER_MODEL_5_1] = "5_1",
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};
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sprintf(profile, "%s_%s", type, shader_models[shader_model]);
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hr = D3DCompile(source, strlen(source), NULL, NULL, NULL, "main", profile, 0, 0, &blob, &errors);
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ok(hr == S_OK, "Failed to compile shader, hr %#x.\n", hr);
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if (errors)
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{
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if (vkd3d_test_state.debug_level)
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trace("%s\n", (char *)ID3D10Blob_GetBufferPointer(errors));
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ID3D10Blob_Release(errors);
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}
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return blob;
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}
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2022-03-12 13:02:15 -08:00
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#define MAX_RESOURCE_DESCRIPTORS 256
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static struct resource *d3d12_runner_create_resource(struct shader_runner *r, const struct resource_params *params)
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{
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struct d3d12_shader_runner *runner = d3d12_shader_runner(r);
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struct test_context *test_context = &runner->test_context;
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ID3D12Device *device = test_context->device;
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D3D12_SUBRESOURCE_DATA resource_data;
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struct d3d12_resource *resource;
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resource = calloc(1, sizeof(*resource));
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resource->r.slot = params->slot;
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resource->r.type = params->type;
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resource->r.size = params->data_size;
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switch (params->type)
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{
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case RESOURCE_TYPE_TEXTURE:
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if (!runner->heap)
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runner->heap = create_gpu_descriptor_heap(device,
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D3D12_DESCRIPTOR_HEAP_TYPE_CBV_SRV_UAV, MAX_RESOURCE_DESCRIPTORS);
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if (params->slot >= MAX_RESOURCE_DESCRIPTORS)
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fatal_error("Resource slot %u is too high; please increase MAX_RESOURCE_DESCRIPTORS.\n", params->slot);
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resource->resource = create_default_texture(device, params->width, params->height,
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params->format, 0, D3D12_RESOURCE_STATE_COPY_DEST);
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resource_data.pData = params->data;
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resource_data.SlicePitch = resource_data.RowPitch = params->width * params->texel_size;
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upload_texture_data(resource->resource, &resource_data, 1, test_context->queue, test_context->list);
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reset_command_list(test_context->list, test_context->allocator);
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transition_resource_state(test_context->list, resource->resource, D3D12_RESOURCE_STATE_COPY_DEST,
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D3D12_RESOURCE_STATE_NON_PIXEL_SHADER_RESOURCE | D3D12_RESOURCE_STATE_PIXEL_SHADER_RESOURCE);
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ID3D12Device_CreateShaderResourceView(device, resource->resource,
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NULL, get_cpu_descriptor_handle(test_context, runner->heap, resource->r.slot));
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break;
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case RESOURCE_TYPE_VERTEX_BUFFER:
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resource->resource = create_upload_buffer(device, params->data_size, params->data);
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break;
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}
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return &resource->r;
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}
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static void d3d12_runner_destroy_resource(struct shader_runner *r, struct resource *res)
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{
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struct d3d12_resource *resource = d3d12_resource(res);
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2022-03-21 18:42:17 -07:00
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ID3D12Resource_Release(resource->resource);
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free(resource);
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}
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2022-03-21 18:42:19 -07:00
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static void d3d12_runner_draw(struct shader_runner *r, unsigned int vertex_count)
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{
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struct d3d12_shader_runner *runner = d3d12_shader_runner(r);
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struct test_context *test_context = &runner->test_context;
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ID3D12GraphicsCommandList *command_list = test_context->list;
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D3D12_ROOT_SIGNATURE_DESC root_signature_desc = {0};
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D3D12_ROOT_PARAMETER root_params[3], *root_param;
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ID3D12CommandQueue *queue = test_context->queue;
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D3D12_INPUT_ELEMENT_DESC *input_element_descs;
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D3D12_STATIC_SAMPLER_DESC static_samplers[1];
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ID3D12Device *device = test_context->device;
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D3D12_INPUT_LAYOUT_DESC input_layout;
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static const float clear_color[4];
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ID3D10Blob *vs_code, *ps_code;
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D3D12_SHADER_BYTECODE vs, ps;
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unsigned int uniform_index;
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ID3D12PipelineState *pso;
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HRESULT hr;
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size_t i;
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if (!(ps_code = compile_shader(runner->r.ps_source, "ps", runner->r.minimum_shader_model)))
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return;
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2022-03-21 18:42:15 -07:00
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if (!(vs_code = compile_shader(runner->r.vs_source, "vs", runner->r.minimum_shader_model)))
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{
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ID3D10Blob_Release(ps_code);
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return;
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}
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root_signature_desc.NumParameters = 0;
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root_signature_desc.pParameters = root_params;
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root_signature_desc.NumStaticSamplers = 0;
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root_signature_desc.pStaticSamplers = static_samplers;
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root_signature_desc.Flags = D3D12_ROOT_SIGNATURE_FLAG_ALLOW_INPUT_ASSEMBLER_INPUT_LAYOUT;
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2022-03-19 10:35:32 -07:00
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if (runner->r.uniform_count)
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{
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uniform_index = root_signature_desc.NumParameters++;
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root_param = &root_params[uniform_index];
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root_param->ParameterType = D3D12_ROOT_PARAMETER_TYPE_32BIT_CONSTANTS;
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root_param->Constants.ShaderRegister = 0;
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root_param->Constants.RegisterSpace = 0;
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root_param->Constants.Num32BitValues = runner->r.uniform_count;
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root_param->ShaderVisibility = D3D12_SHADER_VISIBILITY_ALL;
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}
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2022-03-21 18:42:17 -07:00
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for (i = 0; i < runner->r.resource_count; ++i)
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{
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struct d3d12_resource *resource = d3d12_resource(runner->r.resources[i]);
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D3D12_DESCRIPTOR_RANGE *range;
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2022-03-21 18:42:17 -07:00
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switch (resource->r.type)
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{
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case RESOURCE_TYPE_TEXTURE:
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range = &resource->descriptor_range;
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resource->root_index = root_signature_desc.NumParameters++;
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root_param = &root_params[resource->root_index];
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root_param->ParameterType = D3D12_ROOT_PARAMETER_TYPE_DESCRIPTOR_TABLE;
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root_param->DescriptorTable.NumDescriptorRanges = 1;
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root_param->DescriptorTable.pDescriptorRanges = range;
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root_param->ShaderVisibility = D3D12_SHADER_VISIBILITY_ALL;
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range->RangeType = D3D12_DESCRIPTOR_RANGE_TYPE_SRV;
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range->NumDescriptors = 1;
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range->BaseShaderRegister = resource->r.slot;
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range->RegisterSpace = 0;
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range->OffsetInDescriptorsFromTableStart = 0;
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break;
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case RESOURCE_TYPE_VERTEX_BUFFER:
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break;
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}
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}
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assert(root_signature_desc.NumParameters <= ARRAY_SIZE(root_params));
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for (i = 0; i < runner->r.sampler_count; ++i)
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{
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D3D12_STATIC_SAMPLER_DESC *sampler_desc = &static_samplers[root_signature_desc.NumStaticSamplers++];
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const struct sampler *sampler = &runner->r.samplers[i];
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memset(sampler_desc, 0, sizeof(*sampler_desc));
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sampler_desc->Filter = sampler->filter;
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sampler_desc->AddressU = sampler->u_address;
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sampler_desc->AddressV = sampler->v_address;
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sampler_desc->AddressW = sampler->w_address;
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sampler_desc->ShaderRegister = sampler->slot;
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sampler_desc->RegisterSpace = 0;
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sampler_desc->ShaderVisibility = D3D12_SHADER_VISIBILITY_ALL;
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}
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if (test_context->root_signature)
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ID3D12RootSignature_Release(test_context->root_signature);
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hr = create_root_signature(device, &root_signature_desc, &test_context->root_signature);
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ok(hr == S_OK, "Failed to create root signature, hr %#x.\n", hr);
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2022-03-21 18:42:16 -07:00
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input_element_descs = calloc(runner->r.input_element_count, sizeof(*input_element_descs));
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for (i = 0; i < runner->r.input_element_count; ++i)
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{
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const struct input_element *element = &runner->r.input_elements[i];
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D3D12_INPUT_ELEMENT_DESC *desc = &input_element_descs[i];
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desc->SemanticName = element->name;
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desc->SemanticIndex = element->index;
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desc->Format = element->format;
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desc->InputSlot = element->slot;
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desc->AlignedByteOffset = D3D12_APPEND_ALIGNED_ELEMENT;
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desc->InputSlotClass = D3D12_INPUT_CLASSIFICATION_PER_VERTEX_DATA;
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}
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input_layout.pInputElementDescs = input_element_descs;
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input_layout.NumElements = runner->r.input_element_count;
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2022-03-21 18:42:15 -07:00
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vs.pShaderBytecode = ID3D10Blob_GetBufferPointer(vs_code);
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vs.BytecodeLength = ID3D10Blob_GetBufferSize(vs_code);
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ps.pShaderBytecode = ID3D10Blob_GetBufferPointer(ps_code);
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ps.BytecodeLength = ID3D10Blob_GetBufferSize(ps_code);
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pso = create_pipeline_state(device, test_context->root_signature,
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test_context->render_target_desc.Format, &vs, &ps, &input_layout);
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ID3D10Blob_Release(vs_code);
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2022-01-26 17:40:31 -08:00
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ID3D10Blob_Release(ps_code);
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2022-03-21 18:42:16 -07:00
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free(input_element_descs);
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2022-01-26 17:40:28 -08:00
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if (!pso)
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return;
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vkd3d_array_reserve((void **)&test_context->pso, &test_context->pso_capacity,
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test_context->pso_count + 1, sizeof(*test_context->pso));
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test_context->pso[test_context->pso_count++] = pso;
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ID3D12GraphicsCommandList_SetGraphicsRootSignature(command_list, test_context->root_signature);
|
2022-03-19 10:35:32 -07:00
|
|
|
if (runner->r.uniform_count)
|
2022-01-26 17:40:28 -08:00
|
|
|
ID3D12GraphicsCommandList_SetGraphicsRoot32BitConstants(command_list, uniform_index,
|
2022-03-19 10:35:32 -07:00
|
|
|
runner->r.uniform_count, runner->r.uniforms, 0);
|
2022-03-21 18:42:17 -07:00
|
|
|
for (i = 0; i < runner->r.resource_count; ++i)
|
2022-01-26 17:40:28 -08:00
|
|
|
{
|
2022-03-21 18:42:17 -07:00
|
|
|
struct d3d12_resource *resource = d3d12_resource(runner->r.resources[i]);
|
2022-03-21 18:42:18 -07:00
|
|
|
D3D12_VERTEX_BUFFER_VIEW vbv;
|
2022-03-21 18:42:17 -07:00
|
|
|
|
|
|
|
switch (resource->r.type)
|
|
|
|
{
|
|
|
|
case RESOURCE_TYPE_TEXTURE:
|
|
|
|
ID3D12GraphicsCommandList_SetGraphicsRootDescriptorTable(command_list, resource->root_index,
|
|
|
|
get_gpu_descriptor_handle(test_context, runner->heap, resource->r.slot));
|
|
|
|
break;
|
2022-03-21 18:42:18 -07:00
|
|
|
|
|
|
|
case RESOURCE_TYPE_VERTEX_BUFFER:
|
|
|
|
vbv.BufferLocation = ID3D12Resource_GetGPUVirtualAddress(resource->resource);
|
|
|
|
vbv.StrideInBytes = get_vb_stride(&runner->r, resource->r.slot);
|
|
|
|
vbv.SizeInBytes = resource->r.size;
|
|
|
|
|
|
|
|
ID3D12GraphicsCommandList_IASetVertexBuffers(command_list, resource->r.slot, 1, &vbv);
|
|
|
|
break;
|
2022-03-21 18:42:17 -07:00
|
|
|
}
|
2022-01-26 17:40:28 -08:00
|
|
|
}
|
|
|
|
|
|
|
|
ID3D12GraphicsCommandList_OMSetRenderTargets(command_list, 1, &test_context->rtv, false, NULL);
|
|
|
|
ID3D12GraphicsCommandList_RSSetScissorRects(command_list, 1, &test_context->scissor_rect);
|
|
|
|
ID3D12GraphicsCommandList_RSSetViewports(command_list, 1, &test_context->viewport);
|
|
|
|
ID3D12GraphicsCommandList_IASetPrimitiveTopology(command_list, D3D_PRIMITIVE_TOPOLOGY_TRIANGLELIST);
|
|
|
|
ID3D12GraphicsCommandList_ClearRenderTargetView(command_list, test_context->rtv, clear_color, 0, NULL);
|
|
|
|
ID3D12GraphicsCommandList_SetPipelineState(command_list, pso);
|
2022-03-21 18:42:19 -07:00
|
|
|
ID3D12GraphicsCommandList_DrawInstanced(command_list, vertex_count, 1, 0, 0);
|
2022-01-26 17:40:28 -08:00
|
|
|
transition_resource_state(command_list, test_context->render_target,
|
|
|
|
D3D12_RESOURCE_STATE_RENDER_TARGET, D3D12_RESOURCE_STATE_COPY_SOURCE);
|
|
|
|
|
|
|
|
/* Finish the command list so that we can destroy objects. */
|
|
|
|
hr = ID3D12GraphicsCommandList_Close(command_list);
|
|
|
|
ok(hr == S_OK, "Failed to close command list, hr %#x.\n", hr);
|
|
|
|
exec_command_list(queue, command_list);
|
|
|
|
wait_queue_idle(device, queue);
|
|
|
|
reset_command_list(command_list, test_context->allocator);
|
|
|
|
}
|
|
|
|
|
2022-03-19 10:35:31 -07:00
|
|
|
static void d3d12_runner_probe_vec4(struct shader_runner *r,
|
2022-01-26 17:40:28 -08:00
|
|
|
const RECT *rect, const struct vec4 *v, unsigned int ulps)
|
|
|
|
{
|
2022-03-19 10:35:32 -07:00
|
|
|
struct d3d12_shader_runner *runner = d3d12_shader_runner(r);
|
|
|
|
struct test_context *test_context = &runner->test_context;
|
2022-01-26 17:40:28 -08:00
|
|
|
struct resource_readback rb;
|
|
|
|
|
|
|
|
get_texture_readback_with_command_list(test_context->render_target, 0, &rb,
|
|
|
|
test_context->queue, test_context->list);
|
|
|
|
check_readback_data_vec4(&rb, rect, v, ulps);
|
|
|
|
release_resource_readback(&rb);
|
|
|
|
reset_command_list(test_context->list, test_context->allocator);
|
|
|
|
}
|
|
|
|
|
2022-01-26 17:40:27 -08:00
|
|
|
static const struct shader_runner_ops d3d12_runner_ops =
|
|
|
|
{
|
2022-03-21 18:42:17 -07:00
|
|
|
.create_resource = d3d12_runner_create_resource,
|
|
|
|
.destroy_resource = d3d12_runner_destroy_resource,
|
2022-03-21 18:42:19 -07:00
|
|
|
.draw = d3d12_runner_draw,
|
2022-01-26 17:40:28 -08:00
|
|
|
.probe_vec4 = d3d12_runner_probe_vec4,
|
2022-01-26 17:40:27 -08:00
|
|
|
};
|
|
|
|
|
|
|
|
void run_shader_tests_d3d12(int argc, char **argv)
|
|
|
|
{
|
2022-01-26 17:40:28 -08:00
|
|
|
static const struct test_context_desc desc =
|
|
|
|
{
|
2022-03-19 10:35:34 -07:00
|
|
|
.rt_width = RENDER_TARGET_WIDTH,
|
|
|
|
.rt_height = RENDER_TARGET_HEIGHT,
|
2022-01-26 17:40:28 -08:00
|
|
|
.no_root_signature = true,
|
|
|
|
.rt_format = DXGI_FORMAT_R32G32B32A32_FLOAT,
|
|
|
|
};
|
2022-03-19 10:35:32 -07:00
|
|
|
struct d3d12_shader_runner runner = {0};
|
2022-01-26 17:40:28 -08:00
|
|
|
|
|
|
|
parse_args(argc, argv);
|
|
|
|
enable_d3d12_debug_layer(argc, argv);
|
|
|
|
init_adapter_info();
|
2022-03-19 10:35:32 -07:00
|
|
|
init_test_context(&runner.test_context, &desc);
|
2022-03-12 13:02:15 -08:00
|
|
|
|
2022-03-19 10:35:32 -07:00
|
|
|
run_shader_tests(&runner.r, argc, argv, &d3d12_runner_ops);
|
2022-03-12 13:02:15 -08:00
|
|
|
|
2022-03-19 10:35:32 -07:00
|
|
|
if (runner.heap)
|
|
|
|
ID3D12DescriptorHeap_Release(runner.heap);
|
|
|
|
destroy_test_context(&runner.test_context);
|
2022-01-26 17:40:27 -08:00
|
|
|
}
|