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693 Commits

Author SHA1 Message Date
Conor McCarthy
fb588b8d1a vkd3d-shader/spirv: Avoid invalid bool-to-bool conversion in spirv_compiler_emit_movc(). 
Shaders parsed from DXIL contain a bool condition register, so calling
spirv_compiler_emit_int_to_bool() results in an invalid bool/uint
comparison.
 2023-11-15 21:48:36 +01:00
Conor McCarthy
08b8730866 vkd3d-shader/spirv: Return an error if an invalid handler is encountered. 
Prevents return of an invalid SPIR-V module.
 2023-11-15 21:48:31 +01:00
Henri Verbeet
215a2c4ede vkd3d-shader/ir: Introduce vsir_register_is_descriptor(). 2023-11-13 23:19:10 +01:00
Conor McCarthy
22960753e9 vkd3d-shader/spirv: Introduce orderedness to comparison instructions. 2023-11-10 20:23:51 +01:00
Conor McCarthy
1dd141535c vkd3d-shader/spirv: Support bool dst register in spirv_compiler_emit_comparison_instruction(). 2023-11-10 20:23:48 +01:00
Zebediah Figura
011e31f624 vkd3d-shader/spirv: Remove no longer used private_output_variable_array_idx array. 2023-11-09 21:15:01 +01:00
Zebediah Figura
8513f567fa vkd3d-shader/spirv: Look up builtins by vkd3d_shader_sysval_semantic. 
Instead of by vkd3d_shader_input_sysval_semantic.
 2023-11-09 21:14:57 +01:00
Zebediah Figura
87cb66dd43 vkd3d-shader/spirv: Simplify spirv_compiler_emit_dcl_input(). 2023-11-09 21:14:55 +01:00
Zebediah Figura
c7a7d9a18c vkd3d-shader/ir: Normalize all I/O registers to INPUT/OUTPUT/PATCHCONST. 
Specifically, map COLOROUT to OUTPUT, and map INCONTROLPOINT to INPUT for domain
shaders as well as hull shaders.

Obscure the non-existent differences from the view of the backend.
 2023-11-09 21:14:52 +01:00
Conor McCarthy
bd77cbb33f vkd3d-shader/spirv: Support double in spirv_compiler_emit_ftou(). 2023-11-09 21:14:40 +01:00
Conor McCarthy
92d546f3a2 vkd3d-shader/spirv: Support double in spirv_compiler_emit_ftoi(). 2023-11-09 21:14:37 +01:00
Conor McCarthy
169210558d vkd3d-shader/spirv: Handle unsigned result in spirv_compiler_emit_ftoi(). 2023-11-09 21:14:35 +01:00
Conor McCarthy
58ffb5d181 vkd3d-shader/spirv: Introduce integer width cast instructions. 
ITOI and UTOU may cast from a bool to a 32-bit integer. Cast to a 64-bit
integer from a smaller type will be added later.
 2023-11-09 21:14:32 +01:00
Conor McCarthy
7de4ac2e48 vkd3d-shader/spirv: Support bool cast in spirv_compiler_emit_alu_instruction(). 2023-11-09 21:14:30 +01:00
Conor McCarthy
5b87d6419a vkd3d-shader/spirv: Support bool logic ops in spirv_compiler_emit_alu_instruction(). 2023-11-09 21:14:27 +01:00
Conor McCarthy
b43dab50c1 vkd3d-shader/spirv: Support bitcast in spirv_compiler_emit_load_ssa_reg(). 2023-11-09 21:14:25 +01:00
Henri Verbeet
e7eec3e023 vkd3d-shader/spirv: Allow the origin of fragment coordinates to be specified. 
We typically want to use lower-left in OpenGL environments when rendering to
FBOs.
 2023-11-09 21:14:12 +01:00
Zebediah Figura
12240efa79 vkd3d-shader/spirv: Use register counts from the signature and shader desc. 2023-11-07 22:26:49 +01:00
Zebediah Figura
0058764f01 vkd3d-shader: Store the control point counts in struct vkd3d_shader_desc. 2023-11-07 22:26:49 +01:00
Zebediah Figura
3ff22ac5af vkd3d-shader/spirv: Use the array sizes for shader phase builtins as well. 2023-11-07 22:26:47 +01:00
Conor McCarthy
3e0638148a vkd3d-shader/spirv: Support VKD3D_DATA_UINT in spirv_compiler_emit_neg(). 
The DXIL parser uses unsigned types even if the source code uses signed,
so unsigned values may be negated.
 2023-11-06 23:09:02 +01:00
Conor McCarthy
4905d047bd vkd3d-shader/spirv: Handle the UMUL instruction. 2023-11-06 23:09:01 +01:00
Conor McCarthy
acbc80cba2 vkd3d-shader/spirv: Introduce an IDIV instruction. 2023-11-06 23:09:00 +01:00
Conor McCarthy
c8d3515d8b vkd3d-shader/spirv: Introduce an FREM instruction. 2023-11-06 23:08:58 +01:00
Giovanni Mascellani
0d4aebd2e7 vkd3d-shader: Explicitly cast vkd3d_shader_global_flags to uint64_t. 
On macOS vkd3d_shader_global_flags has underlying type unsigned long,
while uint64_t is defined as unsigned long long. This difference
causes a few warnings to be raised.
 2023-11-06 23:08:37 +01:00
Zebediah Figura
f05be8ff12 vkd3d-shader/spirv: No longer handle builtin array size mismatch in spirv_compiler_emit_input(). 
This is taken care of by prior I/O lowering. We no longer need to deal with this here.
 2023-11-06 23:07:59 +01:00
Zebediah Figura
fa23165cc0 vkd3d-shader/spirv: Remove handling of VKD3DSPR_OUTCONTROLPOINT. 
I/O normalization removes this register type.
 2023-11-06 23:07:58 +01:00
Zebediah Figura
b73d2c978d vkd3d-shader/ir: Check for vocp usage during IR normalization. 
The hull shader barrier used for this was broken by I/O normalization, since
vocp is no longer exposed to the spirv backend.

Restore this barrier by checking for vocp during normalization instead.
 2023-11-06 23:07:56 +01:00
Conor McCarthy
e899b67bbf vkd3d-shader/spirv: Support scalar swizzle of vector SSA registers. 2023-11-01 21:47:33 +01:00
Zebediah Figura
a66acea1b5 vkd3d-shader/spirv: Always use the sysval from the signature. 2023-10-31 21:59:40 +01:00
Zebediah Figura
eef62b95c1 vkd3d-shader/spirv: Use the interpolation mode from the signature. 2023-10-31 21:59:39 +01:00
Conor McCarthy
9b64d04ed3 vkd3d-shader/spirv: Align constant buffer sizes to 16 bytes. 
DXIL constant buffer sizes are not aligned to 16 bytes.
 2023-10-19 23:07:40 +02:00
Henri Verbeet
4e8ba62481 vkd3d-shader/spirv: Initialise "symbol.descriptor_array" in spirv_compiler_emit_combined_sampler_declarations(). 
Besides simply avoiding carrying around some uninitialised data, we
check "symbol->descriptor_array" in spirv_compiler_prepare_image(), both
for separate resources and for combined resource/sampler symbols.
 2023-10-17 22:18:44 +02:00
Conor McCarthy
06f8a88466 vkd3d-shader: Define more global flags. 2023-10-17 22:18:23 +02:00
Francisco Casas
f0da419a8c vkd3d-shader: Remove unnecessary fallthroughs (clangd). 2023-10-12 23:27:19 +02:00
Conor McCarthy
df4e1b7393 vkd3d-shader/dxil: Read immediate constant arrays. 2023-10-11 22:21:19 +02:00
Conor McCarthy
75c2af3640 vkd3d-shader/spirv: When declaring a CBV initialise the register with the register index range. 
The declaration instruction register contains id, range first, and range
last. The backend includes range first in the variable name. After commit
e8b3561252 it was always zero, and since commit 67f0196c33 it is
UINT_MAX, so constant buffers are named, e.g., "%cb0_4294967295".
 2023-10-09 21:58:01 +02:00
Zebediah Figura
a4c5f3a798 vkd3d-shader/spirv: Add a debug name for the push constant buffer. 2023-10-09 21:57:53 +02:00
Henri Verbeet
98d158d004 vkd3d-shader/tpf: Get rid of the output map. 
Map output registers in the backend instead, as needed.
 2023-10-09 21:57:46 +02:00
Francisco Casas
e904660497 vkd3d-shader: Turn vkd3d_shader_register.immconst_type into vkd3d_shader_register.dimension. 2023-09-26 22:07:04 +02:00
Francisco Casas
6f5cb219f4 vkd3d-shader/spirv: Use vsir_register_init() in spirv_compiler_emit_default_control_point_phase(). 2023-09-26 22:07:00 +02:00
Francisco Casas
81802e27d0 vkd3d-shader/spirv: Use vsir_register_init() in spirv_compiler_emit_resource_declaration(). 2023-09-26 22:06:59 +02:00
Francisco Casas
314c6e4808 vkd3d-shader/spirv: Use vsir_register_init() in spirv_compiler_emit_sampler_declaration(). 2023-09-26 22:06:58 +02:00
Francisco Casas
b2f262467f vkd3d-shader/spirv: Use vsir_register_init() in spirv_compiler_emit_dcl_immediate_constant_buffer(). 2023-09-26 22:06:56 +02:00
Francisco Casas
67f0196c33 vkd3d-shader/spirv: Use vsir_register_init() in spirv_compiler_emit_cbv_declaration(). 2023-09-26 22:06:55 +02:00
Francisco Casas
04529bc0b7 vkd3d-shader/spirv: Use vsir_register_init() in spirv_compiler_emit_dcl_indexable_temp(). 2023-09-26 22:06:54 +02:00
Francisco Casas
e174f6b413 vkd3d-shader/spirv: Use vsir_register_init() in spirv_compiler_emit_hull_shader_builtins(). 2023-09-26 22:06:53 +02:00
Francisco Casas
89d7bd7a81 vkd3d-shader/spirv: Use vsir_register_init() in spirv_compiler_get_invocation_id(). 2023-09-26 22:06:52 +02:00
Conor McCarthy
575135a9ce vkd3d-shader/spirv: Build undefined values once. 2023-09-25 22:07:05 +02:00
Conor McCarthy
3249723972 vkd3d-shader/spirv: Introduce a Static Single Assignment register type. 2023-09-25 22:07:04 +02:00