Conor McCarthy
a8dd788f41
vkd3d-shader/spirv: Emit a warning if the atomic instruction volatile flag is unhandled.
2024-03-27 22:37:00 +01:00
Conor McCarthy
47e56cdfed
vkd3d-shader/spirv: Support 64-bit register info component type in spirv_compiler_emit_load_reg().
...
For 64-bit indexable temps (and any other 64-bit declarations) the write
mask must not be converted.
2024-03-27 22:36:55 +01:00
Conor McCarthy
83a67366da
vkd3d-shader/spirv: Do not assert if a TGSM store data register is not UINT.
2024-03-27 22:36:54 +01:00
Conor McCarthy
9da375414e
vkd3d-shader/spirv: Do not assert if a TGSM load dst register is not UINT.
2024-03-27 22:36:52 +01:00
Henri Verbeet
5de5f241a6
vkd3d-shader/ir: Pass a struct vsir_program to vkd3d_shader_normalise().
2024-03-19 22:57:56 +01:00
Conor McCarthy
421d311a49
vkd3d-shader/spirv: Use dst register data type in spirv_compiler_emit_imad().
2024-03-18 23:07:36 +01:00
Conor McCarthy
b22632ff1a
vkd3d-shader/spirv: Emit a trace message if TGSM alignment is ignored.
...
This would cause a lot of warning spam if it was a warning.
2024-03-14 22:48:45 +01:00
Conor McCarthy
6dd54eeb09
vkd3d-shader/spirv: Support zero-initialisation for workgroup memory.
2024-03-14 22:48:41 +01:00
Conor McCarthy
0dc174ebd7
vkd3d-shader/spirv: Emit an error if a FIRSTBIT instruction has a 64-bit source.
2024-03-13 21:50:37 +01:00
Conor McCarthy
a64eb75c1d
vkd3d-shader/spirv: Emit an error if COUNTBITS has a 64-bit source.
2024-03-13 21:50:36 +01:00
Conor McCarthy
066ea75945
vkd3d-shader/spirv: Introduce HALF and UINT16 types for minimum precision.
...
Minimum precision types must always be implemented as 32-bit to match how
reduced precision works in SPIR-V.
2024-03-11 22:10:05 +01:00
Conor McCarthy
58123c2e10
vkd3d-shader/spirv: Introduce a data_type_is_floating_point() helper function.
2024-03-11 22:10:03 +01:00
Zebediah Figura
ad495970e0
vkd3d-shader/spirv: Implement SLT and SGE.
2024-03-11 22:09:48 +01:00
Zebediah Figura
27196d8b0f
vkd3d-shader/spirv: Implement CMP.
2024-03-11 22:09:44 +01:00
Giovanni Mascellani
470d83a9da
vkd3d-shader: Move shader signatures to vsir_program.
2024-03-11 22:09:31 +01:00
Evan Tang
4553b2a0dc
vkd3d-shader/spirv: Implement support for rasteriser-ordered views.
...
Using SPV_EXT_fragment_shader_interlock.
2024-03-08 23:36:35 +01:00
Conor McCarthy
e65055b435
vkd3d-shader/spirv: Handle the ORD and UNO instructions.
2024-03-08 23:36:14 +01:00
Conor McCarthy
5082893e5d
vkd3d-shader/spirv: Always use a 64-bit write mask for IMMCONST64 src params.
...
There is no way to tell in spirv_compiler_emit_load_reg() if the write
mask is 64-bit. All loads are 32-bit except for IMMCONST64 and SSA, and
the latter ignores the mask, so the only issue lies with IMMCONST64.
2024-03-06 23:04:12 +01:00
Henri Verbeet
f866fb95ad
Release 1.11.
2024-03-05 20:39:45 +01:00
Conor McCarthy
625e289574
vkd3d-shader/dxil: Handle hyperbolic trigonometric functions in sm6_parser_emit_dx_unary().
2024-02-07 22:59:23 +01:00
Conor McCarthy
7f87a3e5fc
vkd3d-shader/spirv: Handle the ACOS, ASIN and ATAN instructions in spirv_compiler_emit_ext_glsl_instruction().
2024-02-06 23:09:55 +01:00
Giovanni Mascellani
eb723a8d2b
vkd3d-shader/spirv: Support bool TEMP registers.
2024-02-06 23:06:58 +01:00
Giovanni Mascellani
49f0fd42b8
vkd3d-shader/spirv: Move bool casting helpers above register loading helpers.
2024-02-06 23:06:55 +01:00
Giovanni Mascellani
ee994e95dd
vkd3d-shader/spirv: Convert the swizzle according to the source bit width.
...
Fixes: 1f536238a8
2024-02-06 23:06:53 +01:00
Conor McCarthy
95e4222cc6
vkd3d-shader/spirv: Emit a vector bitcast if necessary in spirv_compiler_emit_load_ssa_reg().
2024-02-01 22:25:04 +01:00
Conor McCarthy
ebec0aa434
vkd3d-shader/dxil: Implement DX intrinsic TextureLoad.
2024-02-01 22:25:02 +01:00
Giovanni Mascellani
cc72a8d311
vkd3d-shader/spirv: Free binary SPIR-V code (Valgrind).
2024-02-01 00:08:28 +01:00
Giovanni Mascellani
1f536238a8
vkd3d-shader: Use 64 bit swizzles for 64 bit data types in VSIR.
...
The handling of write masks and swizzles for 64 bit data types is
currently irregular: write masks are always 64 bit, while swizzles
are usually 32 bit, except for SSA registers with are 64 bit.
With this change we always use 64 bit swizzles, in order to make
the situation less surprising and make it easier to convert
registers between SSA and TEMP.
64 bit swizzles are always required to have X in their last two
components.
2024-01-29 22:33:33 +01:00
Conor McCarthy
92f0b37133
vkd3d-shader/spirv: Support 64-bit source value for bitfield instructions.
2024-01-29 22:33:22 +01:00
Giovanni Mascellani
378109051c
vkd3d-shader/ir: Lower monolithic switches to selection ladders.
...
PHI nodes must be fixed up after this pass, because the block references
might have become broken. For simplicitly this is not handled yet.
The goal for this pass is to make the CFG structurizer simpler, because
only conditional and unconditional branches must be supported.
Eventually this limitation might be lifted if there is advantage in
doing so.
2024-01-29 22:33:15 +01:00
Giovanni Mascellani
b97edee03d
vkd3d-shader/spirv: Emit an error if merge information is missing.
...
Instead of crashing.
2024-01-29 22:33:14 +01:00
Conor McCarthy
f954724870
vkd3d-shader/spirv: Handle the TAN instruction in spirv_compiler_emit_ext_glsl_instruction().
2024-01-25 22:24:44 +01:00
Conor McCarthy
8ae69c745b
vkd3d-shader/spirv: Handle thread group UAV barriers.
2024-01-25 22:24:23 +01:00
Conor McCarthy
18e9148f58
vkd3d-shader/spirv: Include Uniform in the memory semantics for UAV barriers.
...
The UniformMemory semantic applies the constraints to Uniform storage
class memory, which matches how UAV variables are declared.
2024-01-25 22:24:22 +01:00
Conor McCarthy
adfbecef3c
vkd3d-shader/spirv: Handle globally coherent UAVs.
2024-01-25 22:24:20 +01:00
Conor McCarthy
54f6e6dd67
vkd3d-shader/spirv: Check for FEATURE_FLOAT64 when double precision use is flagged.
2024-01-24 22:38:09 +01:00
Conor McCarthy
e973271a40
vkd3d-shader/spirv: Handle the ISINF and ISNAN instructions in spirv_compiler_emit_alu_instruction().
2024-01-24 22:38:04 +01:00
Conor McCarthy
cd674d593e
vkd3d-shader/spirv: Implement the ISFINITE instruction.
2024-01-24 22:38:03 +01:00
Francisco Casas
b92f6c448a
vkd3d-shader/ir: Lower texkill instructions to discard_nz.
2024-01-24 22:37:41 +01:00
Henri Verbeet
bf628f0c74
vkd3d-shader/ir: Store block names in struct vsir_program.
2024-01-23 20:27:35 +01:00
Henri Verbeet
f3c7d2d05c
vkd3d-shader/ir: Store the block count in struct vsir_program.
2024-01-23 20:27:34 +01:00
Henri Verbeet
98c6e85b33
vkd3d-shader/ir: Store control point counts in struct vsir_program.
2024-01-23 20:27:32 +01:00
Conor McCarthy
e4660fe0e6
vkd3d-shader/spirv: Emit DISCARD as a function call.
2024-01-23 20:26:59 +01:00
Giovanni Mascellani
de9725b6ba
vkd3d-shader/ir: Remove DCL_TEMPS instructions.
...
We have to do work to keep it updated across passes and we never read it.
2024-01-23 20:26:38 +01:00
Giovanni Mascellani
45495f54f2
vkd3d-shader/spirv: Use capability ShaderViewportIndexLayerEXT for decoration ViewportIndex.
2024-01-22 22:19:11 +01:00
Giovanni Mascellani
6ac525d6c3
vkd3d-shader/spirv: Use capability ShaderViewportIndexLayerEXT for decoration Layer.
...
Capability Geometry allows to use the Layer builtin in geometry and pixel
shaders. For vertex and domain shaders ShaderLayer should be used, but it's only
available starting from SPIR-V 1.5. ShaderViewportIndexLayerEXT can be used
instead with extension SPV_EXT_shader_viewport_index_layer.
2024-01-22 22:19:09 +01:00
Henri Verbeet
adc02eada8
vkd3d-shader/ir: Store the temporary register count in struct vsir_program.
2024-01-22 22:18:53 +01:00
Henri Verbeet
94ca46916a
vkd3d-shader/ir: Store the SSA register count in struct vsir_program.
2024-01-22 22:18:52 +01:00
Henri Verbeet
7b85cd6a31
vkd3d-shader/ir: Store the "use_vocp" field in struct vsir_program.
2024-01-22 22:18:51 +01:00
Henri Verbeet
23dcd4f22b
vkd3d-shader/ir: Store the shader version in struct vsir_program.
2024-01-22 22:18:50 +01:00
