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vkd3d-shader/spirv: Handle the ORD and UNO instructions.
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Notes:
Alexandre Julliard
2024-03-08 23:48:18 +01:00
Approved-by: Giovanni Mascellani (@giomasce) Approved-by: Henri Verbeet (@hverbeet) Approved-by: Alexandre Julliard (@julliard) Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/686
@ -1524,6 +1524,19 @@ static uint32_t vkd3d_spirv_build_op_logical_equal(struct vkd3d_spirv_builder *b
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SpvOpLogicalEqual, result_type, operand0, operand1);
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}
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static uint32_t vkd3d_spirv_build_op_logical_or(struct vkd3d_spirv_builder *builder,
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uint32_t result_type, uint32_t operand0, uint32_t operand1)
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{
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return vkd3d_spirv_build_op_tr2(builder, &builder->function_stream,
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SpvOpLogicalOr, result_type, operand0, operand1);
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}
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static uint32_t vkd3d_spirv_build_op_logical_not(struct vkd3d_spirv_builder *builder,
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uint32_t result_type, uint32_t operand)
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{
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return vkd3d_spirv_build_op_tr1(builder, &builder->function_stream, SpvOpLogicalNot, result_type, operand);
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}
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static uint32_t vkd3d_spirv_build_op_convert_utof(struct vkd3d_spirv_builder *builder,
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uint32_t result_type, uint32_t unsigned_value)
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{
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@ -7686,6 +7699,26 @@ static void spirv_compiler_emit_comparison_instruction(struct spirv_compiler *co
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spirv_compiler_emit_store_reg(compiler, &dst->reg, dst->write_mask, result_id);
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}
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static void spirv_compiler_emit_orderedness_instruction(struct spirv_compiler *compiler,
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const struct vkd3d_shader_instruction *instruction)
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{
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struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
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const struct vkd3d_shader_dst_param *dst = instruction->dst;
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const struct vkd3d_shader_src_param *src = instruction->src;
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uint32_t type_id, src0_id, src1_id, val_id;
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type_id = spirv_compiler_get_type_id_for_dst(compiler, dst);
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src0_id = spirv_compiler_emit_load_src(compiler, &src[0], dst->write_mask);
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src1_id = spirv_compiler_emit_load_src(compiler, &src[1], dst->write_mask);
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/* OpOrdered and OpUnordered are only available in Kernel mode. */
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src0_id = vkd3d_spirv_build_op_is_nan(builder, type_id, src0_id);
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src1_id = vkd3d_spirv_build_op_is_nan(builder, type_id, src1_id);
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val_id = vkd3d_spirv_build_op_logical_or(builder, type_id, src0_id, src1_id);
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if (instruction->handler_idx == VKD3DSIH_ORD)
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val_id = vkd3d_spirv_build_op_logical_not(builder, type_id, val_id);
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spirv_compiler_emit_store_dst(compiler, dst, val_id);
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}
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static uint32_t spirv_compiler_emit_conditional_branch(struct spirv_compiler *compiler,
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const struct vkd3d_shader_instruction *instruction, uint32_t target_block_id)
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{
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@ -9671,6 +9704,10 @@ static int spirv_compiler_handle_instruction(struct spirv_compiler *compiler,
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case VKD3DSIH_ULT:
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spirv_compiler_emit_comparison_instruction(compiler, instruction);
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break;
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case VKD3DSIH_ORD:
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case VKD3DSIH_UNO:
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spirv_compiler_emit_orderedness_instruction(compiler, instruction);
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break;
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case VKD3DSIH_BFI:
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case VKD3DSIH_IBFE:
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case VKD3DSIH_UBFE:
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@ -40,7 +40,7 @@ float4 main() : sv_target
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[test]
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uniform 0 float4 0.0 1.5 1.5 0.0
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todo(sm<4 | sm>=6) draw quad
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todo(sm<4) draw quad
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% SM1-3 apparently treats '0/0' as zero.
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if(sm<4) todo probe all rgba (1010101.0, 11001100.0, 1101001.0, 11.0)
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% SM4-5 optimises away the 'not' by inverting the condition, even though this is invalid for NaN.
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