Feifan He
a7ae6404de
vkd3d-shader/msl: Implement VKD3DSIH_FTOU.
2024-11-27 14:00:51 +01:00
Feifan He
9fd7f4f1ec
vkd3d-shader/msl: Implement VKD3DSIH_UTOF.
2024-11-27 14:00:51 +01:00
Feifan He
ffbade9ed1
vkd3d-shader/msl: Implement VKD3DSIH_FTOI.
2024-11-27 14:00:50 +01:00
Feifan He
16409569fd
vkd3d-shader/msl: Implement VKD3DSIH_ITOF.
2024-11-27 14:00:50 +01:00
Feifan He
71ce43313f
vkd3d-shader/msl: Implement VKD3DSIH_MOVC.
2024-11-25 20:43:13 +01:00
Feifan He
32a507ace6
vkd3d-shader/msl: Implement VKD3DSIH_FRC.
2024-11-25 20:43:13 +01:00
Feifan He
154847c696
vkd3d-shader/msl: Implement VKD3DSIH_GEO.
2024-11-25 20:43:13 +01:00
Feifan He
38d7f8415d
vkd3d-shader/msl: Implement support for VKD3DSPSM_NEG modifiers.
2024-11-25 20:43:13 +01:00
Feifan He
64ea19b7f7
vkd3d-shader/msl: Implement VKD3DSIH_DIV.
2024-11-25 20:43:13 +01:00
Feifan He
b7605f1c34
vkd3d-shader/msl: Implement VKD3DSIH_OR.
2024-11-25 20:43:13 +01:00
Feifan He
f2a32589ea
vkd3d-shader/msl: Implement VKD3DSIH_INE.
2024-11-25 20:43:13 +01:00
Feifan He
a2d56c8bfc
vkd3d-shader/msl: Implement VKD3DSIH_MUL.
2024-11-25 20:43:13 +01:00
Feifan He
fd1beedc07
vkd3d-shader/msl: Implement support for VSIR_DIMENSION_VEC4 immediate constants.
2024-11-23 23:43:42 +01:00
Feifan He
68d7470fc2
vkd3d-shader/msl: Implement VKD3DSIH_NEU.
2024-11-23 23:43:42 +01:00
Feifan He
4add058cd8
vkd3d-shader/msl: Implement support for VKD3DSPSM_ABS modifiers.
2024-11-23 23:43:42 +01:00
Feifan He
5bb7dcaba3
vkd3d-shader/msl: Implement support for VKD3DSPR_IMMCONST registers.
2024-11-23 23:43:42 +01:00
Feifan He
05b9331d0d
vkd3d-shader/msl: Implement VKD3DSIH_ADD.
2024-11-23 23:43:42 +01:00
Francisco Casas
64bc0515e0
vkd3d-shader/hlsl: Add special allocation rules for FFACE and SAMPLE.
2024-11-23 23:13:13 +01:00
Francisco Casas
2c15015ec2
tests: Test allocation rules for FFACE and SAMPLE.
...
These seem to have their own interpolation mode.
2024-11-23 23:10:56 +01:00
Francisco Casas
ad5377f995
vkd3d-shader/hlsl: Add special allocation rules for PRIMID, RTINDEX, and VPINDEX.
...
These system values are bound to the same allocation rules as other
semantics: they can share registers with other semantics with the same
interpolation mode and they prefer forming shorter writemasks. However,
for some reason, these don't allow further semantics to share the same
register once allocated, except among themselves.
2024-11-23 23:10:46 +01:00
Francisco Casas
2c0773c9ad
tests: Test signature reflection for PRIMID, RTINDEX and VPINDEX.
2024-11-23 22:57:23 +01:00
Anna (navi) Figueiredo Gomes
9f3bbab2f0
vkd3d-shader/hlsl: Implement cast from bool to int for SM1.
2024-11-21 19:28:46 +01:00
Shaun Ren
843fc980b5
tests/shader_runner_gl: Implement tessellation support.
2024-11-21 19:27:51 +01:00
Shaun Ren
12ac1dd46b
tests/shader_runner_vulkan: Enable patch list topology support.
2024-11-21 15:11:02 +01:00
Victor Chiletto
3669763835
tests: Add more function overloading tests.
2024-11-21 14:52:17 +01:00
