Nikolay Sivov
9494b72224
vkd3d-shader: Add separate binary target type for effects.
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Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2024-01-11 23:04:48 +01:00
Nikolay Sivov
e527d7c1e7
vkd3d-shader/hlsl: Handle effect group statement.
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Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2024-01-11 23:04:46 +01:00
Nikolay Sivov
f7a02a5da2
vkd3d-shader/hlsl: Add variables for techniques.
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Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2024-01-11 23:04:45 +01:00
Nikolay Sivov
8494342fa0
vkd3d-shader/hlsl: Rename rule for top-level techniques.
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Only technique10 and technique11 types could be nested in groups.
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2024-01-11 23:04:43 +01:00
Nikolay Sivov
c3af1f9989
vkd3d-shader/hlsl: Add 'fxgroup' token.
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Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2024-01-11 23:04:42 +01:00
Giovanni Mascellani
017f86aaaf
vkd3d-shader/d3d-asm: Guess a sensible data type for literals.
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When the typing information is not reliable.
2024-01-11 23:04:34 +01:00
Henri Verbeet
3344c4e93d
vkd3d-shader/hlsl: Store modifier flags as a uint32_t.
2024-01-08 21:45:26 +01:00
Henri Verbeet
fafe2a1dba
vkd3d-shader/hlsl: Store swizzles as a uint32_t.
2024-01-08 21:45:24 +01:00
Giovanni Mascellani
7f9803620f
vkd3d-shader/spirv: Specify behavior for bit field instructions.
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Bit field instructions in SPIR-V do not specify what happens when
offset + count exceeds the type bit width. After this commit we
refine the emitted code's behavior to match TPF.
This fixes a few failures on MoltenVK.
2024-01-08 21:44:52 +01:00
Henri Verbeet
5b9a0dfaea
vkd3d-shader/ir: Store destination parameter shifts as an unsigned int.
2024-01-04 22:23:54 +01:00
Henri Verbeet
4b5d3a078b
vkd3d-shader/ir: Store destination parameter modifier flags as a uint32_t.
2024-01-04 22:23:52 +01:00
Henri Verbeet
60842b7181
vkd3d-shader/ir: Store source parameter swizzles as a uint32_t.
2024-01-04 22:23:51 +01:00
Henri Verbeet
9f4ca3bc9c
vkd3d-shader/ir: Store instruction flags as a uint32_t.
2024-01-04 22:23:49 +01:00
Giovanni Mascellani
bd9118cac4
vkd3d-shader/ir: Validate destination write masks depending on the dimension.
2024-01-04 22:23:25 +01:00
Giovanni Mascellani
15e7711786
vkd3d-shader/ir: Validate source swizzles depending on the dimension.
2024-01-04 22:23:24 +01:00
Giovanni Mascellani
e91da41dea
vkd3d-shader/ir: Validate SSA registers.
2024-01-04 22:23:23 +01:00
Giovanni Mascellani
e29ae1550c
vkd3d-shader/dxil: Create constant buffer registers with dimension vec4.
2024-01-04 22:23:21 +01:00
Giovanni Mascellani
df2ae56de8
vkd3d-shader/d3dbc: Override the write mask when the destination is not vec4.
2024-01-04 22:23:20 +01:00
Zebediah Figura
1ce7e3d8b1
vkd3d-shader/d3dbc: Assign unique register indices for VKD3DSPR_RASTOUT.
2024-01-04 22:23:09 +01:00
Zebediah Figura
3f52fda8ad
vkd3d-shader: Lower shader model 1/2 inter-stage I/O to a flat array.
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An alternative is that we stash the reg_type in the signature, but this seems
far simpler for the backend to deal with.
2024-01-04 22:23:07 +01:00
Giovanni Mascellani
3bafee344d
vkd3d-shader/dxil: Use vkd3d_shader_parser_error() for error reporting when available.
2024-01-03 22:38:26 +01:00
Giovanni Mascellani
a02cd1cf64
vkd3d-shader/dxil: Do not use the parser before it is initialized.
2024-01-03 22:38:24 +01:00
Conor McCarthy
111818eabb
vkd3d-shader/dxil: Pre-allocate instruction space for globals in sm6_parser_globals_init().
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For simplicity, declaration handlers assume instruction allocation will
not fail.
2024-01-03 22:38:21 +01:00
Conor McCarthy
8aa6e2228e
vkd3d-shader/dxil: Count global variables in dxil_block_compute_module_decl_count().
2024-01-03 22:38:19 +01:00
Henri Verbeet
ed4f3f3272
vkd3d-shader/ir: Rename the "immconst_double" field of struct vkd3d_shader_register to "immconst_f64".
2024-01-03 22:37:49 +01:00
