63 Commits

Author SHA1 Message Date
Francisco Casas
7e75ac63a1 vkd3d-shader/d3dbc: Emit fixme for HLSL_RESOURCE_SAMPLE_LOD.
Currently, HLSL_RESOURCE_SAMPLE_LOD is not implemented for d3dbc,
but we are incorrectly writting a texld instruction to handle it.
This causes SM1 tests with the vulkan backend (in following patches)
to fail if VKD3D_SHADER_CONFIG="force_validation" is enabled.

For now a fixme is emited in these cases.
2024-01-24 22:37:38 +01:00
Henri Verbeet
adc02eada8 vkd3d-shader/ir: Store the temporary register count in struct vsir_program. 2024-01-22 22:18:53 +01:00
Henri Verbeet
23dcd4f22b vkd3d-shader/ir: Store the shader version in struct vsir_program. 2024-01-22 22:18:50 +01:00
Henri Verbeet
fc9043be3c vkd3d-shader/ir: Introduce struct vsir_program. 2024-01-22 22:18:48 +01:00
Henri Verbeet
f69c8b1cc4 vkd3d-shader/d3dbc: Store the "offset" field as an unsigned int in hlsl_sm1_register_from_semantic(). 2024-01-18 23:16:06 +01:00
Giovanni Mascellani
38fdf24002 vkd3d-shader: Make relative address sources mutable too.
They were forgotten in 78d95889bd49c6028f0c26aaec5589786381da4a.

Fixes: 78d95889bd49c6028f0c26aaec5589786381da4a
2024-01-18 23:15:35 +01:00
Giovanni Mascellani
7503429555 vkd3d-shader/ir: Check that TEMP registers have consistent dimensions. 2024-01-15 19:56:59 +01:00
Giovanni Mascellani
df2ae56de8 vkd3d-shader/d3dbc: Override the write mask when the destination is not vec4. 2024-01-04 22:23:20 +01:00
Zebediah Figura
1ce7e3d8b1 vkd3d-shader/d3dbc: Assign unique register indices for VKD3DSPR_RASTOUT. 2024-01-04 22:23:09 +01:00
Zebediah Figura
3f52fda8ad vkd3d-shader: Lower shader model 1/2 inter-stage I/O to a flat array.
An alternative is that we stash the reg_type in the signature, but this seems
far simpler for the backend to deal with.
2024-01-04 22:23:07 +01:00
Henri Verbeet
e33d3b3954 vkd3d-shader/ir: Rename the "immconst_uint" field of struct vkd3d_shader_register to "immconst_u32".
For consistency with the rest of vkd3d-shader; e.g. put_u32() and
read_u32().
2024-01-03 22:37:39 +01:00
Henri Verbeet
8a1de71fb1 vkd3d-shader/ir: Pass a uint32_t swizzle to vkd3d_swizzle_get_component(). 2023-12-14 23:19:49 +01:00
Zebediah Figura
ca8492c855 vkd3d-shader/d3dbc: Avoid shadowing "instr" in write_sm1_jump(). 2023-12-07 21:57:28 +01:00
Henri Verbeet
73c563ffb7 vkd3d-shader/d3dbc: Adjust the token count for DEF and DEFI instructions in shader_sm1_skip_opcode().
This was broken by commit e390bc35e2c9b0a2110370f916033eea2366317e; that
commit fixed the source count for these instructions, but didn't adjust
shader_sm1_skip_opcode(). Note that this only affects shader model 1;
later versions have a token count embedded in the initial opcode token.
2023-11-20 22:07:29 +01:00
Nikolay Sivov
dd6a9135f4 vkd3d-shader/hlsl: Implement tex2Dproj().
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2023-11-10 20:23:41 +01:00
Nikolay Sivov
76e42fbd21 vkd3d-shader/hlsl: Implement ternary operator for SM1.
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2023-11-08 22:49:31 +01:00
Giovanni Mascellani
2ba8c5771c vkd3d-shader: Deduplicate profile version comparison functions. 2023-11-02 18:22:35 +01:00
Zebediah Figura
6b7834d635 vkd3d-shader/d3dbc: Set the interpolation mode for signature elements. 2023-10-31 21:59:36 +01:00
Francisco Casas
38a7309758 vkd3d-shader/d3dbc: Use D3DSIO_TEXKILL instead of VKD3D_SM1_OP_TEXKILL (clangd). 2023-10-12 23:27:24 +02:00
Francisco Casas
74d79c7e45 vkd3d-shader/d3dbc: Initialize register dimension for all register types. 2023-09-26 22:07:06 +02:00
Francisco Casas
e904660497 vkd3d-shader: Turn vkd3d_shader_register.immconst_type into vkd3d_shader_register.dimension. 2023-09-26 22:07:04 +02:00
Francisco Casas
dc35125d73 vkd3d-shader/tpf: Use vsir_register_init() in shader_sm1_parse_dst_param(). 2023-09-26 22:07:03 +02:00
Francisco Casas
51aa5a45e9 vkd3d-shader/tpf: Use vsir_register_init() in shader_sm1_parse_src_param(). 2023-09-26 22:07:02 +02:00
Giovanni Mascellani
c052cd8998 vkd3d-shader/ir: Introduce a boilerplate to validate the generated IR.
For the moment the validator is trivial, it never fails. Checks will
be added incrementally.
2023-09-22 11:06:13 +02:00
Giovanni Mascellani
cf871d2cb2 vkd3d-shader: Embed the parsing location in vkd3d_shader_instruction.
So that it can be used for printing meaningful error locations by
downstream processors.
2023-09-22 11:06:12 +02:00