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197 Commits

Author SHA1 Message Date
Giovanni Mascellani
500b61c383 tests: Test how constant folding works on SM1. 2024-02-26 23:04:08 +01:00
Conor McCarthy
c083b1d0fc vkd3d-shader/dxil: Implement DX intrinsic GetDimensions. 2024-02-26 23:03:48 +01:00
Conor McCarthy
2330ffdeda vkd3d-shader/dxil: Implement DX intrinsics SampleBias and SampleLevel. 2024-02-22 22:45:34 +01:00
Conor McCarthy
cab8b781ab vkd3d-shader/dxil: Handle raw and structured buffers in sm6_parser_emit_dx_buffer_store(). 2024-02-22 22:45:07 +01:00
Conor McCarthy
ce1875c435 vkd3d-shader/dxil: Implement DX intrinsic BufferStore. 2024-02-22 22:45:06 +01:00
Conor McCarthy
b447a725ec tests/shader-runner: Add a test for a signed int structured buffer UAV. 
Check for backend type mismatches resulting from the absence of
signedness in SM 6.
 2024-02-22 22:45:05 +01:00
Conor McCarthy
9180ea6591 tests/shader-runner: Add a test for a signed int typed buffer UAV. 
Check for backend type mismatches resulting from the absence of
signedness in SM 6.
 2024-02-22 22:45:04 +01:00
Conor McCarthy
081c9dbc96 tests/shader-runner: Support structured buffer UAVs. 2024-02-22 22:45:02 +01:00
Petrichor Park
02a3667822 vkd3d-shader/hlsl: Implement atan and atan2. 
Also narrows some more todos on the tests.
 2024-02-21 23:23:13 +01:00
Petrichor Park
69294c290b vkd3d-shader/hlsl: Implement acos and asin trig intrinsics. 
Tests have already been implemented in 92044d5e; this commit also reduces
the scope of some of the todos (because now they're implemented!).

Wine-Bug: https://bugs.winehq.org/show_bug.cgi?id=55154
 2024-02-21 23:23:11 +01:00
Conor McCarthy
96a0685ba6 vkd3d-shader/dxil: Implement DX intrinsic AtomicCompareExchange. 2024-02-20 22:50:16 +01:00
Conor McCarthy
560c9413c3 vkd3d-shader/dxil: Implement DX intrinsic AtomicBinOp. 2024-02-20 22:50:15 +01:00
Conor McCarthy
3906c12476 tests/shader-runner: Add tests for UAV atomic ops. 2024-02-20 22:50:13 +01:00
Evan Tang
7b41abaa1b vkd3d-shader/hlsl: Support SV_PrimitiveID in pixel shaders. 2024-02-19 21:12:23 +01:00
Francisco Casas
8df34fce62 vkd3d-shader/hlsl: Emit fixme on non-direct resource stores. 
Co-authored-by: Giovanni Mascellani <gmascellani@codeweavers.com>

These may happen when storing to structured buffers, and we are not
handling them properly yet. The included test reaches unreacheable code
before this patch.

Storing to buffers is complicated since we need to split the index
chain in two paths:
- The path within the variable where the resource is.
- The subpath to the part of the resource element that is being stored
  to.

For now, we will emit a fixme when the index chain in the lhs is not a
direct resource access.
 2024-02-19 21:12:14 +01:00
Francisco Casas
c249461e97 vkd3d-shader/hlsl: Parse Buffer types. 2024-02-19 21:11:55 +01:00
Francisco Casas
4fe9ab0a90 tests/shader-runner: Change probe directive syntax on shader_test files. 
For consistency with the previous commit.
 2024-02-19 21:11:53 +01:00
Francisco Casas
b08be04465 tests/shader-runner: Change resource declaration syntax on shader_test files. 
On shader_test files, now resources should be declared this way:

    [texture n]       -> [srv n]
    [srv buffer n]    -> [srv n]
    [uav n]           -> [uav n]
    [uav buffer n]    -> [uav n]
    [vertex buffer n] -> [vb n]
    [render target n] -> [rtv n]

The dimension (buffer or 2D) is now specified as an additional parameter
in the "size" directive:

  For 2D resources:
  size (n, m)         -> size (2d, n, m)

  For buffers:
  size (n, 1)         -> size (buffer, n)
 2024-02-19 21:11:52 +01:00
Francisco Casas
4d855611b7 tests/shader-runner: Support SRV buffers. 2024-02-19 21:11:51 +01:00
Evan Tang
ee867bd470 vkd3d-shader/hlsl: Parse rasteriser-ordered view types. 2024-02-15 23:29:46 +01:00
Francisco Casas
e3ed5ac77e vkd3d-shader/hlsl: Lower casts to int for SM1. 2024-02-15 23:29:39 +01:00
Francisco Casas
e62bd1927e tests: Add simple test for implicit cast to int. 2024-02-15 23:29:39 +01:00
Francisco Casas
4b5c7e3721 vkd3d-shader/d3dbc: Implement casts from ints to floats as a MOV. 
For temporary registers, SM1-SM3 integer types are internally
represented as floating point, so, in order to perform a cast
from ints to floats we need a mere MOV.

For constant integer registers "iN" there is no operation for casting
from a floating point register to them. For address registers "aN", and
the loop counting register "aL", vertex shaders have the "mova" operation
but we haven't used these registers in any way yet.

We probably would want to introduce these as synthetic variables
allocated in a special register set. In that case we have to remember to
use MOVA instead of MOV in the store operations, but they shouldn't be src
or dst of CAST operations.

Regarding constant integer registers, in some shaders, constants are
expected to be received formatted as an integer, such as:

    int m;
    float4 main() : sv_target
    {
        float4 res = {0, 0, 0, 0};

        for (int k = 0; k < m; ++k)
            res += k;
        return res;
    }

which compiles as:

    // Registers:
    //
    //   Name         Reg   Size
    //   ------------ ----- ----
    //   m            i0       1
    //

    ps_3_0
    def c0, 0, 1, 0, 0
    mov r0, c0.x
    mov r1.x, c0.x
    rep i0
      add r0, r0, r1.x
      add r1.x, r1.x, c0.y
    endrep
    mov oC0, r0

but this only happens if the integer constant is used directly in an
instruction that needs it, and as I said there is no instruction that
allows converting them to a float representation.

Notice how a more complex shader, that performs operations with this
integer variable "m":

    int m;
    float4 main() : sv_target
    {
        float4 res = {0, 0, 0, 0};

        for (int k = 0; k < m * m; ++k)
            res += k;
        return res;
    }

gives the following output:

    // Registers:
    //
    //   Name         Reg   Size
    //   ------------ ----- ----
    //   m            c0       1
    //

    ps_3_0
    def c1, 0, 0, 1, 0
    defi i0, 255, 0, 0, 0
    mul r0.x, c0.x, c0.x
    mov r1, c1.y
    mov r0.y, c1.y
    rep i0
      mov r0.z, r0.x
      break_ge r0.y, r0.z
      add r1, r0.y, r1
      add r0.y, r0.y, c1.z
    endrep
    mov oC0, r1

Meaning that the uniform "m" is just stored as a floating point in
"c0", the constant integer register "i0" is just set to 255 (hoping
it is a high enough value) using "defi", and the "break_ge"
involving c0 is used to break from the loop.

We could potentially use this approach to implement loops from SM3
without expecting the variables being received as constant integer
registers.

According to the D3D documentation, for SM1-SM3 constant integer
registers are only used by the 'loop' and 'rep' instructions.
 2024-02-15 23:29:37 +01:00
Evan Tang
628acb6b96 tests: Add some tests for rasteriser-ordered views. 2024-02-14 21:48:53 +01:00
Conor McCarthy
7d51a7d99c tests/shader-runner: Add a 64-bit switch test. 2024-02-14 21:48:44 +01:00