Commit Graph

2621 Commits

Author SHA1 Message Date
Giovanni Mascellani
eaabd2ffd7 vkd3d-shader/msl: Allow binding to descriptor arrays.
This requires merging adjacent bindings in the Metal shader runner,
mostly like 805a4bc1e8 did for the
d3d12 backend.
2025-10-30 17:53:10 +01:00
Giovanni Mascellani
82619e81c3 tests/shader_runner_metal: Unify the UAV and TEXTURE cases when computing descriptor bindings. 2025-10-30 17:52:28 +01:00
Shaun Ren
59b87c769a vkd3d-shader/hlsl: Flatten conditional blocks containing discard_neg instructions.
For any `discard_neg c` instruction in a conditional block, we replace c with
    cond ? c : 0    in a then block,
and
    cond ? 0 : c    in an else block.
2025-10-30 17:46:12 +01:00
Shaun Ren
787d49d6d8 vkd3d-shader/hlsl: Flatten conditional blocks containing discard_nz instructions.
For any `discard_nz c` instruction in a conditional block, we replace c with
    (cond && c)     in a then block,
and
    (!cond && c)    in an else block.
2025-10-30 17:46:12 +01:00
Shaun Ren
4d5a1528ab vkd3d-shader/hlsl: Flatten conditional branches containing stores.
For an if block

    if (cond)
    {
        <then_block>
    }
    else
    {
        <else_block>
    }

We flatten it by first replacing any store instruction `v[[k]] = x`
in the then_block with the following:

    1: load(v[[k]])
    2: cond ? x : @1
    3: v[[k]] = @2

Similarly, we replace any store instruction `v[[k]] = x` in the
else_block with the following:

    1: load(v[[k]])
    2: cond ? @1 : x
    3: v[[k]] = @2

Then we can concatenate <then_block> and <else_block> together and
get rid of the if block.
2025-10-30 17:46:12 +01:00
Shaun Ren
200e66ba4f vkd3d-shader/hlsl: Store the flatten type in struct hlsl_ir_if. 2025-10-30 17:46:12 +01:00
Shaun Ren
2ba53e06fa tests/hlsl: Add some conditional flattening tests. 2025-10-30 17:46:04 +01:00
Francisco Casas
32b622d7a5 vkd3d-shader/dxil: Also map destination write masks for system values.
Currently, on what we consider normalized vsir, destination write masks
are not relative to the signature element's mask, even though source
swizzles are. Also for most instructions, the source swizzles are masked
by the destination write mask, as given by vsir_src_is_masked().

The DXIL parser however, is not derelativizing the destination write
masks for system value signature elements, so we fix that to make it
consistent with how other front-ends are handled.

For instance, when the test introduced in commit
ca5bc63e5e is compiled to DXIL using DXC,
and then parsed using vkd3d-compiler, we get the following store
instructions:

    vs_6_0
    .input
    .param POSITION.xyzw, v0.xyzw, float
    .output
    .param SV_Position.xyzw, o0.xyzw, float, POS
    .param SV_CullDistance.x, o1.x, float, CULLDST
    .param SV_ClipDistance.y, o1.y, float, CLIPDST
    .descriptors
    .text
    label l1
        ...
        mov o1.x <v4:f32>, sr1 <s:f32>
        mov o2.x <v4:f32>, sr2 <s:f32> // Note the .x write mask!
        ret

whereas, when compiling using FXC and parsing the TPF using
vkd3d-compiler we get:

    vs_4_0
    .input
    .param POSITION.xyzw, v0.xyzw, float
    .output
    .param SV_POSITION.xyzw, o0.xyzw, float, POS
    .param SV_CULLDISTANCE.x, o1.x, float, CULLDST
    .param SV_CLIPDISTANCE.y, o1.y, float, CLIPDST
    .descriptors
    .text
    label l1
        mov o0.xyzw <v4:f32>, v0.xyzw <v4:f32>
        mov o1.x <v4:f32>, v0.x <v4:f32>
        mov o2.y <v4:f32>, v0.y <v4:f32> // Note the .y write mask.
        ret

This only really matters for cases where we have a system value semantic
whose mask doesn't start at .x, which is very rare. For instance, it
requires the clip/cull distance combo, which share registers, so one of
them pushes the other to start on another component.

According to the tests, the only thing relying on this behaviour is the
handling of private variables for system value semantics on the SPIR-V
backend, which expects destination write masks as if the element started
at .x even though it might not. This is modified then.
2025-10-29 13:14:54 +01:00
Francisco Casas
bc63aaf52d tests/shader_runner_gl: Enable used GL_CLIP_DISTANCEs.
Here I am just printing a trace message on the rare situation where
GL_MAX_CLIP_DISTANCES is less than we need.

The maximum in Direct3D is given by D3D#_CLIP_OR_CULL_DISTANCE_COUNT which
is 8, which seems expectable here.

Alternatively we could add a clip-distance capability and only enable
it if gl_maxClipDistances is >= 8.

Another potential problem is that OpenGL expects the gl_ClipDistance[]
array to be the same size on every shader it is declared, which is a
restriction I am not sure Direct3D has with its SV_ClipDistance
components.

Co-authored-by: Anna (navi) Figueiredo Gomes <agomes@codeweavers.com>
2025-10-29 13:13:44 +01:00
Francisco Casas
ca5bc63e5e tests/hlsl: Add a simpler clip/cull distance test. 2025-10-29 12:26:33 +01:00
Francisco Casas
cb7dac4d65 tests/shader_runner: Introduce a "cull-distance" capability. 2025-10-29 12:24:50 +01:00
Giovanni Mascellani
d3f658d410 tests/hlsl: Skip a tessellation test that is buggy on WARP with SM>=6. 2025-10-28 16:51:20 +01:00
Giovanni Mascellani
84c4a4f835 tests/hlsl: Do not test overflowing a float-to-half typed buffer read.
Native implementations do not behave consistently.
2025-10-28 16:48:21 +01:00
Giovanni Mascellani
dedb14e55e tests/hlsl: Tweak hyperbolic functions tests on WARP.
WARP seems to be completely off for large argument values. The
difference quickly becomes of order of magnitudes, not ULPs. So
we ensure we test hyperbolic functions mostly for small arguments,
and skip WARP for large arguments.
2025-10-27 19:01:09 +01:00
Giovanni Mascellani
ca81ffe088 tests/hlsl: Add SM6 behaviour in sm1-const-folding.shader_test.
Which fortunately looks saner than previous shader models.
2025-10-27 19:01:00 +01:00
Giovanni Mascellani
f72307fc9f tests/hlsl: Evaluate asin() with larger error tolerance on SM6.
It currently fails with WARP.
2025-10-27 18:59:13 +01:00
Giovanni Mascellani
85a1fb6e47 tests/hlsl: Use explicit infinities in half.shader_test.
We used to need workarounds when we used scanf() to parse float
numbers, but now we use strtof() which supports "inf" properly.
On the other hand, on some platforms it is the workaround that
now fails with a range error.
2025-10-27 18:57:37 +01:00
Giovanni Mascellani
2b68f488f4 tests/hlsl: Do not test some details of float-to-half conversion.
Native implementations do not behave consistently.
2025-10-27 18:55:58 +01:00
Giovanni Mascellani
303790875b tests/hlsl: Use explicit infinities in cast-to-half.shader_test.
We used to need workarounds when we used scanf() to parse float
numbers, but now we use strtof() which supports "inf" properly.
On the other hand, on some platforms it is the workaround that
now fails with a range error.
2025-10-27 18:53:38 +01:00
Elizabeth Figura
6633c220b7 tests: Add bump mapping tests. 2025-10-27 18:41:26 +01:00
Elizabeth Figura
6b5fe9daaf tests: Set tags in the d3d9 runner. 2025-10-27 18:23:25 +01:00
Elizabeth Figura
27e87ff0f3 tests: Allow RTV -> SRV blits in the d3d9 runner. 2025-10-27 18:23:25 +01:00
Shaun Ren
b5e2e1dd06 vkd3d-shader/ir: Determine the correct writemask for destinations with fixed masks. 2025-10-16 14:27:29 +02:00
Shaun Ren
e5081a1bf9 tests/shader_runner: Add a "compile shader model" require directive.
This directive requires specific shader models to be tested for
compilation, bypassing the default behaviour where only one version from
each shader model set (SM1-3, SM4-5, SM6) is compiled.
2025-10-16 14:26:47 +02:00
Giovanni Mascellani
a7e56beb19 ci: Run the Windows tests with WARP version 1.0.16.1.
Many tests fail or even segfault with the older WARP version
provided by the current CI Windows environment.
2025-10-16 14:25:07 +02:00