Conor McCarthy
68b31b7396
vkd3d-shader/spirv: Handle the sequentially consistent ordering flag for atomic instructions.
2024-03-27 22:37:01 +01:00
Conor McCarthy
a8dd788f41
vkd3d-shader/spirv: Emit a warning if the atomic instruction volatile flag is unhandled.
2024-03-27 22:37:00 +01:00
Conor McCarthy
47e56cdfed
vkd3d-shader/spirv: Support 64-bit register info component type in spirv_compiler_emit_load_reg().
...
For 64-bit indexable temps (and any other 64-bit declarations) the write
mask must not be converted.
2024-03-27 22:36:55 +01:00
Conor McCarthy
83a67366da
vkd3d-shader/spirv: Do not assert if a TGSM store data register is not UINT.
2024-03-27 22:36:54 +01:00
Conor McCarthy
9da375414e
vkd3d-shader/spirv: Do not assert if a TGSM load dst register is not UINT.
2024-03-27 22:36:52 +01:00
Henri Verbeet
5de5f241a6
vkd3d-shader/ir: Pass a struct vsir_program to vkd3d_shader_normalise().
2024-03-19 22:57:56 +01:00
Conor McCarthy
421d311a49
vkd3d-shader/spirv: Use dst register data type in spirv_compiler_emit_imad().
2024-03-18 23:07:36 +01:00
Conor McCarthy
b22632ff1a
vkd3d-shader/spirv: Emit a trace message if TGSM alignment is ignored.
...
This would cause a lot of warning spam if it was a warning.
2024-03-14 22:48:45 +01:00
Conor McCarthy
6dd54eeb09
vkd3d-shader/spirv: Support zero-initialisation for workgroup memory.
2024-03-14 22:48:41 +01:00
Conor McCarthy
0dc174ebd7
vkd3d-shader/spirv: Emit an error if a FIRSTBIT instruction has a 64-bit source.
2024-03-13 21:50:37 +01:00
Conor McCarthy
a64eb75c1d
vkd3d-shader/spirv: Emit an error if COUNTBITS has a 64-bit source.
2024-03-13 21:50:36 +01:00
Conor McCarthy
066ea75945
vkd3d-shader/spirv: Introduce HALF and UINT16 types for minimum precision.
...
Minimum precision types must always be implemented as 32-bit to match how
reduced precision works in SPIR-V.
2024-03-11 22:10:05 +01:00
Conor McCarthy
58123c2e10
vkd3d-shader/spirv: Introduce a data_type_is_floating_point() helper function.
2024-03-11 22:10:03 +01:00
Zebediah Figura
ad495970e0
vkd3d-shader/spirv: Implement SLT and SGE.
2024-03-11 22:09:48 +01:00
Zebediah Figura
27196d8b0f
vkd3d-shader/spirv: Implement CMP.
2024-03-11 22:09:44 +01:00
Giovanni Mascellani
470d83a9da
vkd3d-shader: Move shader signatures to vsir_program.
2024-03-11 22:09:31 +01:00
Evan Tang
4553b2a0dc
vkd3d-shader/spirv: Implement support for rasteriser-ordered views.
...
Using SPV_EXT_fragment_shader_interlock.
2024-03-08 23:36:35 +01:00
Conor McCarthy
e65055b435
vkd3d-shader/spirv: Handle the ORD and UNO instructions.
2024-03-08 23:36:14 +01:00
Conor McCarthy
5082893e5d
vkd3d-shader/spirv: Always use a 64-bit write mask for IMMCONST64 src params.
...
There is no way to tell in spirv_compiler_emit_load_reg() if the write
mask is 64-bit. All loads are 32-bit except for IMMCONST64 and SSA, and
the latter ignores the mask, so the only issue lies with IMMCONST64.
2024-03-06 23:04:12 +01:00
Henri Verbeet
f866fb95ad
Release 1.11.
2024-03-05 20:39:45 +01:00
Conor McCarthy
625e289574
vkd3d-shader/dxil: Handle hyperbolic trigonometric functions in sm6_parser_emit_dx_unary().
2024-02-07 22:59:23 +01:00
Conor McCarthy
7f87a3e5fc
vkd3d-shader/spirv: Handle the ACOS, ASIN and ATAN instructions in spirv_compiler_emit_ext_glsl_instruction().
2024-02-06 23:09:55 +01:00
Giovanni Mascellani
eb723a8d2b
vkd3d-shader/spirv: Support bool TEMP registers.
2024-02-06 23:06:58 +01:00
Giovanni Mascellani
49f0fd42b8
vkd3d-shader/spirv: Move bool casting helpers above register loading helpers.
2024-02-06 23:06:55 +01:00
Giovanni Mascellani
ee994e95dd
vkd3d-shader/spirv: Convert the swizzle according to the source bit width.
...
Fixes: 1f536238a89dc6bccb411c2db32d7b2010cc8fd7
2024-02-06 23:06:53 +01:00
