Commit Graph

67 Commits

Author SHA1 Message Date
Conor McCarthy
a4ed06bc5b vkd3d-shader/d3d-asm: Recognise the 'rasteriser ordered view' UAV flag. 2023-10-18 20:58:27 +02:00
Conor McCarthy
06f8a88466 vkd3d-shader: Define more global flags. 2023-10-17 22:18:23 +02:00
Conor McCarthy
df4e1b7393 vkd3d-shader/dxil: Read immediate constant arrays. 2023-10-11 22:21:19 +02:00
Zebediah Figura
2bcd6ea893 vkd3d-shader: Introduce a separate register type for combined samplers. 2023-10-09 21:58:38 +02:00
Henri Verbeet
98d158d004 vkd3d-shader/tpf: Get rid of the output map.
Map output registers in the backend instead, as needed.
2023-10-09 21:57:46 +02:00
Francisco Casas
123e399b89 vkd3d-shader/d3d-asm: Don't print offset for DEPTHOUT registers.
This register is unique and thus is not accompanied with an offset in
the native disassembler output.
2023-09-27 22:34:48 +02:00
Francisco Casas
ef1567c17b vkd3d-shader/d3d-asm: Use vkd3d_shader_register.dimension to know when to dump writemask.
This change ensures that we don't dump the writemask for registers that
have a scalar dimension.

For instance, for this shader:

    float r;

    float4 main(out float d : DEPTH) : sv_target
    {
        d = r;
        return 0;
    }

we now correctly dump

    dcl_output oDepth

instead of

    dcl_output oDepth.x
2023-09-27 22:34:47 +02:00
Francisco Casas
a358722f71 vkd3d-shader/d3d-asm: Use vkd3d_shader_register.dimension to know when to dump swizzle.
The assumption that sampler registers never have a swizzle is not
totally correct.

For instance, for the following shader:

    Texture2D tex;
    sampler sam;

    float4 main() : sv_target
    {
        return tex.GatherGreen(sam, float2(0, 0));
    }

the gather instruction is being disassembled as

  gather4_indexable(texture2d) o0.xyzw, l(0.0, 0.0, 0.0, 0.0), t0.xyzw, s0

instead of

  gather4_indexable(texture2d)(float,float,float,float) o0.xyzw, l(0.0, 0.0, 0.0, 0.0), t0.xyzw, s0.y

(notice the missing swizzle in the last parameter s0).

This is because the Gather instructions give the sampler register a vec4
dimension (and scalar swizzle type) to indicate the channel for the
gather operation.

The solution is using the new vkd3d_shader_register.dimension instead of
checking the swizzle type.
2023-09-27 22:34:46 +02:00
Francisco Casas
e904660497 vkd3d-shader: Turn vkd3d_shader_register.immconst_type into vkd3d_shader_register.dimension. 2023-09-26 22:07:04 +02:00
Conor McCarthy
3249723972 vkd3d-shader/spirv: Introduce a Static Single Assignment register type. 2023-09-25 22:07:04 +02:00
Conor McCarthy
a67a85989f vkd3d-shader/d3d-asm: Trace undefined registers. 2023-09-25 22:07:02 +02:00
Giovanni Mascellani
603170106c vkd3d-shader/ir: Validate destination parameters. 2023-09-22 11:06:17 +02:00
Nikolay Sivov
45541dd9b2 vkd3d-shader/asm: Tweak TEXCOORD declaration name.
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2023-09-13 23:11:16 +02:00
Nikolay Sivov
69f32796b0 vkd3d-shader: Unify static string arrays initialization pattern. 2023-06-28 21:40:21 +02:00
Nikolay Sivov
ccad49d486 vkd3d-shader/d3d-asm: Fix 3D sampler declaration instruction name. 2023-06-05 22:27:33 +02:00
Nikolay Sivov
44a90f5d41 vkd3d-shader: Fix dcl_uav_typed_* formatting.
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2023-05-22 22:03:24 +02:00
Henri Verbeet
3f8aa0e272 vkd3d-shader/d3d-asm: Rename trace.c to d3d_asm.c. 2023-05-02 20:45:33 +02:00