135 Commits

Author SHA1 Message Date
Giovanni Mascellani
b940d79aa8 vkd3d-shader/ir: Keep loops contiguous in the topological sort. 2024-03-08 23:35:48 +01:00
Giovanni Mascellani
cf9a023566 vkd3d-shader/ir: Dump the topological order of the control flow graph. 2024-03-08 23:35:47 +01:00
Giovanni Mascellani
ed40646c8a vkd3d-shader/ir: Topologically sort the control flow graph. 2024-03-08 23:35:46 +01:00
Giovanni Mascellani
880d781b57 vkd3d-shader/ir: Allow adding to a block list without checking for duplicates. 2024-03-08 23:35:45 +01:00
Giovanni Mascellani
8723b5d266 vkd3d-shader/ir: Sort each loop by block label. 2024-03-07 23:08:36 +01:00
Giovanni Mascellani
3d4092d9dc vkd3d-shader/ir: Dump the loops in the control flow graph. 2024-03-07 23:08:35 +01:00
Giovanni Mascellani
8241ca2b67 vkd3d-shader/ir: Keep track of loops by header block. 2024-03-07 23:08:34 +01:00
Giovanni Mascellani
088a6c49a2 vkd3d-shader/ir: Keep a reference to the message context inside struct vsir_cfg. 2024-03-07 23:08:33 +01:00
Giovanni Mascellani
9ac842b36b vkd3d-shader/ir: Compute the loops in the control flow graph. 2024-03-07 23:08:32 +01:00
Giovanni Mascellani
de15f55477 vkd3d-shader/ir: Introduce a helper to express block domination. 2024-03-07 23:08:31 +01:00
Giovanni Mascellani
c3657c4799 vkd3d-shader/ir: Add a debug buffer to struct vsir_cfg. 2024-03-07 23:08:30 +01:00
Giovanni Mascellani
c5893288d9 vkd3d-shader/ir: Properly handle function-local indexable temps when flattening control flow.
They have to be considered code rather than declarations, as required
for instance by the SPIR-V backend.
2024-03-07 23:08:28 +01:00
Giovanni Mascellani
9c678532a7 vkd3d-shader/ir: Dump the domination relationship. 2024-02-22 22:45:16 +01:00
Giovanni Mascellani
04c2852c1a vkd3d-shader/ir: Compute the domination relationship. 2024-02-22 22:45:15 +01:00
Giovanni Mascellani
2573d86ccf vkd3d-shader/ir: Dump the control flow graph in the GraphViz format. 2024-02-22 22:45:14 +01:00
Giovanni Mascellani
da037b61ba vkd3d-shader/ir: Build a representation of the control flow graph. 2024-02-22 22:45:13 +01:00
Giovanni Mascellani
51f13391e6 vkd3d-shader/ir: Introduce a simple control flow graph structurizer.
The structurizer is implemented along the lines of what is usually called
the "structured program theorem": the control flow is completely
virtualized by mean of an additional TEMP register which stores the
block index which is currently running. The whole program is then
converted to a huge switch construction enclosed in a loop, executing
at each iteration the appropriate block and updating the register
depending on block jump instruction.

The algorithm's generality is also its major weakness: it accepts any
input program, even if its CFG is not reducible, but the output
program lacks any useful convergence information. It satisfies the
letter of the SPIR-V requirements, but it is expected that it will
be very inefficient to run on a GPU (unless a downstream compiler is
able to devirtualize the control flow and do a proper convergence
analysis pass). The algorithm is however very simple, and good enough
to at least pass tests, enabling further development. A better
alternative is expected to be upstreamed incrementally.

Side note: the structured program theorem is often called the
Böhm-Jacopini theorem; Böhm and Jacopini did indeed prove a variation
of it, but their algorithm is different from what is commontly attributed
to them and implemented here, so I opted for not using their name.
2024-02-06 23:07:07 +01:00
Giovanni Mascellani
19aef21369 vkd3d-shader/ir: Handle PHI nodes when materializing SSA registers.
PHI nodes cannot be used with TEMP registers, so they have to be
converted to MOV/MOVC nodes and moved before the BRANCH node.
2024-02-06 23:07:03 +01:00
Giovanni Mascellani
e0d3e9c376 vkd3d-shader/ir: Materialize SSA registers to temporaries.
For simplicity PHI nodes are not currently handled.

The goal for this pass is to make the CFG structurizer simpler, because
it doesn't have to care about the more rigid rules SSA registers have
to satisfy than TEMP registers.

It is likely that the generated code will be harder for downstream
compilers to optimize and execute efficiently, so once a complete
structurizer is in place this pass should be removed, or at least
greatly reduced in scope.
2024-02-06 23:07:00 +01:00
Henri Verbeet
d38221bd68 vkd3d-shader/ir: Pass a struct vsir_program to shader_parser_get_src_params(). 2024-02-01 00:08:23 +01:00
Henri Verbeet
47ec24ebad vkd3d-shader/ir: Pass a struct vsir_program to shader_parser_get_dst_params(). 2024-02-01 00:08:22 +01:00
Giovanni Mascellani
edc406d297 vkd3d-shader/ir: Check that SSA registers are used with compatible data types.
Specifically, accesses are always 32 bit or always 64 bit.
2024-01-29 22:33:34 +01:00
Giovanni Mascellani
026c502f31 vkd3d-shader/ir: Fixup PHI nodes when lowering switches to selection ladders.
A map between the blocks before and after the pass is built and then
used to fix the PHI nodes.
2024-01-29 22:33:17 +01:00
Giovanni Mascellani
378109051c vkd3d-shader/ir: Lower monolithic switches to selection ladders.
PHI nodes must be fixed up after this pass, because the block references
might have become broken. For simplicitly this is not handled yet.

The goal for this pass is to make the CFG structurizer simpler, because
only conditional and unconditional branches must be supported.
Eventually this limitation might be lifted if there is advantage in
doing so.
2024-01-29 22:33:15 +01:00
Francisco Casas
cec45da45b vkd3d-shader/ir: Update flatten_control_flow_constructs() comment. 2024-01-25 22:24:27 +01:00