4521 Commits

Author SHA1 Message Date
Conor McCarthy
529c0f46b0 include: Add a D3D12_RT_FORMAT_ARRAY typedef.
For consistency with how other D3D12_* structs are declared.
2023-11-15 21:48:41 +01:00
Conor McCarthy
fb588b8d1a vkd3d-shader/spirv: Avoid invalid bool-to-bool conversion in spirv_compiler_emit_movc().
Shaders parsed from DXIL contain a bool condition register, so calling
spirv_compiler_emit_int_to_bool() results in an invalid bool/uint
comparison.
2023-11-15 21:48:36 +01:00
Conor McCarthy
3c4631a4d4 vkd3d-shader/dxil: Implement the DXIL VSELECT instruction. 2023-11-15 21:48:35 +01:00
Conor McCarthy
130e7bdf0f tests/shader-runner: Add tests for 64-bit casts. 2023-11-15 21:48:33 +01:00
Conor McCarthy
08b8730866 vkd3d-shader/spirv: Return an error if an invalid handler is encountered.
Prevents return of an invalid SPIR-V module.
2023-11-15 21:48:31 +01:00
Conor McCarthy
38e85079aa tests/shader-runner: Add a test for float comparisons. 2023-11-15 21:48:30 +01:00
Conor McCarthy
d957247c67 tests/shader-runner: Run d3d11 tests with a mimimum shader model of 4.0.
Passing less than 4.0 breaks the use of [require] with
'shader model < 4.0'.
2023-11-15 21:48:28 +01:00
Henri Verbeet
b7480911a8 build: Make doxygen output slightly less verbose.
There is perhaps a bit of a trade-off involved here, but with the
current state of things it's fairly hard to notice unexpected issues in
the output.
2023-11-14 23:06:49 +01:00
Conor McCarthy
408f67c69c vkd3d-shader/dxil: Handle missing flags as zero for CMP2.
The flag operand is omitted if IEEE strictness is specified.
2023-11-14 23:06:43 +01:00
Conor McCarthy
f1e9f40061 vkd3d-shader/dxil: Handle missing flags as zero for BINOP.
The flag operand is omitted if IEEE strictness is specified.
2023-11-14 23:06:41 +01:00
Henri Verbeet
9de793f180 vkd3d-shader: Implement scanning combined resource/sampler information. 2023-11-13 23:19:23 +01:00
Nikolay Sivov
d190fdf8c5 vkd3d-shader/dxil: Fully initialize instruction data in sm6_parser_emit_extractval().
Noticed after test runner started crashing when tracing is enabled.

Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2023-11-13 23:19:18 +01:00
Nikolay Sivov
e7422fdefb vkd3d: Fix some spelling mistakes. 2023-11-13 23:19:15 +01:00
Nikolay Sivov
3203485a7c vkd3d-shader: Fix some spelling mistakes. 2023-11-13 23:19:15 +01:00
Nikolay Sivov
41a72a4eae tests: Fix some spelling mistakes. 2023-11-13 23:19:14 +01:00
Henri Verbeet
215a2c4ede vkd3d-shader/ir: Introduce vsir_register_is_descriptor(). 2023-11-13 23:19:10 +01:00
Conor McCarthy
22960753e9 vkd3d-shader/spirv: Introduce orderedness to comparison instructions. 2023-11-10 20:23:51 +01:00
Conor McCarthy
d3b90cc877 vkd3d-shader/dxil: Implement the DXIL CMP2 instruction. 2023-11-10 20:23:50 +01:00
Conor McCarthy
1dd141535c vkd3d-shader/spirv: Support bool dst register in spirv_compiler_emit_comparison_instruction(). 2023-11-10 20:23:48 +01:00
Nikolay Sivov
418c177a1b vkd3d-shader/hlsl: Implement texCUBEproj().
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2023-11-10 20:23:44 +01:00
Nikolay Sivov
81ff57e07c vkd3d-shader/hlsl: Implement tex3Dproj().
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2023-11-10 20:23:43 +01:00
Nikolay Sivov
dd6a9135f4 vkd3d-shader/hlsl: Implement tex2Dproj().
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2023-11-10 20:23:41 +01:00
Giovanni Mascellani
0c5c18bdce vkd3d-shader/ir: Validate index count for IMMCONST64 registers. 2023-11-09 21:15:51 +01:00
Giovanni Mascellani
b74470b9d2 vkd3d-shader/ir: Validate index count for IMMCONST registers. 2023-11-09 21:15:49 +01:00
Giovanni Mascellani
c867682982 vkd3d-shader/ir: Validate index count for NULL registers. 2023-11-09 21:15:47 +01:00