Henri Verbeet
466d849c72
vkd3d-shader/glsl: Implement support for VKD3D_SHADER_COMPONENT_INT outputs.
2024-11-06 22:53:31 +01:00
Francisco Casas
5df836c513
vkd3d-shader/hlsl: Store SM4 MOD in the vsir program.
2024-11-06 22:49:12 +01:00
Francisco Casas
30bc6965a2
vkd3d-shader/hlsl: Store SM4 DOT in the vsir program.
2024-11-06 22:48:13 +01:00
Francisco Casas
e8b373e3ff
vkd3d-shader/hlsl: Store SM4 DIV in the vsir program.
2024-11-06 22:47:42 +01:00
Francisco Casas
24f4308982
vkd3d-shader/hlsl: Store SM4 MUL in the vsir program.
2024-11-06 22:45:46 +01:00
Francisco Casas
e4d36bd855
vkd3d-shader/hlsl: Store SM4 SAT in the vsir program.
2024-11-06 22:45:23 +01:00
Francisco Casas
2e3f4a01bf
vkd3d-shader/hlsl: Store SM4 RCP in the vsir program.
2024-11-06 22:40:50 +01:00
Francisco Casas
3c4889add3
vkd3d-shader/hlsl: Store SM4 SIN and COS in the vsir program.
2024-11-06 22:38:04 +01:00
Francisco Casas
befba8e813
vkd3d-shader/hlsl: Store SM4 casts in the vsir program.
2024-11-06 22:27:49 +01:00
Nikolay Sivov
9af17d4a9d
vkd3d-shader/fx: Implement parsing the remaining fx_5_0 object types.
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Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2024-11-06 22:14:03 +01:00
Nikolay Sivov
e5ba79b4f1
vkd3d-shader/hlsl: Implement the ByteAddressBuffer.Load*() methods.
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Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2024-11-06 22:09:23 +01:00
Nikolay Sivov
1a28e7d9c6
vkd3d-shader/hlsl: Add parser support for the ByteAddressBuffer type.
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Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2024-11-06 21:56:27 +01:00
Nikolay Sivov
8438aacc3b
vkd3d-shader/spriv: Only lookup resource symbols for UAVs in the ld_raw/ld_structured handler.
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We don't need them for SRVs. Worse, if we're using a combined
resource/sampler pair for the SRV, a separate resource symbol may not
even exist.
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2024-11-06 21:47:08 +01:00
Elizabeth Figura
fb8660c196
vkd3d-shader/ir: Add an is_pre_rasterization_shader() helper.
2024-11-05 20:00:27 +01:00
Elizabeth Figura
4290d85397
vkd3d-shader/hlsl: Write all writemask components for PSIZE and FOG outputs.
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Matching fxc/d3dcompiler.
2024-11-05 19:58:49 +01:00
Elizabeth Figura
a10ee075ff
vkd3d-shader/ir: Force fog and point size to 1 component when normalizing I/O.
2024-11-05 19:57:41 +01:00
Elizabeth Figura
5a513ffcec
vkd3d-shader/hlsl: Enforce FOG component count for sm1 VS output.
2024-11-05 19:53:24 +01:00
Elizabeth Figura
f50b20ddd6
vkd3d-shader/hlsl: Enforce PSIZE component count for sm1 VS output.
2024-11-05 19:53:24 +01:00
Francisco Casas
90a07ada8e
vkd3d-shader/tpf: Use SCALAR swizzle dimension for RASTERIZER registers.
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While we currently output instructions like this:
sampleinfo_uint r0.x, rasterizer.xxxx
> SAMPLE_INFO (111)
0 0000100[len:4] 0000000000001[1] 00001101111[opcode:111]
└─ 0 000[d3i:0] 000[d2i:0] 000[d1i:0] 01[idxs:1] 00000000[type:0] 0000[0] 0001[wmask:1] 00[swtype:0] 10[dim:2]
└─ 00000000000000000000000000000000[0|0.0]
└─ 0 000[d3i:0] 000[d2i:0] 000[d1i:0] 00[idxs:0] 00001110[type:14] 00000000[sw:0] 01[swtype:1] 10[dim:2]
FXC/d3dcompiler outputs instructions like this:
sampleinfo o0.x, rasterizer.x
> SAMPLE_INFO (111)
0 0000100[len:4] 0000000000000[0] 00001101111[opcode:111]
└─ 0 000[d3i:0] 000[d2i:0] 000[d1i:0] 01[idxs:1] 00000010[type:2] 0000[0] 0001[wmask:1] 00[swtype:0] 10[dim:2]
└─ 00000000000000000000000000000000[0|0.0]
└─ 0 000[d3i:0] 000[d2i:0] 000[d1i:0] 00[idxs:0] 00001110[type:14] 000000[0] 00[swcomp:0] 10[swtype:2] 10[dim:2]
Note the difference in swtype of the rasterizer src register.
2024-11-05 19:50:55 +01:00
Francisco Casas
950c381728
vkd3d-shader/hlsl: Store RASTERIZER_SAMPLE_COUNT in the vsir program.
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Also, the profile check for GetRenderTargetSampleCount() is moved to
parse time.
2024-11-05 19:48:31 +01:00
Francisco Casas
ab60f4e082
vkd3d-shader/hlsl: Store simple SM4 expressions in the vsir program.
2024-11-05 19:35:52 +01:00
Francisco Casas
b4608e99e3
vkd3d-shader/tpf: Remove HLSL IR ABS handling.
2024-11-05 19:20:21 +01:00
Francisco Casas
6eda775047
vkd3d-shader/hlsl: Run sm4_generate_vsir_block() recursively.
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This allows us to remove the HLSL IR version of an instruction when
the vsir version is properly implemented.
2024-11-05 19:20:21 +01:00
Shaun Ren
64c4a3a442
vkd3d-shader/hlsl: Store SM4 semantic declarations in the vsir program.
2024-11-05 19:19:22 +01:00
Nikolay Sivov
5ea946aa90
vkd3d-shader/hlsl: Accept multiple colon-separated attributes.
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Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2024-11-05 18:23:31 +01:00
Francisco Casas
68311ef010
vkd3d-shader/hlsl: Store SM4 ABS instructions in the vsir program.
2024-11-04 17:00:54 +01:00
Francisco Casas
404644bad3
vkd3d-shader/hlsl: Introduce vsir_src_from_hlsl_node().
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This allows constants to be inlined for sm4.
2024-11-04 16:36:28 +01:00
Francisco Casas
6f52bb6b1a
vkd3d-shader/hlsl: Store SM4 swizzles in the vsir program.
2024-11-04 16:08:38 +01:00
Francisco Casas
2083d505c7
vkd3d-shader/tpf: Use instr.extra_bits for IF.
2024-11-04 15:37:46 +01:00
Henri Verbeet
e6c84862a8
vkd3d-shader/ir: Search for SV_TARGET0 vsir_program_insert_alpha_test().
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As opposed to any SV_TARGET with register index 0. We care about the
semantic index here, not the register index.
2024-11-04 15:32:05 +01:00
Henri Verbeet
1b0248f31b
vkd3d-shader/ir: Specifically search for SV_POSITION0 in vsir_program_insert_clip_planes().
2024-11-04 15:30:44 +01:00
Elizabeth Figura
3681b83fb4
vkd3d-shader/fx: Fix checking for a GS with stream output.
2024-11-04 15:29:39 +01:00
Elizabeth Figura
7e4ab9c7c0
vkd3d-shader: Write zeroes for uninitialized outputs in vsir_program_remap_output_signature().
2024-11-04 15:26:55 +01:00
Elizabeth Figura
e781abc3fb
vkd3d-shader: Write uninitialized components of COLOR0 as 1.
2024-11-04 15:21:09 +01:00
Elizabeth Figura
cc9fcee676
vkd3d-shader: Reduce masks to only read components in vsir_program_remap_output_signature().
2024-11-04 15:11:54 +01:00
Elizabeth Figura
61bda1c054
vkd3d-shader: Always ensure a RET at the end of a program.
2024-11-04 15:06:02 +01:00
Nikolay Sivov
ad2208b726
vkd3d-shader/fx: Implement parsing shader resources types.
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Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2024-10-29 14:52:39 +01:00
Nikolay Sivov
1a8e9ff94e
vkd3d-shader/fx: Implement parsing shader objects.
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Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2024-10-29 14:41:55 +01:00
Elizabeth Figura
3511b54040
vkd3d-shader/hlsl: Use early return in allocate_register().
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Partly to avoid a spurious maybe-uninitialized warning, and partly because it's a more idiomatic structure.
2024-10-28 18:01:06 +01:00
Elizabeth Figura
08253504dc
vkd3d-shader: Make an assert into an explicit check.
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For some reason gcc without LTO thinks that component_count can overflow the
array here.
2024-10-28 18:01:06 +01:00
Elizabeth Figura
5883e01032
vkd3d-shader/fx: Remove an unnecessary hlsl_is_numeric_type().
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Constants can only be numeric.
2024-10-28 18:01:06 +01:00
Henri Verbeet
9690ffff61
vkd3d-shader/spirv: Handle oPts in spirv_compiler_get_register_name().
2024-10-28 17:54:43 +01:00
Henri Verbeet
fa6d03a4cb
vkd3d-shader/d3d-asm: Implement support for VKD3DSPR_PARAMETER registers.
2024-10-28 17:54:20 +01:00
Nikolay Sivov
89e5912fd2
vkd3d-shader/hlsl: Implement RWByteAddressBuffer.Store*() methods.
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Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2024-10-28 17:51:04 +01:00
Nikolay Sivov
cf27065b7d
vkd3d-shader/hlsl: Add parser support for the RWByteAddressBuffer type.
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Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2024-10-28 17:44:28 +01:00
Nikolay Sivov
4195a2f18a
vkd3d-shader/hlsl: Use a more compact way to store object method configurations.
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Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2024-10-28 17:41:46 +01:00
Elizabeth Figura
390a330b8e
vkd3d-shader/hlsl: Avoid leaking the block in the subscript rule.
2024-10-28 15:40:41 +01:00
Elizabeth Figura
bb74180659
vkd3d-shader/hlsl: Return an error expression when an invalid subscript is used.
2024-10-28 15:40:41 +01:00
Elizabeth Figura
7905c47765
vkd3d-shader/hlsl: Handle error expressions in array sizes.
2024-10-28 15:40:41 +01:00
Elizabeth Figura
8b98e483ac
vkd3d-shader/hlsl: Handle error expressions in return statements.
2024-10-28 15:40:41 +01:00