Commit Graph

520 Commits

Author SHA1 Message Date
1015cc952e vkd3d-shader/d3d-asm: Add an "internal" mode for the ASM dumper.
The new mode exposes more details about what's going on inside the VSIR
code and it's meant to ease development and debugging.
2023-12-12 23:16:26 +01:00
0610867334 vkd3d-shader/spirv: Emit an error if 64-bit integers are used. 2023-12-12 22:50:48 +01:00
1929432559 vkd3d-shader: Introduce an instruction flag to suppress masking of bitwise shift counts.
DXIL does not use implicit masking of shift counts.
2023-12-12 22:50:46 +01:00
1630fd9a3c vkd3d-shader/dxil: Apply metadata attachments to instructions.
These are apparently only used for 'dx.op' intrinsics, because the
instructions based on native LLVM ones have their own way to apply
attributes.
2023-12-07 21:57:00 +01:00
cb88844a3d vkd3d-shader: Add a register index to struct vkd3d_shader_immediate_constant_buffer. 2023-12-07 21:56:47 +01:00
ffae57eb8d vkd3d-shader/dxil: Support null constant arrays. 2023-12-07 21:56:43 +01:00
9fcc904834 vkd3d-shader/spirv: Always emit clip/cull builtins as an array.
Clip/cull distance can appear as input in pixel shaders, and the
array size must not be forced to zero.
2023-12-06 15:31:20 +01:00
eb05e434ff vkd3d-shader/dxil: Implement the DXIL LOAD instruction. 2023-11-22 22:07:59 +01:00
59730ecfd8 vkd3d-shader/dxil: Implement the DXIL GEP instruction. 2023-11-22 22:07:58 +01:00
a0f5d70792 vkd3d-shader/dxil: Support global variable initialisers. 2023-11-22 22:07:57 +01:00
f2a656b876 vkd3d-shader/dxil: Introduce a value type for immediate constant buffers. 2023-11-22 22:07:56 +01:00
85d5f83fb7 vkd3d-shader/dxil: Implement default address space global variables. 2023-11-22 22:07:54 +01:00
920657e7ee vkd3d-shader: Delete unused struct list from struct vkd3d_shader_indexable_temp. 2023-11-22 22:07:52 +01:00
01dad41862 vkd3d-shader/ir: Skip recording combined resource/sampler information for dynamically indexed descriptor arrays.
And output a warning instead.
2023-11-21 22:41:57 +01:00
215a2c4ede vkd3d-shader/ir: Introduce vsir_register_is_descriptor(). 2023-11-13 23:19:10 +01:00
22960753e9 vkd3d-shader/spirv: Introduce orderedness to comparison instructions. 2023-11-10 20:23:51 +01:00
d3b90cc877 vkd3d-shader/dxil: Implement the DXIL CMP2 instruction. 2023-11-10 20:23:50 +01:00
c7a7d9a18c vkd3d-shader/ir: Normalize all I/O registers to INPUT/OUTPUT/PATCHCONST.
Specifically, map COLOROUT to OUTPUT, and map INCONTROLPOINT to INPUT for domain
shaders as well as hull shaders.

Obscure the non-existent differences from the view of the backend.
2023-11-09 21:14:52 +01:00
58ffb5d181 vkd3d-shader/spirv: Introduce integer width cast instructions.
ITOI and UTOU may cast from a bool to a 32-bit integer. Cast to a 64-bit
integer from a smaller type will be added later.
2023-11-09 21:14:32 +01:00
7de4ac2e48 vkd3d-shader/spirv: Support bool cast in spirv_compiler_emit_alu_instruction(). 2023-11-09 21:14:30 +01:00
5b87d6419a vkd3d-shader/spirv: Support bool logic ops in spirv_compiler_emit_alu_instruction(). 2023-11-09 21:14:27 +01:00
12240efa79 vkd3d-shader/spirv: Use register counts from the signature and shader desc. 2023-11-07 22:26:49 +01:00
0058764f01 vkd3d-shader: Store the control point counts in struct vkd3d_shader_desc. 2023-11-07 22:26:49 +01:00
2f7d52dba4 vkd3d-shader/ir: Check that IF blocks are correctly nested. 2023-11-07 22:26:01 +01:00
749df8dec2 vkd3d-shader/dxil: Implement the DXIL BINOP instruction. 2023-11-06 23:09:03 +01:00