2021-08-17 10:38:57 -07:00
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/*
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* HLSL code generation for DXBC shader models 4-5
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*
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* Copyright 2019-2020 Zebediah Figura for CodeWeavers
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA
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*/
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#include "hlsl.h"
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#include <stdio.h>
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2021-08-17 10:38:59 -07:00
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#include "vkd3d_d3dcommon.h"
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2021-08-17 10:38:58 -07:00
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#include "sm4.h"
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2021-08-19 16:44:27 -07:00
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bool hlsl_sm4_register_from_semantic(struct hlsl_ctx *ctx, const struct hlsl_semantic *semantic,
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2021-08-19 16:44:29 -07:00
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bool output, enum vkd3d_sm4_register_type *type, bool *has_idx)
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2021-08-19 16:44:27 -07:00
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{
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unsigned int i;
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static const struct
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{
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const char *semantic;
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bool output;
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enum vkd3d_shader_type shader_type;
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enum vkd3d_sm4_register_type type;
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bool has_idx;
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}
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register_table[] =
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{
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{"sv_primitiveid", false, VKD3D_SHADER_TYPE_GEOMETRY, VKD3D_SM4_RT_PRIMID, false},
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/* Put sv_target in this table, instead of letting it fall through to
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* default varying allocation, so that the register index matches the
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* usage index. */
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{"color", true, VKD3D_SHADER_TYPE_PIXEL, VKD3D_SM4_RT_OUTPUT, true},
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{"depth", true, VKD3D_SHADER_TYPE_PIXEL, VKD3D_SM4_RT_DEPTHOUT, false},
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{"sv_depth", true, VKD3D_SHADER_TYPE_PIXEL, VKD3D_SM4_RT_DEPTHOUT, false},
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{"sv_target", true, VKD3D_SHADER_TYPE_PIXEL, VKD3D_SM4_RT_OUTPUT, true},
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};
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for (i = 0; i < ARRAY_SIZE(register_table); ++i)
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{
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if (!ascii_strcasecmp(semantic->name, register_table[i].semantic)
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&& output == register_table[i].output
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&& ctx->profile->type == register_table[i].shader_type)
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{
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*type = register_table[i].type;
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2021-08-19 16:44:29 -07:00
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*has_idx = register_table[i].has_idx;
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2021-08-19 16:44:27 -07:00
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return true;
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}
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}
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return false;
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}
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bool hlsl_sm4_usage_from_semantic(struct hlsl_ctx *ctx, const struct hlsl_semantic *semantic,
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bool output, D3D_NAME *usage)
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{
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unsigned int i;
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static const struct
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{
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const char *name;
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bool output;
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enum vkd3d_shader_type shader_type;
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D3DDECLUSAGE usage;
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}
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semantics[] =
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{
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{"position", false, VKD3D_SHADER_TYPE_GEOMETRY, D3D_NAME_POSITION},
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{"sv_position", false, VKD3D_SHADER_TYPE_GEOMETRY, D3D_NAME_POSITION},
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{"sv_primitiveid", false, VKD3D_SHADER_TYPE_GEOMETRY, D3D_NAME_PRIMITIVE_ID},
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{"position", true, VKD3D_SHADER_TYPE_GEOMETRY, D3D_NAME_POSITION},
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{"sv_position", true, VKD3D_SHADER_TYPE_GEOMETRY, D3D_NAME_POSITION},
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{"sv_primitiveid", true, VKD3D_SHADER_TYPE_GEOMETRY, D3D_NAME_PRIMITIVE_ID},
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{"position", false, VKD3D_SHADER_TYPE_PIXEL, D3D_NAME_POSITION},
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{"sv_position", false, VKD3D_SHADER_TYPE_PIXEL, D3D_NAME_POSITION},
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{"color", true, VKD3D_SHADER_TYPE_PIXEL, D3D_NAME_TARGET},
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{"depth", true, VKD3D_SHADER_TYPE_PIXEL, D3D_NAME_DEPTH},
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{"sv_target", true, VKD3D_SHADER_TYPE_PIXEL, D3D_NAME_TARGET},
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{"sv_depth", true, VKD3D_SHADER_TYPE_PIXEL, D3D_NAME_DEPTH},
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{"sv_position", false, VKD3D_SHADER_TYPE_VERTEX, D3D_NAME_UNDEFINED},
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{"position", true, VKD3D_SHADER_TYPE_VERTEX, D3D_NAME_POSITION},
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{"sv_position", true, VKD3D_SHADER_TYPE_VERTEX, D3D_NAME_POSITION},
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};
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for (i = 0; i < ARRAY_SIZE(semantics); ++i)
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{
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if (!ascii_strcasecmp(semantic->name, semantics[i].name)
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&& output == semantics[i].output
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&& ctx->profile->type == semantics[i].shader_type
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&& !ascii_strncasecmp(semantic->name, "sv_", 3))
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{
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*usage = semantics[i].usage;
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return true;
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}
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}
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if (!ascii_strncasecmp(semantic->name, "sv_", 3))
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return false;
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*usage = D3D_NAME_UNDEFINED;
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return true;
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}
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static void write_sm4_signature(struct hlsl_ctx *ctx, struct dxbc_writer *dxbc, bool output)
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{
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struct vkd3d_bytecode_buffer buffer = {0};
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struct vkd3d_string_buffer *string;
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const struct hlsl_ir_var *var;
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size_t count_position;
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unsigned int i;
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bool ret;
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count_position = put_u32(&buffer, 0);
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put_u32(&buffer, 8); /* unknown */
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LIST_FOR_EACH_ENTRY(var, &ctx->extern_vars, struct hlsl_ir_var, extern_entry)
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{
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unsigned int width = (1u << var->data_type->dimx) - 1, use_mask;
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enum vkd3d_sm4_register_type type;
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uint32_t usage_idx, reg_idx;
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D3D_NAME usage;
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2021-08-19 16:44:29 -07:00
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bool has_idx;
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2021-08-19 16:44:27 -07:00
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if ((output && !var->is_output_semantic) || (!output && !var->is_input_semantic))
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continue;
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ret = hlsl_sm4_usage_from_semantic(ctx, &var->semantic, output, &usage);
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assert(ret);
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usage_idx = var->semantic.index;
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2021-08-19 16:44:29 -07:00
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if (hlsl_sm4_register_from_semantic(ctx, &var->semantic, output, &type, &has_idx))
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{
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reg_idx = has_idx ? var->semantic.index : ~0u;
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}
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else
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{
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assert(var->reg.allocated);
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type = VKD3D_SM4_RT_INPUT;
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reg_idx = var->reg.id;
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}
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use_mask = width; /* FIXME: accurately report use mask */
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if (output)
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use_mask = 0xf ^ use_mask;
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/* Special pixel shader semantics (TARGET, DEPTH, COVERAGE). */
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if (usage >= 64)
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usage = 0;
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put_u32(&buffer, 0); /* name */
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put_u32(&buffer, usage_idx);
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put_u32(&buffer, usage);
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switch (var->data_type->base_type)
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{
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case HLSL_TYPE_FLOAT:
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case HLSL_TYPE_HALF:
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put_u32(&buffer, D3D_REGISTER_COMPONENT_FLOAT32);
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break;
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case HLSL_TYPE_INT:
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put_u32(&buffer, D3D_REGISTER_COMPONENT_SINT32);
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break;
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case HLSL_TYPE_BOOL:
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case HLSL_TYPE_UINT:
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put_u32(&buffer, D3D_REGISTER_COMPONENT_UINT32);
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break;
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default:
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if ((string = hlsl_type_to_string(ctx, var->data_type)))
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hlsl_error(ctx, var->loc, VKD3D_SHADER_ERROR_HLSL_INVALID_TYPE,
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"Invalid data type %s for semantic variable %s.", string->buffer, var->name);
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hlsl_release_string_buffer(ctx, string);
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put_u32(&buffer, D3D_REGISTER_COMPONENT_UNKNOWN);
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}
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put_u32(&buffer, reg_idx);
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put_u32(&buffer, vkd3d_make_u16(width, use_mask));
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}
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i = 0;
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LIST_FOR_EACH_ENTRY(var, &ctx->extern_vars, struct hlsl_ir_var, extern_entry)
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{
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const char *semantic = var->semantic.name;
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size_t string_offset;
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D3D_NAME usage;
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if ((output && !var->is_output_semantic) || (!output && !var->is_input_semantic))
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continue;
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hlsl_sm4_usage_from_semantic(ctx, &var->semantic, output, &usage);
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if (usage == D3D_NAME_TARGET && !ascii_strcasecmp(semantic, "color"))
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string_offset = put_string(&buffer, "SV_Target");
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else if (usage == D3D_NAME_DEPTH && !ascii_strcasecmp(semantic, "depth"))
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string_offset = put_string(&buffer, "SV_Depth");
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else if (usage == D3D_NAME_POSITION && !ascii_strcasecmp(semantic, "position"))
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string_offset = put_string(&buffer, "SV_Position");
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else
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string_offset = put_string(&buffer, semantic);
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set_u32(&buffer, (2 + i++ * 6) * sizeof(uint32_t), string_offset);
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}
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set_u32(&buffer, count_position, i);
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dxbc_writer_add_section(dxbc, output ? TAG_OSGN : TAG_ISGN, buffer.data, buffer.size);
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}
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2021-08-17 10:39:00 -07:00
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static const struct hlsl_type *get_array_type(const struct hlsl_type *type)
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{
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if (type->type == HLSL_CLASS_ARRAY)
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return get_array_type(type->e.array.type);
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return type;
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}
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static unsigned int get_array_size(const struct hlsl_type *type)
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{
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if (type->type == HLSL_CLASS_ARRAY)
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return get_array_size(type->e.array.type) * type->e.array.elements_count;
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return 1;
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}
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static D3D_SHADER_VARIABLE_CLASS sm4_class(const struct hlsl_type *type)
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{
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switch (type->type)
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{
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case HLSL_CLASS_ARRAY:
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return sm4_class(type->e.array.type);
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case HLSL_CLASS_MATRIX:
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assert(type->modifiers & HLSL_MODIFIERS_MAJORITY_MASK);
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if (type->modifiers & HLSL_MODIFIER_COLUMN_MAJOR)
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return D3D_SVC_MATRIX_COLUMNS;
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else
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return D3D_SVC_MATRIX_ROWS;
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case HLSL_CLASS_OBJECT:
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return D3D_SVC_OBJECT;
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case HLSL_CLASS_SCALAR:
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return D3D_SVC_SCALAR;
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case HLSL_CLASS_STRUCT:
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return D3D_SVC_STRUCT;
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case HLSL_CLASS_VECTOR:
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return D3D_SVC_VECTOR;
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default:
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ERR("Invalid class %#x.\n", type->type);
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assert(0);
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return 0;
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}
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}
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static D3D_SHADER_VARIABLE_TYPE sm4_base_type(const struct hlsl_type *type)
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{
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switch (type->base_type)
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{
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case HLSL_TYPE_BOOL:
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return D3D_SVT_BOOL;
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case HLSL_TYPE_FLOAT:
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case HLSL_TYPE_HALF:
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return D3D_SVT_FLOAT;
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case HLSL_TYPE_INT:
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return D3D_SVT_INT;
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case HLSL_TYPE_PIXELSHADER:
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return D3D_SVT_PIXELSHADER;
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case HLSL_TYPE_SAMPLER:
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switch (type->sampler_dim)
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{
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case HLSL_SAMPLER_DIM_1D:
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return D3D_SVT_SAMPLER1D;
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case HLSL_SAMPLER_DIM_2D:
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return D3D_SVT_SAMPLER2D;
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case HLSL_SAMPLER_DIM_3D:
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return D3D_SVT_SAMPLER3D;
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case HLSL_SAMPLER_DIM_CUBE:
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return D3D_SVT_SAMPLERCUBE;
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case HLSL_SAMPLER_DIM_GENERIC:
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return D3D_SVT_SAMPLER;
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default:
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assert(0);
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}
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break;
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case HLSL_TYPE_STRING:
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return D3D_SVT_STRING;
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case HLSL_TYPE_TEXTURE:
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switch (type->sampler_dim)
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{
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case HLSL_SAMPLER_DIM_1D:
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return D3D_SVT_TEXTURE1D;
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case HLSL_SAMPLER_DIM_2D:
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return D3D_SVT_TEXTURE2D;
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case HLSL_SAMPLER_DIM_3D:
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return D3D_SVT_TEXTURE3D;
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case HLSL_SAMPLER_DIM_CUBE:
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return D3D_SVT_TEXTURECUBE;
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case HLSL_SAMPLER_DIM_GENERIC:
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return D3D_SVT_TEXTURE;
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default:
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assert(0);
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}
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break;
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case HLSL_TYPE_UINT:
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return D3D_SVT_UINT;
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case HLSL_TYPE_VERTEXSHADER:
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return D3D_SVT_VERTEXSHADER;
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case HLSL_TYPE_VOID:
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return D3D_SVT_VOID;
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default:
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assert(0);
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}
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assert(0);
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return 0;
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}
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static void write_sm4_type(struct hlsl_ctx *ctx, struct vkd3d_bytecode_buffer *buffer, struct hlsl_type *type)
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{
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const struct hlsl_type *array_type = get_array_type(type);
|
2021-08-17 10:39:01 -07:00
|
|
|
const char *name = array_type->name ? array_type->name : "<unnamed>";
|
|
|
|
const struct hlsl_profile_info *profile = ctx->profile;
|
2021-08-17 10:39:00 -07:00
|
|
|
unsigned int field_count = 0, array_size = 0;
|
2021-08-17 10:39:01 -07:00
|
|
|
size_t fields_offset = 0, name_offset = 0;
|
2021-08-17 10:39:00 -07:00
|
|
|
struct hlsl_struct_field *field;
|
|
|
|
|
|
|
|
if (type->bytecode_offset)
|
|
|
|
return;
|
|
|
|
|
2021-08-17 10:39:01 -07:00
|
|
|
if (profile->major_version >= 5)
|
|
|
|
name_offset = put_string(buffer, name);
|
|
|
|
|
2021-08-17 10:39:00 -07:00
|
|
|
if (type->type == HLSL_CLASS_ARRAY)
|
|
|
|
array_size = get_array_size(type);
|
|
|
|
|
|
|
|
if (array_type->type == HLSL_CLASS_STRUCT)
|
|
|
|
{
|
|
|
|
LIST_FOR_EACH_ENTRY(field, array_type->e.elements, struct hlsl_struct_field, entry)
|
|
|
|
{
|
|
|
|
field->name_bytecode_offset = put_string(buffer, field->name);
|
|
|
|
write_sm4_type(ctx, buffer, field->type);
|
|
|
|
}
|
|
|
|
|
|
|
|
fields_offset = bytecode_get_size(buffer);
|
|
|
|
|
|
|
|
LIST_FOR_EACH_ENTRY(field, array_type->e.elements, struct hlsl_struct_field, entry)
|
|
|
|
{
|
|
|
|
put_u32(buffer, field->name_bytecode_offset);
|
|
|
|
put_u32(buffer, field->type->bytecode_offset);
|
|
|
|
put_u32(buffer, field->reg_offset);
|
|
|
|
++field_count;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-08-19 16:44:25 -07:00
|
|
|
type->bytecode_offset = put_u32(buffer, vkd3d_make_u32(sm4_class(type), sm4_base_type(type)));
|
|
|
|
put_u32(buffer, vkd3d_make_u32(type->dimy, type->dimx));
|
|
|
|
put_u32(buffer, vkd3d_make_u32(array_size, field_count));
|
2021-08-17 10:39:00 -07:00
|
|
|
put_u32(buffer, fields_offset);
|
2021-08-17 10:39:01 -07:00
|
|
|
|
|
|
|
if (profile->major_version >= 5)
|
|
|
|
{
|
|
|
|
put_u32(buffer, 0); /* FIXME: unknown */
|
|
|
|
put_u32(buffer, 0); /* FIXME: unknown */
|
|
|
|
put_u32(buffer, 0); /* FIXME: unknown */
|
|
|
|
put_u32(buffer, 0); /* FIXME: unknown */
|
|
|
|
put_u32(buffer, name_offset);
|
|
|
|
}
|
2021-08-17 10:39:00 -07:00
|
|
|
}
|
|
|
|
|
2021-08-17 10:38:59 -07:00
|
|
|
static void write_sm4_rdef(struct hlsl_ctx *ctx, struct dxbc_writer *dxbc)
|
|
|
|
{
|
|
|
|
size_t cbuffers_offset, resources_offset, creator_offset, string_offset;
|
|
|
|
size_t cbuffer_position, resource_position, creator_position;
|
|
|
|
const struct hlsl_profile_info *profile = ctx->profile;
|
|
|
|
struct vkd3d_bytecode_buffer buffer = {0};
|
2021-08-17 10:39:00 -07:00
|
|
|
unsigned int cbuffer_count = 0, i, j;
|
2021-08-17 10:38:59 -07:00
|
|
|
const struct hlsl_buffer *cbuffer;
|
|
|
|
|
|
|
|
static const uint16_t target_types[] =
|
|
|
|
{
|
|
|
|
0xffff, /* PIXEL */
|
|
|
|
0xfffe, /* VERTEX */
|
|
|
|
0x4753, /* GEOMETRY */
|
|
|
|
0x4853, /* HULL */
|
|
|
|
0x4453, /* DOMAIN */
|
|
|
|
0x4353, /* COMPUTE */
|
|
|
|
};
|
|
|
|
|
|
|
|
LIST_FOR_EACH_ENTRY(cbuffer, &ctx->buffers, struct hlsl_buffer, entry)
|
|
|
|
{
|
|
|
|
if (cbuffer->reg.allocated)
|
|
|
|
++cbuffer_count;
|
|
|
|
}
|
|
|
|
|
|
|
|
put_u32(&buffer, cbuffer_count);
|
|
|
|
cbuffer_position = put_u32(&buffer, 0);
|
|
|
|
put_u32(&buffer, cbuffer_count); /* bound resource count */
|
|
|
|
resource_position = put_u32(&buffer, 0);
|
2021-08-19 16:44:25 -07:00
|
|
|
put_u32(&buffer, vkd3d_make_u32(vkd3d_make_u16(profile->minor_version, profile->major_version),
|
|
|
|
target_types[profile->type]));
|
2021-08-17 10:38:59 -07:00
|
|
|
put_u32(&buffer, 0); /* FIXME: compilation flags */
|
|
|
|
creator_position = put_u32(&buffer, 0);
|
|
|
|
|
2021-08-17 10:39:01 -07:00
|
|
|
if (profile->major_version >= 5)
|
|
|
|
{
|
|
|
|
put_u32(&buffer, TAG_RD11);
|
|
|
|
put_u32(&buffer, 15 * sizeof(uint32_t)); /* size of RDEF header including this header */
|
|
|
|
put_u32(&buffer, 6 * sizeof(uint32_t)); /* size of buffer desc */
|
|
|
|
put_u32(&buffer, 8 * sizeof(uint32_t)); /* size of binding desc */
|
|
|
|
put_u32(&buffer, 10 * sizeof(uint32_t)); /* size of variable desc */
|
|
|
|
put_u32(&buffer, 9 * sizeof(uint32_t)); /* size of type desc */
|
|
|
|
put_u32(&buffer, 3 * sizeof(uint32_t)); /* size of member desc */
|
|
|
|
put_u32(&buffer, 0); /* unknown; possibly a null terminator */
|
|
|
|
}
|
|
|
|
|
2021-08-17 10:38:59 -07:00
|
|
|
/* Bound resources. */
|
|
|
|
|
|
|
|
resources_offset = bytecode_get_size(&buffer);
|
|
|
|
set_u32(&buffer, resource_position, resources_offset);
|
|
|
|
LIST_FOR_EACH_ENTRY(cbuffer, &ctx->buffers, struct hlsl_buffer, entry)
|
|
|
|
{
|
|
|
|
uint32_t flags = 0;
|
|
|
|
|
|
|
|
if (!cbuffer->reg.allocated)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
if (cbuffer->reservation.type)
|
|
|
|
flags |= D3D_SIF_USERPACKED;
|
|
|
|
|
|
|
|
put_u32(&buffer, 0); /* name */
|
|
|
|
put_u32(&buffer, cbuffer->type == HLSL_BUFFER_CONSTANT ? D3D_SIT_CBUFFER : D3D_SIT_TBUFFER);
|
|
|
|
put_u32(&buffer, 0); /* return type */
|
|
|
|
put_u32(&buffer, 0); /* dimension */
|
|
|
|
put_u32(&buffer, 0); /* multisample count */
|
|
|
|
put_u32(&buffer, cbuffer->reg.id); /* bind point */
|
|
|
|
put_u32(&buffer, 1); /* bind count */
|
|
|
|
put_u32(&buffer, flags); /* flags */
|
|
|
|
}
|
|
|
|
|
|
|
|
i = 0;
|
|
|
|
LIST_FOR_EACH_ENTRY(cbuffer, &ctx->buffers, struct hlsl_buffer, entry)
|
|
|
|
{
|
|
|
|
if (!cbuffer->reg.allocated)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
string_offset = put_string(&buffer, cbuffer->name);
|
|
|
|
set_u32(&buffer, resources_offset + i++ * 8 * sizeof(uint32_t), string_offset);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Buffers. */
|
|
|
|
|
|
|
|
cbuffers_offset = bytecode_get_size(&buffer);
|
|
|
|
set_u32(&buffer, cbuffer_position, cbuffers_offset);
|
|
|
|
LIST_FOR_EACH_ENTRY(cbuffer, &ctx->buffers, struct hlsl_buffer, entry)
|
|
|
|
{
|
|
|
|
const struct hlsl_ir_var *var;
|
|
|
|
unsigned int var_count = 0;
|
|
|
|
|
|
|
|
if (!cbuffer->reg.allocated)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
LIST_FOR_EACH_ENTRY(var, &ctx->extern_vars, struct hlsl_ir_var, extern_entry)
|
|
|
|
{
|
|
|
|
if (var->is_uniform && var->buffer == cbuffer)
|
|
|
|
++var_count;
|
|
|
|
}
|
|
|
|
|
|
|
|
put_u32(&buffer, 0); /* name */
|
|
|
|
put_u32(&buffer, var_count);
|
|
|
|
put_u32(&buffer, 0); /* variable offset */
|
|
|
|
put_u32(&buffer, align(cbuffer->size, 4) * sizeof(float));
|
|
|
|
put_u32(&buffer, 0); /* FIXME: flags */
|
|
|
|
put_u32(&buffer, cbuffer->type == HLSL_BUFFER_CONSTANT ? D3D_CT_CBUFFER : D3D_CT_TBUFFER);
|
|
|
|
}
|
|
|
|
|
|
|
|
i = 0;
|
|
|
|
LIST_FOR_EACH_ENTRY(cbuffer, &ctx->buffers, struct hlsl_buffer, entry)
|
|
|
|
{
|
|
|
|
if (!cbuffer->reg.allocated)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
string_offset = put_string(&buffer, cbuffer->name);
|
|
|
|
set_u32(&buffer, cbuffers_offset + i++ * 6 * sizeof(uint32_t), string_offset);
|
|
|
|
}
|
|
|
|
|
|
|
|
i = 0;
|
|
|
|
LIST_FOR_EACH_ENTRY(cbuffer, &ctx->buffers, struct hlsl_buffer, entry)
|
|
|
|
{
|
|
|
|
size_t vars_start = bytecode_get_size(&buffer);
|
|
|
|
const struct hlsl_ir_var *var;
|
|
|
|
|
|
|
|
if (!cbuffer->reg.allocated)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
set_u32(&buffer, cbuffers_offset + (i++ * 6 + 2) * sizeof(uint32_t), vars_start);
|
|
|
|
|
|
|
|
LIST_FOR_EACH_ENTRY(var, &ctx->extern_vars, struct hlsl_ir_var, extern_entry)
|
|
|
|
{
|
|
|
|
if (var->is_uniform && var->buffer == cbuffer)
|
|
|
|
{
|
|
|
|
uint32_t flags = 0;
|
|
|
|
|
|
|
|
if (var->last_read)
|
|
|
|
flags |= D3D_SVF_USED;
|
|
|
|
|
|
|
|
put_u32(&buffer, 0); /* name */
|
|
|
|
put_u32(&buffer, var->buffer_offset);
|
|
|
|
put_u32(&buffer, var->data_type->reg_size * sizeof(float));
|
|
|
|
put_u32(&buffer, flags);
|
2021-08-17 10:39:00 -07:00
|
|
|
put_u32(&buffer, 0); /* type */
|
2021-08-17 10:38:59 -07:00
|
|
|
put_u32(&buffer, 0); /* FIXME: default value */
|
2021-08-17 10:39:01 -07:00
|
|
|
|
|
|
|
if (profile->major_version >= 5)
|
|
|
|
{
|
|
|
|
put_u32(&buffer, 0); /* texture start */
|
|
|
|
put_u32(&buffer, 0); /* texture count */
|
|
|
|
put_u32(&buffer, 0); /* sampler start */
|
|
|
|
put_u32(&buffer, 0); /* sampler count */
|
|
|
|
}
|
2021-08-17 10:38:59 -07:00
|
|
|
}
|
|
|
|
}
|
2021-08-17 10:39:00 -07:00
|
|
|
|
|
|
|
j = 0;
|
|
|
|
LIST_FOR_EACH_ENTRY(var, &ctx->extern_vars, struct hlsl_ir_var, extern_entry)
|
|
|
|
{
|
|
|
|
if (var->is_uniform && var->buffer == cbuffer)
|
|
|
|
{
|
2021-08-17 10:39:01 -07:00
|
|
|
const unsigned int var_size = (profile->major_version >= 5 ? 10 : 6);
|
|
|
|
size_t var_offset = vars_start + j * var_size * sizeof(uint32_t);
|
2021-08-17 10:39:00 -07:00
|
|
|
size_t string_offset = put_string(&buffer, var->name);
|
|
|
|
|
|
|
|
set_u32(&buffer, var_offset, string_offset);
|
|
|
|
write_sm4_type(ctx, &buffer, var->data_type);
|
|
|
|
set_u32(&buffer, var_offset + 4 * sizeof(uint32_t), var->data_type->bytecode_offset);
|
|
|
|
++j;
|
|
|
|
}
|
|
|
|
}
|
2021-08-17 10:38:59 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
creator_offset = put_string(&buffer, vkd3d_shader_get_version(NULL, NULL));
|
|
|
|
set_u32(&buffer, creator_position, creator_offset);
|
|
|
|
|
|
|
|
dxbc_writer_add_section(dxbc, TAG_RDEF, buffer.data, buffer.size);
|
|
|
|
}
|
|
|
|
|
2021-08-19 16:44:28 -07:00
|
|
|
struct sm4_register
|
|
|
|
{
|
|
|
|
enum vkd3d_sm4_register_type type;
|
|
|
|
uint32_t idx[2];
|
|
|
|
unsigned int idx_count;
|
|
|
|
enum vkd3d_sm4_dimension dim;
|
|
|
|
};
|
|
|
|
|
|
|
|
struct sm4_instruction
|
|
|
|
{
|
|
|
|
enum vkd3d_sm4_opcode opcode;
|
|
|
|
|
|
|
|
struct
|
|
|
|
{
|
|
|
|
struct sm4_register reg;
|
|
|
|
unsigned int writemask;
|
|
|
|
} dst;
|
|
|
|
|
|
|
|
struct
|
|
|
|
{
|
|
|
|
struct sm4_register reg;
|
|
|
|
unsigned int swizzle;
|
|
|
|
} srcs[2];
|
|
|
|
unsigned int src_count;
|
|
|
|
|
2021-08-19 16:44:29 -07:00
|
|
|
uint32_t idx[2];
|
|
|
|
unsigned int idx_count;
|
|
|
|
|
2021-08-19 16:44:28 -07:00
|
|
|
unsigned int has_dst;
|
|
|
|
};
|
|
|
|
|
|
|
|
static unsigned int sm4_swizzle_type(enum vkd3d_sm4_register_type type)
|
|
|
|
{
|
|
|
|
switch (type)
|
|
|
|
{
|
|
|
|
case VKD3D_SM4_RT_CONSTBUFFER:
|
2021-08-19 16:44:29 -07:00
|
|
|
case VKD3D_SM4_RT_INPUT:
|
2021-08-19 16:44:28 -07:00
|
|
|
return VKD3D_SM4_SWIZZLE_VEC4;
|
|
|
|
|
|
|
|
default:
|
|
|
|
FIXME("Unhandled register type %#x.\n", type);
|
|
|
|
return VKD3D_SM4_SWIZZLE_VEC4;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static uint32_t sm4_encode_register(const struct sm4_register *reg)
|
|
|
|
{
|
|
|
|
return (reg->type << VKD3D_SM4_REGISTER_TYPE_SHIFT)
|
|
|
|
| (reg->idx_count << VKD3D_SM4_REGISTER_ORDER_SHIFT)
|
|
|
|
| (reg->dim << VKD3D_SM4_DIMENSION_SHIFT);
|
|
|
|
}
|
|
|
|
|
|
|
|
static uint32_t sm4_register_order(const struct sm4_register *reg)
|
|
|
|
{
|
|
|
|
uint32_t order = 1;
|
|
|
|
if (reg->type == VKD3D_SM4_RT_IMMCONST)
|
|
|
|
order += reg->dim == VKD3D_SM4_DIMENSION_VEC4 ? 4 : 1;
|
|
|
|
order += reg->idx_count;
|
|
|
|
return order;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void write_sm4_instruction(struct vkd3d_bytecode_buffer *buffer, const struct sm4_instruction *instr)
|
|
|
|
{
|
|
|
|
uint32_t token = instr->opcode;
|
|
|
|
unsigned int size = 1, i, j;
|
|
|
|
|
|
|
|
if (instr->has_dst)
|
|
|
|
size += sm4_register_order(&instr->dst.reg);
|
|
|
|
for (i = 0; i < instr->src_count; ++i)
|
|
|
|
size += sm4_register_order(&instr->srcs[i].reg);
|
2021-08-19 16:44:29 -07:00
|
|
|
size += instr->idx_count;
|
2021-08-19 16:44:28 -07:00
|
|
|
|
|
|
|
token |= (size << VKD3D_SM4_INSTRUCTION_LENGTH_SHIFT);
|
|
|
|
put_u32(buffer, token);
|
|
|
|
|
|
|
|
if (instr->has_dst)
|
|
|
|
{
|
|
|
|
token = sm4_encode_register(&instr->dst.reg);
|
|
|
|
if (instr->dst.reg.dim == VKD3D_SM4_DIMENSION_VEC4)
|
|
|
|
token |= instr->dst.writemask << VKD3D_SM4_WRITEMASK_SHIFT;
|
|
|
|
put_u32(buffer, token);
|
|
|
|
|
|
|
|
for (j = 0; j < instr->dst.reg.idx_count; ++j)
|
|
|
|
put_u32(buffer, instr->dst.reg.idx[j]);
|
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < instr->src_count; ++i)
|
|
|
|
{
|
|
|
|
token = sm4_encode_register(&instr->srcs[i].reg);
|
|
|
|
token |= sm4_swizzle_type(instr->srcs[i].reg.type) << VKD3D_SM4_SWIZZLE_TYPE_SHIFT;
|
|
|
|
token |= instr->srcs[i].swizzle << VKD3D_SM4_SWIZZLE_SHIFT;
|
|
|
|
put_u32(buffer, token);
|
|
|
|
|
|
|
|
for (j = 0; j < instr->srcs[i].reg.idx_count; ++j)
|
|
|
|
put_u32(buffer, instr->srcs[i].reg.idx[j]);
|
|
|
|
}
|
2021-08-19 16:44:29 -07:00
|
|
|
|
|
|
|
for (j = 0; j < instr->idx_count; ++j)
|
|
|
|
put_u32(buffer, instr->idx[j]);
|
2021-08-19 16:44:28 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
static void write_sm4_dcl_constant_buffer(struct vkd3d_bytecode_buffer *buffer, const struct hlsl_buffer *cbuffer)
|
|
|
|
{
|
|
|
|
const struct sm4_instruction instr =
|
|
|
|
{
|
|
|
|
.opcode = VKD3D_SM4_OP_DCL_CONSTANT_BUFFER,
|
|
|
|
|
|
|
|
.srcs[0].reg.dim = VKD3D_SM4_DIMENSION_VEC4,
|
|
|
|
.srcs[0].reg.type = VKD3D_SM4_RT_CONSTBUFFER,
|
|
|
|
.srcs[0].reg.idx = {cbuffer->reg.id, (cbuffer->used_size + 3) / 4},
|
|
|
|
.srcs[0].reg.idx_count = 2,
|
|
|
|
.srcs[0].swizzle = HLSL_SWIZZLE(X, Y, Z, W),
|
|
|
|
.src_count = 1,
|
|
|
|
};
|
|
|
|
write_sm4_instruction(buffer, &instr);
|
|
|
|
}
|
|
|
|
|
2021-08-19 16:44:29 -07:00
|
|
|
static void write_sm4_dcl_semantic(struct hlsl_ctx *ctx, struct vkd3d_bytecode_buffer *buffer, const struct hlsl_ir_var *var)
|
|
|
|
{
|
|
|
|
const struct hlsl_profile_info *profile = ctx->profile;
|
|
|
|
const bool output = var->is_output_semantic;
|
|
|
|
D3D_NAME usage;
|
|
|
|
bool has_idx;
|
|
|
|
|
|
|
|
struct sm4_instruction instr =
|
|
|
|
{
|
|
|
|
.dst.reg.dim = VKD3D_SM4_DIMENSION_VEC4,
|
|
|
|
.has_dst = 1,
|
|
|
|
};
|
|
|
|
|
|
|
|
if (hlsl_sm4_register_from_semantic(ctx, &var->semantic, output, &instr.dst.reg.type, &has_idx))
|
|
|
|
{
|
|
|
|
if (has_idx)
|
|
|
|
{
|
|
|
|
instr.dst.reg.idx[0] = var->semantic.index;
|
|
|
|
instr.dst.reg.idx_count = 1;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
instr.dst.reg.idx_count = 0;
|
|
|
|
}
|
|
|
|
instr.dst.writemask = (1 << var->data_type->dimx) - 1;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
instr.dst.reg.type = output ? VKD3D_SM4_RT_OUTPUT : VKD3D_SM4_RT_INPUT;
|
|
|
|
instr.dst.reg.idx[0] = var->reg.id;
|
|
|
|
instr.dst.reg.idx_count = 1;
|
|
|
|
instr.dst.writemask = var->reg.writemask;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (instr.dst.reg.type == VKD3D_SM4_RT_DEPTHOUT)
|
|
|
|
instr.dst.reg.dim = VKD3D_SM4_DIMENSION_SCALAR;
|
|
|
|
|
|
|
|
hlsl_sm4_usage_from_semantic(ctx, &var->semantic, output, &usage);
|
|
|
|
|
|
|
|
if (var->is_input_semantic)
|
|
|
|
{
|
|
|
|
switch (usage)
|
|
|
|
{
|
|
|
|
case D3D_NAME_UNDEFINED:
|
|
|
|
instr.opcode = (profile->type == VKD3D_SHADER_TYPE_PIXEL)
|
|
|
|
? VKD3D_SM4_OP_DCL_INPUT_PS : VKD3D_SM4_OP_DCL_INPUT;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case D3D_NAME_INSTANCE_ID:
|
|
|
|
case D3D_NAME_PRIMITIVE_ID:
|
|
|
|
case D3D_NAME_VERTEX_ID:
|
|
|
|
instr.opcode = (profile->type == VKD3D_SHADER_TYPE_PIXEL)
|
|
|
|
? VKD3D_SM4_OP_DCL_INPUT_PS_SGV : VKD3D_SM4_OP_DCL_INPUT_SGV;
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
instr.opcode = (profile->type == VKD3D_SHADER_TYPE_PIXEL)
|
|
|
|
? VKD3D_SM4_OP_DCL_INPUT_PS_SIV : VKD3D_SM4_OP_DCL_INPUT_SIV;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (profile->type == VKD3D_SHADER_TYPE_PIXEL)
|
|
|
|
instr.opcode |= VKD3DSIM_LINEAR << VKD3D_SM4_INTERPOLATION_MODE_SHIFT;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
if (usage == D3D_NAME_UNDEFINED || profile->type == VKD3D_SHADER_TYPE_PIXEL)
|
|
|
|
instr.opcode = VKD3D_SM4_OP_DCL_OUTPUT;
|
|
|
|
else
|
|
|
|
instr.opcode = VKD3D_SM4_OP_DCL_OUTPUT_SIV;
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (usage)
|
|
|
|
{
|
|
|
|
case D3D_NAME_COVERAGE:
|
|
|
|
case D3D_NAME_DEPTH:
|
|
|
|
case D3D_NAME_DEPTH_GREATER_EQUAL:
|
|
|
|
case D3D_NAME_DEPTH_LESS_EQUAL:
|
|
|
|
case D3D_NAME_TARGET:
|
|
|
|
case D3D_NAME_UNDEFINED:
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
instr.idx_count = 1;
|
|
|
|
instr.idx[0] = usage;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
write_sm4_instruction(buffer, &instr);
|
|
|
|
}
|
|
|
|
|
2021-08-17 10:38:58 -07:00
|
|
|
static void write_sm4_shdr(struct hlsl_ctx *ctx, struct dxbc_writer *dxbc)
|
|
|
|
{
|
|
|
|
const struct hlsl_profile_info *profile = ctx->profile;
|
|
|
|
struct vkd3d_bytecode_buffer buffer = {0};
|
2021-08-19 16:44:28 -07:00
|
|
|
const struct hlsl_buffer *cbuffer;
|
2021-08-19 16:44:29 -07:00
|
|
|
const struct hlsl_ir_var *var;
|
2021-08-17 10:38:58 -07:00
|
|
|
|
|
|
|
static const uint16_t shader_types[VKD3D_SHADER_TYPE_COUNT] =
|
|
|
|
{
|
|
|
|
VKD3D_SM4_PS,
|
|
|
|
VKD3D_SM4_VS,
|
|
|
|
VKD3D_SM4_GS,
|
|
|
|
VKD3D_SM5_HS,
|
|
|
|
VKD3D_SM5_DS,
|
|
|
|
VKD3D_SM5_CS,
|
|
|
|
0, /* EFFECT */
|
|
|
|
0, /* TEXTURE */
|
|
|
|
VKD3D_SM4_LIB,
|
|
|
|
};
|
|
|
|
|
2021-08-19 16:44:25 -07:00
|
|
|
put_u32(&buffer, vkd3d_make_u32((profile->major_version << 4) | profile->minor_version, shader_types[profile->type]));
|
2021-08-17 10:38:58 -07:00
|
|
|
put_u32(&buffer, 0); /* FIXME: instruction token count */
|
|
|
|
|
2021-08-19 16:44:28 -07:00
|
|
|
LIST_FOR_EACH_ENTRY(cbuffer, &ctx->buffers, struct hlsl_buffer, entry)
|
|
|
|
{
|
|
|
|
if (cbuffer->reg.allocated)
|
|
|
|
write_sm4_dcl_constant_buffer(&buffer, cbuffer);
|
|
|
|
}
|
|
|
|
|
2021-08-19 16:44:29 -07:00
|
|
|
LIST_FOR_EACH_ENTRY(var, &ctx->extern_vars, struct hlsl_ir_var, extern_entry)
|
|
|
|
{
|
|
|
|
if ((var->is_input_semantic && var->last_read) || (var->is_output_semantic && var->first_write))
|
|
|
|
write_sm4_dcl_semantic(ctx, &buffer, var);
|
|
|
|
}
|
|
|
|
|
2021-08-17 10:38:58 -07:00
|
|
|
dxbc_writer_add_section(dxbc, TAG_SHDR, buffer.data, buffer.size);
|
|
|
|
}
|
2021-08-17 10:38:57 -07:00
|
|
|
|
|
|
|
int hlsl_sm4_write(struct hlsl_ctx *ctx, struct hlsl_ir_function_decl *entry_func, struct vkd3d_shader_code *out)
|
|
|
|
{
|
|
|
|
struct dxbc_writer dxbc;
|
2021-08-17 10:38:58 -07:00
|
|
|
size_t i;
|
|
|
|
int ret;
|
2021-08-17 10:38:57 -07:00
|
|
|
|
|
|
|
dxbc_writer_init(&dxbc);
|
|
|
|
|
2021-08-19 16:44:27 -07:00
|
|
|
write_sm4_signature(ctx, &dxbc, false);
|
|
|
|
write_sm4_signature(ctx, &dxbc, true);
|
2021-08-17 10:38:59 -07:00
|
|
|
write_sm4_rdef(ctx, &dxbc);
|
2021-08-17 10:38:58 -07:00
|
|
|
write_sm4_shdr(ctx, &dxbc);
|
|
|
|
|
2021-08-19 16:44:27 -07:00
|
|
|
if (!(ret = ctx->result))
|
|
|
|
ret = dxbc_writer_write(&dxbc, out);
|
2021-08-17 10:38:58 -07:00
|
|
|
for (i = 0; i < dxbc.section_count; ++i)
|
|
|
|
vkd3d_free((void *)dxbc.sections[i].data);
|
|
|
|
return ret;
|
2021-08-17 10:38:57 -07:00
|
|
|
}
|