Unknown W. Brackets
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3c73d0d1f1
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armjit: Read fpu control regs other than 0/31 as 0.
Always seem to give zero, regardless of the value of fcr31, etc.
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2013-11-14 23:39:39 -08:00 |
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Unknown W. Brackets
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763eff181d
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Fix handling of jalr when delay slot changes rd.
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2013-11-14 23:39:13 -08:00 |
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Unknown W. Brackets
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26f5922174
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Return the correct value for fcr0/fir.
This is what the PSP actually returns, it's read only.
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2013-11-14 23:39:08 -08:00 |
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Unknown W. Brackets
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98fb2e0402
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armjit: Refer to R11 as MEMBASEREG for clarity.
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2013-11-14 23:37:48 -08:00 |
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Sacha
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e3bdb3e09b
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Disable LitPool as it is causing crashes with Vertex Decoder JIT. Performance seems to be almost unaffected since the IMM changes.
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2013-11-15 14:12:00 +10:00 |
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Sacha
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20e8a81268
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Switch to compile-time ARMV7 define.
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2013-11-15 11:20:39 +10:00 |
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Henrik Rydgard
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9a14d33372
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Disable software divide that appears to be buggy, see #4539
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2013-11-14 17:25:02 +01:00 |
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Henrik Rydgård
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ef8631c57f
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Cache VFPU_CTRL_CC in a register
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2013-11-12 17:58:29 +01:00 |
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Henrik Rydgard
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df3765a320
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Arm jit: optimize ES, NS conditions in vcmp. Bugfix TR.
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2013-11-12 14:43:12 +01:00 |
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Unknown W. Brackets
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f4b5e8a4c1
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Merge pull request #4518 from hrydgard/fpcond
ARMJIT: Cache fpcond in a register to avoid store/load between compare and branch
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2013-11-12 01:50:16 -08:00 |
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Henrik Rydgård
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17074f5a7f
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Cache fpcond in a register to avoid store/load between compare and branch
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2013-11-12 10:33:38 +01:00 |
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Unknown W. Brackets
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32504ed46e
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armjit: Prioritize spilling regs not used soon.
This may improve trashing.
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2013-11-12 00:03:39 -08:00 |
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Unknown W. Brackets
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1bfce12fdd
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armjit: Report some unexpected situations.
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2013-11-11 23:41:18 -08:00 |
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Unknown W. Brackets
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ac5aacbd16
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armjit: Spill an imm armreg back to an imm.
We might be able to avoid the store or etc.
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2013-11-11 23:39:13 -08:00 |
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Unknown W. Brackets
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bb960480c8
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x86/armjit: Stop compiling on a jump to invalid.
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2013-11-10 21:59:50 -08:00 |
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Unknown W. Brackets
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359110f010
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x86/armjit: Add jump following (off by default.)
Inlines function calls up to a certain extent. Allows us to get
immediates all the way to a syscall, for example, usually.
Not sure if faster.
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2013-11-10 21:59:49 -08:00 |
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Unknown W. Brackets
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aacb31bc18
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armjit: Copy over (disabled) immbranch optim.
This does a little loop unrolling. Costs a bit more cache space, but
avoids flushing regs for longer.
Not enabled.
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2013-11-10 21:59:48 -08:00 |
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Unknown W. Brackets
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92ecff4396
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armjit: keep track of instructions in jitstate.
To match x86.
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2013-11-10 21:59:48 -08:00 |
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Unknown W. Brackets
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8ceaafc159
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armjit: Verify free space while compiling.
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2013-11-10 21:59:48 -08:00 |
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Unknown W. Brackets
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ca7b2b554b
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armjit: fix major typo breaking mult/multu.
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2013-11-10 21:54:44 -08:00 |
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Unknown W. Brackets
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e1fffdb37a
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armjit: Don't reload an armreg ptr marked noinit.
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2013-11-10 16:43:38 -08:00 |
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Unknown W. Brackets
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67eaa2fd1c
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armjit: Optimize immediate load/stores in a row.
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2013-11-10 16:32:48 -08:00 |
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Unknown W. Brackets
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bc0a846475
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armjit: Optimize imm addresses (could do better...)
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2013-11-10 16:30:20 -08:00 |
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Unknown W. Brackets
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c63560c0dd
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armjit: Try to find imms to optimize a reg load.
This way we skip the MOVW/MOVT and go for one op only.
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2013-11-10 16:20:34 -08:00 |
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Unknown W. Brackets
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7e46ee0b0f
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armjit: Replace MOVI2R with using the regcache.
So that it can optimize the value with existing imms.
Not actually optimizing yet.
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2013-11-10 15:50:45 -08:00 |
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