Unknown W. Brackets
bed9c82d0a
armjit: Try to use nearby immediates in slti/u.
2014-03-14 19:26:52 -07:00
Unknown W. Brackets
e783627947
armjit: Use our I2R funcs on reg/reg math too.
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When one is a known immediate. This should catch more cases, like:
ori v0, $0, 0xFFFF
and v1, v1, v0
2014-03-14 19:15:43 -07:00
Unknown W. Brackets
8e979da0f9
armjit: Use our I2R arm optimizations.
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Should help cases of ori and andi most, but also addiu. They will all try
to use an optimized immediate (from another nearby value) if possible.
2014-03-14 19:15:43 -07:00
Unknown W. Brackets
c229232236
armjit: Specifically optimize check for negative.
2014-03-14 19:15:39 -07:00
Unknown W. Brackets
628390f3fa
armjit: Tiny optimization for cast to short.
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See these sometimes in code, skip the load of R0 when we can.
2014-03-14 19:15:39 -07:00
Unknown W. Brackets
ca0a8d0269
armjit: fix lwl/lwr from an imm address.
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Can't skip loading the reg value. Likely cause of #5057 , possibly other
bugs as well.
2014-03-13 00:23:00 -07:00
Henrik Rydgard
174b5187e6
Arm VFPU: 2-op and 3-op: map registers before work, improving instruction order a little.
2014-03-12 11:06:26 +01:00
Henrik Rydgard
7ae9c26b6a
Enable the new vreg flushing mechanism on ARM.
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Reduce logspam seen in a couple games.
2014-03-12 10:15:09 +01:00
Henrik Rydgard
ea6fb9337c
Second attempt at flushing multiple VFPU regs using VSTMIA.
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Also disabled, but seems to work, just needs testing.
Much better code this time and works for VFPU regs not just FPU regs.
2014-03-11 21:55:17 +01:00
Henrik Rydgard
adadf11890
An attempt to combine FPU regcache writebacks with VSTMIA. Disabled due to bugs.
2014-03-11 11:03:51 +01:00
Sacha
30a6a5d10f
ARMJIT: Implement VLDM/VSTM load/store combinations and use in armjit. Also add them to disassembler.
2014-03-07 02:56:34 +10:00
Henrik Rydgård
b2260149ae
ARM Jit: Avoid materializing some unnecessary immediates in loads/stores
2014-03-03 14:33:22 +01:00
Henrik Rydgård
00c32ddadb
Mostly get rid of including "Globals.h"
2013-12-30 10:17:11 +01:00
Unknown W. Brackets
e6b2d00a2f
Avoid reseved identifiers like _SP, etc.
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R_SP is not that bad.
2013-12-29 14:25:34 -08:00
Henrik Rydgard
455a73bba7
Bugfix replace function inlining (compilerPC needs to be increased). Misc.
2013-12-20 15:37:37 +01:00
Henrik Rydgård
3957b5fb42
Call ProxyBlock in ArmJit too. Plus various cleanup and one more string function.
2013-12-19 11:45:39 +01:00
Unknown W. Brackets
438361d0bc
Clean up code pointer naming for the jit.
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Now it properly identifies thunk code which is actually a decent percent
when fastmem is off at least.
2013-12-18 23:57:39 -08:00
Henrik Rydgard
1cb7965cb1
Jit feature preparation: Introduce "proxy blocks".
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When these are invalidated, the block they point to gets invalidated too.
Will be useful to implement various types of block merging and function inlining
without affecting correctness of cache clears etc.
Also, with this commit we can now fully inline replaced functions. fabsf() boils
down to 1-2 instructions and the block continues, for example.
2013-12-19 00:39:49 +01:00
Henrik Rydgard
6937719c3b
Minor fixes around function replacement, a couple of math funcs
2013-12-18 10:35:50 +01:00
Henrik Rydgard
1d2f1efd06
Fix function replacement on ARM
2013-12-18 00:09:08 +01:00
Henrik Rydgard
2eab4aa1bf
Play around with function replacement. Turned off by default of course.
2013-12-17 23:40:27 +01:00
Henrik Rydgard
2140892074
Initial preparations for ability to replace game functions with custom implementations.
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Also auto-saves hashmap additions and reapplies the hashmap on function
rename so that if you rename a function that exists in several copies
they will all be labelled.
Note that actual function replacement is not activated yet.
2013-12-17 12:27:20 +01:00
Henrik Rydgard
5a02ea9ff4
Fix cache instruction on ARM
2013-12-10 13:26:32 +01:00
Henrik Rydgard
2d8429ac48
Assorted cleanup in the MIPS emulation
2013-12-10 13:15:16 +01:00
Henrik Rydgard
0a5aa78011
ARMJit: Fix bug in instruction mtv, affecting SSX
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SSX still has other problems on ARM though.
2013-12-10 00:19:18 +01:00
