Unknown W. Brackets
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d092f7dd2d
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armjit: Remember reg imm values even after flush.
This way, we can base other imm values off them, or even do imm math using
them. We can also avoid re-flushing an imm.
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2013-11-10 15:50:14 -08:00 |
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Unknown W. Brackets
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7f9cbc0f10
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armjit: Minor cleanup and logging tweaks.
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2013-11-10 15:12:40 -08:00 |
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Unknown W. Brackets
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455a7e090d
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Compile the cache instruction to nothing.
Was showing up in a few profiles, does nothing currently.
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2013-11-10 14:38:10 -08:00 |
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Unknown W. Brackets
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1cc68f50ca
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armjit: Small optimization to syscall instr.
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2013-11-10 14:38:10 -08:00 |
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Unknown W. Brackets
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b30928036e
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armjit: Avoid flushing an imm in beq/bne/etc.
We might be able to STMIA it instead.
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2013-11-10 14:38:10 -08:00 |
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Unknown W. Brackets
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285ec1fad5
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armjit: Implement mult/multu for immediates.
Uncommon, but may reduce instructions a bit.
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2013-11-10 14:38:09 -08:00 |
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Unknown W. Brackets
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9bec82873c
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armjit: inline byteswaps of imm values.
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2013-11-10 14:38:08 -08:00 |
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Unknown W. Brackets
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06c8cb9174
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armjit: Do shifts with imms as much as possible.
This may even make an imm operand2 safe that wasn't before.
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2013-11-10 14:38:08 -08:00 |
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Unknown W. Brackets
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b2c2a87511
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Fix omitted CC_AL reset, fixes #4498.
Was breaking non-fastmem lwl/lwr/etc.
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2013-11-10 09:24:40 -08:00 |
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Unknown W. Brackets
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b310edc5f8
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Fix typo in ARM debug build.
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2013-11-09 15:58:27 -08:00 |
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Henrik Rydgard
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d1c012d75e
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ARM: Open up all 32 accessible VFP registers if NEON is available.
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2013-11-09 20:18:20 +01:00 |
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Henrik Rydgard
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0a844ce98d
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Delete functions for vsge and vslt, these have been rolled into VecDo3
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2013-11-09 19:29:52 +01:00 |
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Unknown W. Brackets
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a3a061a69f
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armjit: Optimize a division by a power of two.
These really happen.
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2013-11-09 08:43:53 -08:00 |
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Unknown W. Brackets
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1776c85882
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armjit: Implement a software divide for divu.
It's not actually that much code.
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2013-11-09 08:43:52 -08:00 |
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Unknown W. Brackets
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b2a240d105
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armjit: Implement msub/msubu.
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2013-11-09 08:43:52 -08:00 |
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Unknown W. Brackets
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3aa8706ae7
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armjit: Optimize lwl/lwr against an imm address.
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2013-11-09 08:43:48 -08:00 |
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Unknown W. Brackets
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4026944b02
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armjit: Handle lwl/lwr (not pretty, though.)
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2013-11-09 08:42:30 -08:00 |
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Unknown W. Brackets
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54168b173e
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armjit: Clean up some magic numbers.
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2013-11-09 08:25:08 -08:00 |
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Unknown W. Brackets
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6038d96b46
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armjit: Flush regs using STMIA where possible.
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2013-11-09 08:25:07 -08:00 |
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Unknown W. Brackets
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e686ff59bf
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armjit: Allocate regs in preferred slots.
This may allow better flushing. Not sure if these are the best regs,
but if they aren't it shouldn't really hurt.
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2013-11-09 08:25:07 -08:00 |
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Unknown W. Brackets
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cb3bb73148
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armjit: Improve GPR typesafety.
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2013-11-09 08:24:15 -08:00 |
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Unknown W. Brackets
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945b8bf5c5
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armjit: optimize reverse subtract, avoid temp imms.
If we have a non-op2 imm, get rid of it asap. If we have a op2 friendly
imm, keep it.
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2013-11-09 08:18:43 -08:00 |
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Unknown W. Brackets
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415f22ecac
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armjit: Preserve imms on min/max as well.
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2013-11-09 08:18:43 -08:00 |
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Henrik Rydgard
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502f772856
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Add experimental mode to cache pointers in the arm jit.
Turned off for now as it needs more work but seems quite promising already.
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2013-11-09 17:15:30 +01:00 |
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Henrik Rydgard
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58c39a38ee
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ARM regcache: Add mechanism to keep registers converted to pointers around
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2013-11-09 16:57:29 +01:00 |
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