dasharo/litex
0
0
Fork 0
mirror of https://github.com/Dasharo/litex.git synced 2026-03-06 14:58:06 -08:00
Code Issues Packages Projects Releases Wiki Activity

Commit Graph

  • a4498dcd03 nax dma wip, WARNING soc.py Dolu1990 2023-08-28 18:57:45 +02:00
  • 82602f660c interconnect/stream: Fix #1736. Florent Kermarrec 2023-08-28 16:19:31 +02:00
  • 70e52b76fa CHANGES: Update. Florent Kermarrec 2023-08-28 16:04:43 +02:00
  • d29d2c09bb interconnect/stream: Minor review/cleanup. Florent Kermarrec 2023-08-28 16:02:41 +02:00
  • 8efcc4fdea Merge pull request #1736 from rowanG077/buf-endpoint-cfg enjoy-digital 2023-08-28 15:58:46 +02:00
  • f7b35f09ae build/efinix/efinity: don't hardcode efinity version, read from scripts/sw_version.txt Gwenhael Goavec-Merou 2023-08-28 14:43:17 +02:00
  • 8f54386aab gen/fhdl/module: Add some comments. Florent Kermarrec 2023-08-24 09:10:55 +02:00
  • a125f9aa6f Merge pull request #1752 from enjoy-digital/naxriscv_update enjoy-digital 2023-08-22 16:29:08 +02:00
  • 6d8c04b401 cpu/naxriscv: Update recommended version. Florent Kermarrec 2023-08-22 15:50:08 +02:00
  • 8f7f97a713 fix plic/clint regions + dts Dolu1990 2023-08-18 19:29:41 +02:00
  • 8302cf2e79 got nax 2 cores to run linux Dolu1990 2023-08-18 10:01:28 +02:00
  • 1520d0f382 Merge pull request #1745 from alexey-morozov/master Gwenhael Goavec-Merou 2023-08-16 15:18:57 +02:00
  • cd1012470e To allow offline installation, the "liteiclink" package has to be installed before the "liteeth" package. Otherwise, to satisfy the dependency requirements, the setup will attempt to download the "liteiclink" package from the internet and will consequently fail. Alexey Morozov 2023-08-16 09:39:03 +02:00
  • 4d7a7f5ba1 Merge pull request #1742 from Icenowy/gwddrfix Gwenhael Goavec-Merou 2023-08-16 08:01:29 +02:00
  • c1d8db396d build/gowin/common: Fix DDRInput Icenowy Zheng 2023-08-11 14:56:56 +08:00
  • 577674bff2 test: Add minimal test_spi_mmap with simulation of SPIMaster. Florent Kermarrec 2023-08-04 17:51:07 +02:00
  • 688dae0112 cores/spi: Add new SPIMMAP core allowing doing SPI accesses directly from MMAP. Florent Kermarrec 2023-08-04 17:24:51 +02:00
  • 036193d046 CHANGES: Update. Florent Kermarrec 2023-08-04 16:08:00 +02:00
  • 587981a6b8 interconnect/csr_bus: Improve description. Florent Kermarrec 2023-08-01 17:11:13 +02:00
  • bfd4dcdefc interconnect/ahb: Cleanup and document a bit. Florent Kermarrec 2023-08-01 16:52:20 +02:00
  • 87e2456274 CHANGES.md: Update. Florent Kermarrec 2023-07-31 18:00:43 +02:00
  • cb06949604 soc/add_etherbone: Expose arp_entries parameter. Florent Kermarrec 2023-07-31 17:59:18 +02:00
  • e257ff916f soc/cores/interconnect: Rely on WaitTimer's new automatic cast to int. Florent Kermarrec 2023-07-31 11:32:48 +02:00
  • bf79c9032a gen/genlib/misc/WaitTimer: Cast t to int and minor cosmetic cleanup. Florent Kermarrec 2023-07-31 11:27:47 +02:00
  • b8dc1b7757 Merge pull request #1738 from trabucayre/fix_toolchain enjoy-digital 2023-07-31 08:57:52 +02:00
  • 1a74854e55 litex_setup: fix software build when liteeth or/and litesata is set (riscv toolchain issue) Gwenhael Goavec-Merou 2023-07-30 15:37:51 +02:00
  • b2e4b22145 soc/add_pcie: Add with_ptm parameter and update CHANGES. Florent Kermarrec 2023-07-30 15:12:01 +02:00
  • 91e1e53662 soc/interconnect/stream: BufferizeEndpoints params rowanG077 2023-07-30 00:24:26 +02:00
  • ff67781f11 interconnect/axi/axi_common: Document constants. Florent Kermarrec 2023-07-28 09:26:53 +02:00
  • ff18374c52 interconnect/axi/axi_common: Document helper functions. Florent Kermarrec 2023-07-28 09:15:52 +02:00
  • 717fb131fd interconnect/axi: Switch to LiteXModule. Florent Kermarrec 2023-07-28 09:15:22 +02:00
  • ed12f8787d litex/gen: Add some comments. Florent Kermarrec 2023-07-27 16:18:30 +02:00
  • 095cfb7811 litex/gen: Split common in common/context/reduce/signal. Florent Kermarrec 2023-07-27 15:02:37 +02:00
  • 74401d6f03 CHANGES: Update. Florent Kermarrec 2023-07-27 13:58:45 +02:00
  • bbf944c3ba build/efinix/efinity: Fix build with 2023.1. Florent Kermarrec 2023-07-27 13:55:20 +02:00
  • 924da55ea0 stream/AsyncFIFO: Add a minimum of 2 buffers on Efinix FPGAs to fix issues on hardware. Florent Kermarrec 2023-07-27 13:29:05 +02:00
  • 72a1592bee litex/gen: Add initial/minimal LiteXContext to easily get build context from modules. Florent Kermarrec 2023-07-27 13:27:15 +02:00
  • 20ce982da2 software/bios: Fix missing CSR_SDCARD_CORE_BASE update. Florent Kermarrec 2023-07-26 16:30:52 +02:00
  • 66b44ecd60 soc/add_uart: Fix stub behavior (sink/source swap), thanks @zyp. Florent Kermarrec 2023-07-26 12:26:16 +02:00
  • 0f1fdea893 build/xilinx/vivado: Also generate design checkpoint after synthesis and placement. Florent Kermarrec 2023-07-21 19:53:10 +02:00
  • 35cd744adc CHANGES: Update. Florent Kermarrec 2023-07-21 15:16:42 +02:00
  • 330d61d2bd soc/add_pcie: Remove MSI workaround on Ultrascale(+) now that root cause is understood/fixed (thanks @smunaut). Florent Kermarrec 2023-07-21 14:50:38 +02:00
  • aae15737cd CHANGES: Update. Florent Kermarrec 2023-07-20 16:30:48 +02:00
  • c00f61d9d7 tools: Update to new sdcard core name. Florent Kermarrec 2023-07-20 16:29:05 +02:00
  • 6693a723d1 software: Update to new sdcard core name. Florent Kermarrec 2023-07-20 16:28:51 +02:00
  • 0152e7de8e soc/add_sata: Use name parameter to allow multiple sdcard instances. Florent Kermarrec 2023-07-20 16:28:22 +02:00
  • e364316814 soc/add_sata: Use name parameter to allow multiple sata instances. Florent Kermarrec 2023-07-20 15:58:48 +02:00
  • f995d74e55 soc/add_uartbone: Rename name parameter to uart_name to allow multiple uartbone (also for consistency with other cores) and other minor cleanups. Florent Kermarrec 2023-07-20 15:36:18 +02:00
  • 6e78db6767 soc/add_bus_master: Use name where possible to avoid automatic naming and improve log readability. Florent Kermarrec 2023-07-20 15:15:44 +02:00
  • f6da67fb38 soc/add_pcie: Add optional data_width parameter. Florent Kermarrec 2023-07-20 10:35:10 +02:00
  • 69c6fa11d2 build/lattice/common/lattice_ecp5_trellis_special_overrides: Add missing DifferentialOutput. Florent Kermarrec 2023-07-17 17:08:35 +02:00
  • 6ab156e225 soc/cores: Fix regressions. Florent Kermarrec 2023-07-17 11:48:39 +02:00
  • 79a82dc732 tools/litex_json2dts_linux: Remove duplicated clock definition. Florent Kermarrec 2023-07-17 11:27:07 +02:00
  • 3d101b9749 integration/export: When csr_base is specified, make CSR regions definition relative to it. Florent Kermarrec 2023-07-17 11:14:17 +02:00
  • 3fc16f54f1 soc/cores/cpu: Switch to LiteXModule. Florent Kermarrec 2023-07-17 09:26:58 +02:00
  • 39ff69ade7 cores/spi: Switch to LiteXModule. Florent Kermarrec 2023-07-17 09:14:47 +02:00
  • 028f7eb72f cores/ram: Switch to LiteXModule. Florent Kermarrec 2023-07-17 09:12:25 +02:00
  • b35c6580e8 soc/cores/clock: Switch to LiteXModule. Florent Kermarrec 2023-07-15 21:39:46 +02:00
  • 8103cf7851 soc/cores: Switch cores to LiteXModule (still need to do cpu, ram, clk, spi). Florent Kermarrec 2023-07-14 22:17:45 +02:00
  • 6e46710678 gen/fhdl/module: Fix CSR clock domain renaming to cores converted to LiteXModule, thanks @smunaut. Florent Kermarrec 2023-07-14 10:01:32 +02:00
  • 987a35e1ec Merge pull request #1729 from riktw/master Dolu1990 2023-07-13 15:21:51 +02:00
  • 3a2586c48b soc/add_pcie: Remove csr_ordering parameter (not useful and remove on litepcie). Florent Kermarrec 2023-07-12 19:42:54 +02:00
  • f9e32eb3eb CHANGES: Update. Florent Kermarrec 2023-07-11 16:42:21 +02:00
  • eb1afbad47 Currently using a lite or minimal Vexriscv config with debug and breakpoints throws an error. Updated the GCC_FLAGS to include these two variants as well. riktw 2023-07-11 16:16:51 +02:00
  • 26732f626f CHANGES: Update. Florent Kermarrec 2023-07-10 11:23:10 +02:00
  • d18c6316f4 gen/fhdl/verilog: Improve signal sort by name instead of duid to improve reproducibility. Florent Kermarrec 2023-07-10 11:22:03 +02:00
  • 698b4dd875 Merge pull request #1728 from stone3311/master enjoy-digital 2023-07-10 08:31:07 +02:00
  • 42c422e767 cores/arm: Fix computed goto in boot helpers stone3311 2023-07-09 19:16:06 +02:00
  • e62f51c3eb gen/genlib/cdc: Add missing import. Florent Kermarrec 2023-07-07 11:51:04 +02:00
  • 2b941cdcd9 gen/genlib: Add copy of genlib.cdc modules that we are using and not supported by Amaranth to prepare #1727. Florent Kermarrec 2023-07-06 22:23:54 +02:00
  • e9739b5446 soc: Switch to litex.gen.genlib.misc. Florent Kermarrec 2023-07-06 22:05:23 +02:00
  • 6f98053b1a litex/gen: Add copy of genlib.misc to prepare for #1727. Florent Kermarrec 2023-07-06 22:03:41 +02:00
  • ec43ca77ed Merge pull request #1724 from stone3311/master Gwenhael Goavec-Merou 2023-07-06 09:15:13 +02:00
  • 54f466772b cores/zynqmp: Fix boot helper stone3311 2023-07-05 20:13:36 +02:00
  • c58f46bb79 CHANGES: Update. Florent Kermarrec 2023-07-03 18:09:56 +02:00
  • a2d44370bd CHANGES: Update. Florent Kermarrec 2023-07-03 10:56:29 +02:00
  • 7fa7a4c72a soc/add_ethernet: Review/Minor changes to TXSlots write-only mode. Florent Kermarrec 2023-07-03 10:50:47 +02:00
  • 646c917d7f Merge pull request #1720 from sensille/tx_write_only enjoy-digital 2023-07-03 10:45:52 +02:00
  • 886994aaa4 Merge pull request #1721 from rasmuspeders1/master Tim 'mithro' Ansell 2023-06-30 10:05:45 -07:00
  • 26ed13a300 Assume cpu count 1 if not present Rasmus Pedersen 2023-06-30 13:45:40 +02:00
  • 8d33dc364f Only add "cpu PC <opensbi_base>" if opensbi is present Rasmus Pedersen 2023-06-30 13:44:31 +02:00
  • a12703b4ee litex_json2renode: only add cpu timeProvider if time_provider exists Rasmus Pedersen 2023-06-29 14:13:49 +02:00
  • 648c70de82 cmd_litesata: Fix help printf and update CHANGES. Florent Kermarrec 2023-06-28 23:07:17 +02:00
  • b7cbd6c7fb Merge pull request #1715 from gsomlo/gls-sata-multisector enjoy-digital 2023-06-28 23:03:15 +02:00
  • 74c3ba0992 Merge branch 'enjoy-digital:master' into tx_write_only Arne Jansen 2023-06-28 18:56:05 +02:00
  • 2cdc4fb0ab ci: Use last known working version of Verilator for Microwatt (Thanks @trabucayre). Florent Kermarrec 2023-06-27 14:32:20 +02:00
  • 5524a17702 add tx_write_only flag to add_ethernet Arne Jansen 2023-06-27 09:45:50 +02:00
  • 7a7c74faa9 fix radiant bug 'Mal-formed command line - please check for extra quotes in macro' (#1718) Nate Slager 2023-06-23 23:57:44 -07:00
  • 8dca488432 software/bios/cmd_litesata: add multisector read/write test Gabriel Somlo 2023-06-21 15:20:42 -04:00
  • 1d2eddbe37 software/bios/cmd_litesata: add multi-sector xfer between SATA and memory Gabriel Somlo 2023-06-20 13:32:40 -04:00
  • 7d1e12c870 software/liblitesata: update to multi-sector read, write Gabriel Somlo 2023-06-20 13:26:30 -04:00
  • a9d6a0c6c9 CHANGES: Update. Florent Kermarrec 2023-06-22 17:40:41 +02:00
  • fbe3fcf76a CHANGES: Update. Florent Kermarrec 2023-06-21 12:46:16 +02:00
  • 7b5515ced4 cores/pwm: Simplify pwm generation and avoid potential glitch on reset. Florent Kermarrec 2023-06-19 23:02:50 +02:00
  • 298ec03dae Merge pull request #1713 from shenki/microwatt-socregion enjoy-digital 2023-06-19 19:23:11 +02:00
  • d2aae18957 soc/add_pcie/MSI-X: Pass csr_ordering to LitePCIeMSIX. Florent Kermarrec 2023-06-19 19:21:05 +02:00
  • 94a0a5b0d8 soc/add_pcie: Add msi_width parameter to select MSI width. Florent Kermarrec 2023-06-19 09:54:10 +02:00
  • a9cbb16785 soc/add_pcie: Add msi_type parameter to select MSI, MSI-Multi-Vector or MSI-X. Florent Kermarrec 2023-06-19 09:44:37 +02:00
  • ae22f4028a microwatt: Correct SoCRegion typo Joel Stanley 2023-06-18 21:55:27 +09:30
  • 6e5651b320 CHANGES: Update. Florent Kermarrec 2023-06-16 08:33:23 +02:00