5152 Commits

Author SHA1 Message Date
Giovanni Mascellani
5b2d62e59a vkd3d: Explicitly call the appropriate waiting function in the fence worker.
Avoid using an indirect call that makes the code less clear for no
real advantage.
2025-01-21 14:09:29 +01:00
Shaun Ren
f3f2880261 vkd3d-shader/d3d-asm: Print vocp registers with subscript. 2025-01-21 14:05:21 +01:00
Shaun Ren
a9d7c65eb8 vkd3d-shader/hlsl: Forbid declaring parameters as both out and const.
Note that inout const parameters are allowed.
2025-01-21 14:03:44 +01:00
Giovanni Mascellani
22d0841412 vkd3d: Support signalling a fence once all outstanding work is submitted to Vulkan.
When the client acquires the Vulkan queue it has to ensure that
it is not submitting work before other work it depends on already
submitted through the Direct3D 12 API but currently in the internal
vkd3d queue. Currently we suggest to enqueue signalling a fence and
than wait for it before acquiring the Vulkan queue, which is
correct but excessive: it will wait not just for the work currently
in the queue to be submitted, but for it to be executed too,
introducing useless dependencies.

By adding a way to enqueue signalling a fence on the CPU side we
allow the client to wait for the currently outstanding work to
be submitted to Vulkan, but nothing more.
2025-01-21 14:02:22 +01:00
Giovanni Mascellani
bdb8291f6c vkd3d: Release queued fences when stopping the fence worker. 2025-01-21 13:45:33 +01:00
Giovanni Mascellani
ed7a846e2e vkd3d: Only call d3d12_fence_garbage_collect_vk_semaphores_locked() when using binary semaphores.
The function is specific to binary semaphores, and will unconditionally
access the "u.binary" field of struct vkd3d_signaled_semaphore.
2025-01-21 13:45:27 +01:00
Shaun Ren
4fbfb44681 vkd3d-shader/spirv: Emit the tessellator domain for domain shaders.
Commit 1ed8d907b3998b847daa26154ca0261f55f0de23 inadvertently dropped
emitting the tessellator domain for domain shaders. Although Vulkan
environments allow us to write the tessellator domain from the hull
shader, the domain shader, or both, that's not generally true for OpenGL
environments.
2025-01-20 15:50:04 +01:00
Shaun Ren
802d7317cb vkd3d-shader/hlsl: Implement the InterlockedXor() intrinsic. 2025-01-20 15:42:45 +01:00
Shaun Ren
cbd504e888 vkd3d-shader/hlsl: Implement the InterlockedOr() intrinsic. 2025-01-20 15:42:45 +01:00
Shaun Ren
5b9634a7b7 vkd3d-shader/hlsl: Implement the InterlockedMin() intrinsic. 2025-01-20 15:42:43 +01:00
Shaun Ren
63fbe161f2 vkd3d-shader/hlsl: Implement the InterlockedMax() intrinsic. 2025-01-20 15:42:07 +01:00
Shaun Ren
b447fdce51 vkd3d-shader/hlsl: Implement the InterlockedExchange() intrinsic. 2025-01-20 15:41:07 +01:00
Shaun Ren
3fb47373a1 vkd3d-shader/hlsl: Implement the InterlockedCompareStore() intrinsic. 2025-01-20 15:41:07 +01:00
Shaun Ren
22ab08f4d8 vkd3d-shader/hlsl: Implement the InterlockedCompareExchange() intrinsic. 2025-01-20 15:41:07 +01:00
Shaun Ren
3b19a4aaf3 vkd3d-shader/hlsl: Implement the InterlockedAnd() intrinsic. 2025-01-20 15:41:07 +01:00
Shaun Ren
660a71ef22 vkd3d-shader/hlsl: Implement the InterlockedAdd() intrinsic. 2025-01-20 15:40:34 +01:00
Conor McCarthy
10edcec030 vkd3d: Do not require the ALLOW_DEPTH_STENCIL flag for depth/stencil formats in GetCopyableFootprints(). 2025-01-20 14:37:13 +01:00
Conor McCarthy
e99906f05d vkd3d: Return correctly aligned depth/stencil sizes from GetCopyableFootprints(). 2025-01-20 13:59:46 +01:00
Conor McCarthy
1a4dedbc8d vkd3d: Return the correct depth/stencil plane format from GetCopyableFootprints(). 2025-01-20 13:45:16 +01:00
Giovanni Mascellani
17adde7f73 vkd3d: Describe DXGI_UNKNOWN as having one plane.
We're explicitly replacing zero with one in the only place where the
plane count being zero or one makes a difference. It also make sense:
UNKNOWN is used for buffers, which for all intents and purposes have one
plane.
2025-01-20 13:43:36 +01:00
Nikolay Sivov
a082daeb56 vkd3d-shader/hlsl: Implement the isinf() intrinsic.
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2025-01-16 19:25:02 +01:00
Henri Verbeet
ce4f2728ba vkd3d-shader/msl: Get rid of a stray vkd3d_string_buffer_printf() in the VEC4 UINT immediate constant handling.
Uncovered by the ininf() test in the next commit. This is why we insist
on test coverage; unfortunately this one slipped through in
fd1beedc07becc7e5e49b64273f7bde7f9a8b2a0.
2025-01-16 19:18:08 +01:00
Francisco Casas
cf19b4da49 vkd3d-shader/hlsl: Specialize lowering SM1 casts to int for vertex shaders.
Vertex shaders do not have CMP, so we use SLT and MAD.

For example, this vertex shader:

    uniform float4 f;

    void main(inout float4 pos : position, out float4 t1 : TEXCOORD1)
    {
        t1 = (int4)f;
    }

results in:

    vs_2_0
    dcl_position v0
    slt r0, c0, -c0
    frc r1, c0
    add r2, -r1, c0
    slt r1, -r1, r1
    mad oT1, r0, r1, r2
    mov oPos, v0

while we have the lower_cmp() pass, each time it is applied many
instructions are generated, so this patch introduces a specialized
version of the cast-to-int lowering for efficiency.
2025-01-16 18:48:35 +01:00
Francisco Casas
2d91bd9200 vkd3d-shader/hlsl: Properly lower casts to int for negative numbers.
While it looks complicated, it is what fxc/d3dcompiler does.

A shader as simple as:

    float4 f;

    float4 main() : sv_target
    {
        return (int4)f;
    }

results in the following instructions:

    ps_2_0
    def c1, 0, 1, 0, 0
    frc r0, c0
    cmp r1, -r0, c1.x, c1.y
    add r0, -r0, c0
    mov r2, c0
    cmp r1, r2, c1.x, r1
    add r0, r0, r1
    mov oC0, r0
2025-01-16 18:46:49 +01:00
Francisco Casas
efd7f2e014 vkd3d-shader/hlsl: Don't lower separate samples with texel offsets. 2025-01-14 17:59:50 +01:00
Francisco Casas
0a5955372a vkd3d-shader/hlsl: Lower separate SampleGrad() for SM1. 2025-01-14 17:59:50 +01:00
Giovanni Mascellani
c7e173a1ff vkd3d: Log the requested feature levels for D3D12_FEATURE_FEATURE_LEVELS. 2025-01-13 16:41:53 +01:00
Henri Verbeet
4227858cfe vkd3d-shader/hlsl: Move RDEF generation to hlsl_codegen.c. 2025-01-10 20:03:14 +01:00
Francisco Casas
9b3b47b1b8 vkd3d-shader: Avoid left shifting signed integers. (ubsan)
Otherwise ubsan reports these errors on the bitwise.shader_test:

    libs/vkd3d-shader/hlsl_constant_ops.c:970:50: runtime error: left shift of 1 by 31 places cannot be represented in type 'int'
    libs/vkd3d-shader/hlsl_constant_ops.c:970:50: runtime error: left shift of negative value -12
2025-01-10 19:51:55 +01:00
Francisco Casas
8056058aa1 vkd3d-shader: Avoid passing NULL to memset(). (ubsan)
Otherwise ubsan reports errors such as:

    libs/vkd3d-shader/spirv.c:7266:5: runtime error: null pointer passed as argument 1, which is declared to never be null
2025-01-10 19:51:55 +01:00
Francisco Casas
7b23cd4d3c vkd3d-shader: Avoid passing NULL to qsort(). (ubsan)
Otherwise ubsan reports runtime errors such as:

    libs/vkd3d-shader/ir.c:4731:5: runtime error: null pointer passed as argument 1, which is declared to never be null
2025-01-10 19:51:55 +01:00
Francisco Casas
eaf4d0bfbf vkd3d-shader: Avoid passing NULL to memcpy(). (ubsan)
Otherwise when passing "-fsanitize=undefined" to the compiler, ubsan
reports such as:

   libs/vkd3d-shader/ir.c:3794:5: runtime error: null pointer passed as argument 1, which is declared to never be null
2025-01-10 19:51:43 +01:00
Elizabeth Figura
29bac62ba2 vkd3d-shader/hlsl: Move the "dimx" and "dimy" fields to the type-specific union. 2025-01-10 19:38:13 +01:00
Elizabeth Figura
392398794f vkd3d-shader/d3dbc: Do not access the type dimensions for non-numeric types. 2025-01-10 19:24:21 +01:00
Elizabeth Figura
1ff1a51e4b vkd3d-shader/hlsl: Avoid some uses of the default case when switching over hlsl_base_type.
Since we have -Wswitch, this forces the developer to update all relevant
switches when an enum case is added.

Places where the default is just a FIXME are left alone.
2025-01-10 19:24:10 +01:00
Shaun Ren
646087d54c vkd3d-shader/hlsl: Collect together terms with constant coefficients.
We apply distributivity to applicable expressions, specifically with
the following rewrite rules:

  (x OPL a) OPR (x OPL b) -> x OPL (a OPR b)
  (y OPR (x OPL a)) OPR (x OPL b) -> y OPR (x OPL (a OPR b))
  ((x OPL a) OPR y) OPR (x OPL b) -> (x OPL (a OPR b)) OPR y
  (x OPL a) OPR ((x OPL b) OPR y) -> (x OPL (a OPR b)) OPR y
  (x OPL a) OPR (y OPR (x OPL b)) -> (x OPL (a OPR b)) OPR y

where a, b are constants.
2025-01-10 19:17:43 +01:00
Henri Verbeet
45d9a097e6 vkd3d-shader/hlsl: Move sm4_free_extern_resources() to hlsl_codegen.c. 2024-12-19 21:09:32 +01:00
Henri Verbeet
b143754360 vkd3d-shader/hlsl: Move sm4_get_extern_resources() to hlsl_codegen.c. 2024-12-19 21:09:32 +01:00
Henri Verbeet
0236c480e3 vkd3d-shader/hlsl: Make sm4_get_interpolation_mode() static. 2024-12-19 21:09:32 +01:00
Giovanni Mascellani
4f7eb890ef vkd3d-shader/ir: Validate OUTCONTROLPOINT source parameters. 2024-12-19 21:06:13 +01:00
Giovanni Mascellani
495e10e93b vkd3d-shader/ir: Validate INCONTROLPOINT source parameters. 2024-12-19 21:06:13 +01:00
Giovanni Mascellani
513609ef0e vkd3d-shader/ir: Validate INPUT source parameters. 2024-12-19 21:06:13 +01:00
Giovanni Mascellani
23d4bd1dae vkd3d-shader/ir: Validate PATCHCONST source parameters using a uniform helper. 2024-12-19 21:06:13 +01:00
Giovanni Mascellani
67420aa8b6 vkd3d-shader/ir: Validate OUTPUT source parameters using a uniform helper. 2024-12-19 21:06:13 +01:00
Giovanni Mascellani
7de7025750 vkd3d-shader/ir: Disallow array signature elements for normalisation levels < SM6. 2024-12-19 21:06:13 +01:00
Elizabeth Figura
d164752efc vkd3d-shader/d3dbc: Introduce d3dbc_parse_register(). 2024-12-18 17:30:16 +01:00
Elizabeth Figura
3c53293028 vkd3d-shader/ir: Separate VKD3DSPR_OUTPUT and VKD3DSPR_TEXCRDOUT.
This simplifies the IR.
2024-12-18 17:30:16 +01:00
Elizabeth Figura
8132239ed2 vkd3d-shader/ir: Separate VKD3DSPR_ADDR and VKD3DSPR_TEXTURE.
This simplifies the IR.
2024-12-18 17:30:16 +01:00
Elizabeth Figura
0df5dea653 vkd3d-shader/d3d-asm: Define register names in a table. 2024-12-18 17:30:16 +01:00
Elizabeth Figura
65f3f56f63 vkd3d-shader/d3dbc: Normalize to a single VKD3DSPR_CONST register set when reading.
We don't need VKD3DSPR_CONST2 et al in the IR, even for disassembly.
2024-12-18 17:30:16 +01:00