Conor McCarthy
4c8c31fa2e
tests/hlsl: Add a shader model 5.1 test to srv-byteaddressbuffer.shader_test.
...
Some code paths for TPF handling are not tested if no 5.1 shaders are
compiled.
2025-04-23 18:11:42 +02:00
Shaun Ren
5d29554fed
tests/hlsl: Add geometry shader stream output syntax tests.
2025-04-23 18:03:59 +02:00
Giovanni Mascellani
a189a4cfb7
tests/hlsl: Do not test the implicit passthrough control point phase for SM6.
2025-04-16 16:43:45 +02:00
Giovanni Mascellani
dbd1938ce4
tests/hlsl: Fix the precision for a 16-bit arithmetic test.
2025-04-16 16:42:20 +02:00
Giovanni Mascellani
3186d66596
tests/hlsl: Do not test dst() on integer arguments with SM6.
...
That seems to hit a DXC bug we're not interested into.
2025-04-16 16:36:58 +02:00
Giovanni Mascellani
9db9f3bdaf
tests/hlsl: Do not test 16-bit out-of-bound varyings.
2025-04-16 16:35:23 +02:00
Giovanni Mascellani
26656808e6
tests/hlsl: Remove a test in which a function reads an "out" argument.
...
The code doesn't make sense in the first place, even if it's
accepted by the compiler, so it makes sense that the behaviour
is undefined. And indeed the behaviour is different on AMD (4 is
returned), NVIDIA (QNaN is returned) and WARP (device is removed).
2025-04-16 16:30:19 +02:00
Giovanni Mascellani
df1aecb7bd
tests/hlsl: Do not test 16-bit out-of-bound UAV writes.
2025-04-16 16:28:42 +02:00
Giovanni Mascellani
0ac661f571
tests/hlsl: Do not test 16-bit out-of-bound SRV buffer reads.
...
They do not behave consistently between AMD, NVIDIA and WARP, so
there is little point enforcing a specific behaviour.
2025-04-16 16:25:26 +02:00
Giovanni Mascellani
4412a83655
tests: Create structured buffers with the appropriate stride.
...
The stride didn't match the structure size used in the shader.
This didn't seem to be a problem on AMD and WARP, but it was
on NVIDIA on Windows. Specifically, it seems that the buffer
is read using the shader structure size (so most tests pass),
but bounds are checked using the buffer stride, so a test
returned zero simply because an out-of-bounds read was detected.
2025-04-14 15:56:01 +02:00
Francisco Casas
7b21059ee5
vkd3d-shader/hlsl: Support the .Length property for Textures.
...
Wine-Bug: https://bugs.winehq.org/show_bug.cgi?id=57686
2025-04-14 15:47:16 +02:00
Francisco Casas
2dce34d7e0
tests/hlsl: Test the object .Length property.
2025-04-14 15:41:47 +02:00
Feifan He
ba7a9a0b29
vkd3d-shader/msl: Implement VKD3DSIH_LD.
...
Co-authored-by: Giovanni Mascellani <gmascellani@codeweavers.com >
2025-04-14 15:27:02 +02:00
Conor McCarthy
fdd21470b9
tests/hlsl: Test casts from double to 16-bit integer types.
2025-04-09 16:39:07 +02:00
Conor McCarthy
bb8b4f3827
tests/hlsl: Test casts to 16-bit uint.
2025-04-09 16:22:19 +02:00
Conor McCarthy
3c950e5977
tests/hlsl: Test casts to 16-bit int.
2025-04-09 16:20:58 +02:00
Conor McCarthy
88a85024e2
tests/hlsl: Test casts to 16-bit float.
2025-04-09 16:20:53 +02:00
Victor Chiletto
89d3e667e0
tests/hlsl: Add tests for SRV structured buffers.
2025-04-08 19:31:40 +02:00
Victor Chiletto
cc9f4ac587
tests/hlsl: Attempt to deduce the data type of unspecified type texture data.
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Try parsing first as integer, and if the parse stops at a decimal separator, parse as float.
2025-04-08 19:18:57 +02:00
Anna (navi) Figueiredo Gomes
3e8b56c509
vkd3d-shader/fx: Don't cast between int and uint in state blocks.
2025-04-08 19:14:15 +02:00
Anna (navi) Figueiredo Gomes
8866a43b2d
tests/hlsl: Add some fx_4_0 state tests.
2025-04-08 19:14:15 +02:00
Nikolay Sivov
2540081988
vkd3d-shader/fx: Accept int(0) as well as uint(0) constant value for object-type states.
...
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com >
2025-04-02 19:34:25 +02:00
Elizabeth Figura
33cd10581e
vkd3d-shader/glsl: Invert gl_FragCoord w.
2025-04-02 19:32:39 +02:00
Shaun Ren
3e44bd4e5b
tests/hlsl: Add a test for copy-propagation of uniform texture object writes.
2025-04-02 18:51:10 +02:00
Francisco Casas
3ead8d532b
vkd3d-shader/hlsl: Allow non-constant deref propagation on SM1.
...
Note that we still have to preempt the propagation to SM1 pixel shader
uniforms. Otherwise this will turn the many constant derefs that appear
from the <index-val> copy generated in lower_index_loads() into a single
non-constant deref, causing it to allocate all the registers instead of
up until the last one used.
2025-04-02 18:27:16 +02:00