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2513 Commits

Author SHA1 Message Date
Giovanni Mascellani
a10de1b239 vkd3d-shader/hlsl: Free the individual attributes in func_prototype (Valgrind). 2024-02-09 22:47:45 +01:00
Giovanni Mascellani
049327a270 vkd3d-shader/hlsl: Free the parse initializer in attribute (Valgrind). 2024-02-09 22:47:44 +01:00
Giovanni Mascellani
521082afbe vkd3d-shader/hlsl: Free variable identifiers in primary_expr (Valgrind). 2024-02-09 22:47:42 +01:00
Conor McCarthy
625e289574 vkd3d-shader/dxil: Handle hyperbolic trigonometric functions in sm6_parser_emit_dx_unary(). 2024-02-07 22:59:23 +01:00
Conor McCarthy
c35ec4f820 vkd3d-shader/dxil: Implement DX intrinsic TextureStore. 2024-02-07 22:59:18 +01:00
Conor McCarthy
efddcc9a99 vkd3d-shader/dxil: Support forward-referenced value ids. 2024-02-07 22:59:10 +01:00
Conor McCarthy
7f87a3e5fc vkd3d-shader/spirv: Handle the ACOS, ASIN and ATAN instructions in spirv_compiler_emit_ext_glsl_instruction(). 2024-02-06 23:09:55 +01:00
Conor McCarthy
19d23fa696 vkd3d-shader/dxil: Handle inverse trigonometric functions in sm6_parser_emit_dx_unary(). 2024-02-06 23:09:53 +01:00
Giovanni Mascellani
51f13391e6 vkd3d-shader/ir: Introduce a simple control flow graph structurizer. 
The structurizer is implemented along the lines of what is usually called
the "structured program theorem": the control flow is completely
virtualized by mean of an additional TEMP register which stores the
block index which is currently running. The whole program is then
converted to a huge switch construction enclosed in a loop, executing
at each iteration the appropriate block and updating the register
depending on block jump instruction.

The algorithm's generality is also its major weakness: it accepts any
input program, even if its CFG is not reducible, but the output
program lacks any useful convergence information. It satisfies the
letter of the SPIR-V requirements, but it is expected that it will
be very inefficient to run on a GPU (unless a downstream compiler is
able to devirtualize the control flow and do a proper convergence
analysis pass). The algorithm is however very simple, and good enough
to at least pass tests, enabling further development. A better
alternative is expected to be upstreamed incrementally.

Side note: the structured program theorem is often called the
Böhm-Jacopini theorem; Böhm and Jacopini did indeed prove a variation
of it, but their algorithm is different from what is commontly attributed
to them and implemented here, so I opted for not using their name.
 2024-02-06 23:07:07 +01:00
Giovanni Mascellani
19aef21369 vkd3d-shader/ir: Handle PHI nodes when materializing SSA registers. 
PHI nodes cannot be used with TEMP registers, so they have to be
converted to MOV/MOVC nodes and moved before the BRANCH node.
 2024-02-06 23:07:03 +01:00
Giovanni Mascellani
e0d3e9c376 vkd3d-shader/ir: Materialize SSA registers to temporaries. 
For simplicity PHI nodes are not currently handled.

The goal for this pass is to make the CFG structurizer simpler, because
it doesn't have to care about the more rigid rules SSA registers have
to satisfy than TEMP registers.

It is likely that the generated code will be harder for downstream
compilers to optimize and execute efficiently, so once a complete
structurizer is in place this pass should be removed, or at least
greatly reduced in scope.
 2024-02-06 23:07:00 +01:00
Giovanni Mascellani
eb723a8d2b vkd3d-shader/spirv: Support bool TEMP registers. 2024-02-06 23:06:58 +01:00
Giovanni Mascellani
49f0fd42b8 vkd3d-shader/spirv: Move bool casting helpers above register loading helpers. 2024-02-06 23:06:55 +01:00
Giovanni Mascellani
ee994e95dd vkd3d-shader/spirv: Convert the swizzle according to the source bit width. 
Fixes: 1f536238a8
 2024-02-06 23:06:53 +01:00
Giovanni Mascellani
674f86042d vkd3d-shader/dxil: Set the register before calling src_param_init_scalar(). 
Which uses the register to compute the appropriate swizzle.

Fixes: 1f536238a8
 2024-02-06 23:06:49 +01:00
Conor McCarthy
95e4222cc6 vkd3d-shader/spirv: Emit a vector bitcast if necessary in spirv_compiler_emit_load_ssa_reg(). 2024-02-01 22:25:04 +01:00
Conor McCarthy
ebec0aa434 vkd3d-shader/dxil: Implement DX intrinsic TextureLoad. 2024-02-01 22:25:02 +01:00
Conor McCarthy
e6d52861e9 vkd3d-shader/dxil: Implement DX intrinsic SplitDouble. 2024-02-01 22:24:58 +01:00
Giovanni Mascellani
cc72a8d311 vkd3d-shader/spirv: Free binary SPIR-V code (Valgrind). 2024-02-01 00:08:28 +01:00
Henri Verbeet
d38221bd68 vkd3d-shader/ir: Pass a struct vsir_program to shader_parser_get_src_params(). 2024-02-01 00:08:23 +01:00
Henri Verbeet
47ec24ebad vkd3d-shader/ir: Pass a struct vsir_program to shader_parser_get_dst_params(). 2024-02-01 00:08:22 +01:00
Henri Verbeet
ced8543952 vkd3d-shader: Use vkd3d_atomic_increment_u32() in vkd3d_shader_dump_blob(). 2024-02-01 00:08:18 +01:00
Henri Verbeet
fef30dac2c vkd3d-shader/d3dbc: Do not fail parsing the shader when undeclared inputs are encountered. 
These can be disassembled by D3DDisassemble() just fine, and perhaps
more importantly, shader model 1 vertex shaders do not require dcl_
instructions in Direct3D 8.
 2024-01-29 22:33:46 +01:00
Giovanni Mascellani
edc406d297 vkd3d-shader/ir: Check that SSA registers are used with compatible data types. 
Specifically, accesses are always 32 bit or always 64 bit.
 2024-01-29 22:33:34 +01:00
Giovanni Mascellani
1f536238a8 vkd3d-shader: Use 64 bit swizzles for 64 bit data types in VSIR. 
The handling of write masks and swizzles for 64 bit data types is
currently irregular: write masks are always 64 bit, while swizzles
are usually 32 bit, except for SSA registers with are 64 bit.
With this change we always use 64 bit swizzles, in order to make
the situation less surprising and make it easier to convert
registers between SSA and TEMP.

64 bit swizzles are always required to have X in their last two
components.
 2024-01-29 22:33:33 +01:00
Giovanni Mascellani
2b93aae069 vkd3d-shader: Convert write masks between 32 and 64 bit by cases. 
There are only three cases, and while the code is longer it is also
hopefully easier to read. Moreover, an error message is casted if
we're doing something unexpected.
 2024-01-29 22:33:30 +01:00
Francisco Casas
13f713f74b vkd3d-shader/hlsl: Turn register(cX) reservations into buffer offset for SM4. 2024-01-29 22:33:27 +01:00
Francisco Casas
c7f7636534 vkd3d-shader/hlsl: Make register(cX) reservations work for SM1. 2024-01-29 22:33:25 +01:00
Conor McCarthy
92f0b37133 vkd3d-shader/spirv: Support 64-bit source value for bitfield instructions. 2024-01-29 22:33:22 +01:00
Conor McCarthy
3bbe374ca8 vkd3d-shader/dxil: Implement DX intrinsic Tertiary. 
IBFE and UBFE are not emitted for HLSL sources which perform bitfield
extractions, e.g. loading a value from a struct containing bitfields, or
the equivalent done with bit shifts. These instructions are probably
only emitted by the TPF -> DXIL converter, which makes them hard to test.
 2024-01-29 22:33:20 +01:00
Giovanni Mascellani
026c502f31 vkd3d-shader/ir: Fixup PHI nodes when lowering switches to selection ladders. 
A map between the blocks before and after the pass is built and then
used to fix the PHI nodes.
 2024-01-29 22:33:17 +01:00
Giovanni Mascellani
378109051c vkd3d-shader/ir: Lower monolithic switches to selection ladders. 
PHI nodes must be fixed up after this pass, because the block references
might have become broken. For simplicitly this is not handled yet.

The goal for this pass is to make the CFG structurizer simpler, because
only conditional and unconditional branches must be supported.
Eventually this limitation might be lifted if there is advantage in
doing so.
 2024-01-29 22:33:15 +01:00
Giovanni Mascellani
b97edee03d vkd3d-shader/spirv: Emit an error if merge information is missing. 
Instead of crashing.
 2024-01-29 22:33:14 +01:00
Conor McCarthy
e08c0cfc4f vkd3d-shader/dxil: Implement DX intrinsic RawBufferLoad. 2024-01-29 22:33:10 +01:00
Conor McCarthy
1bab93843d vkd3d-shader/dxil: Load raw/structured buffer SRV/UAV descriptors. 2024-01-29 22:33:09 +01:00
Henri Verbeet
fee3b94563 vkd3d-shader: Start an if-block on VKD3DSIH_IFC in vkd3d_shader_scan_instruction(). 2024-01-25 22:24:50 +01:00
Conor McCarthy
f954724870 vkd3d-shader/spirv: Handle the TAN instruction in spirv_compiler_emit_ext_glsl_instruction(). 2024-01-25 22:24:44 +01:00
Conor McCarthy
93d7c30395 vkd3d-shader/dxil: Handle DX intrinsic Tan in sm6_parser_emit_dx_unary(). 2024-01-25 22:24:43 +01:00
Conor McCarthy
2a260b8d56 vkd3d-shader/dxil: Implement DX intrinsics Cos and Sin. 2024-01-25 22:24:41 +01:00
Francisco Casas
cec45da45b vkd3d-shader/ir: Update flatten_control_flow_constructs() comment. 2024-01-25 22:24:27 +01:00
Conor McCarthy
8ae69c745b vkd3d-shader/spirv: Handle thread group UAV barriers. 2024-01-25 22:24:23 +01:00
Conor McCarthy
18e9148f58 vkd3d-shader/spirv: Include Uniform in the memory semantics for UAV barriers. 
The UniformMemory semantic applies the constraints to Uniform storage
class memory, which matches how UAV variables are declared.
 2024-01-25 22:24:22 +01:00
Conor McCarthy
adfbecef3c vkd3d-shader/spirv: Handle globally coherent UAVs. 2024-01-25 22:24:20 +01:00
Henri Verbeet
eabcaf15fb vkd3d-shader/ir: Use vsir_instruction_is_dcl() in vsir_validate_instruction(). 2024-01-24 22:38:36 +01:00
Henri Verbeet
365ad56888 vkd3d-shader/ir: Get rid of shader_instruction_is_dcl(). 2024-01-24 22:38:34 +01:00
Conor McCarthy
54f6e6dd67 vkd3d-shader/spirv: Check for FEATURE_FLOAT64 when double precision use is flagged. 2024-01-24 22:38:09 +01:00
Conor McCarthy
e973271a40 vkd3d-shader/spirv: Handle the ISINF and ISNAN instructions in spirv_compiler_emit_alu_instruction(). 2024-01-24 22:38:04 +01:00
Conor McCarthy
cd674d593e vkd3d-shader/spirv: Implement the ISFINITE instruction. 2024-01-24 22:38:03 +01:00
Conor McCarthy
41cce4cbf1 vkd3d-shader/dxil: Handle floating point special value comparisons in sm6_parser_emit_dx_unary(). 2024-01-24 22:37:59 +01:00
Francisco Casas
b92f6c448a vkd3d-shader/ir: Lower texkill instructions to discard_nz. 2024-01-24 22:37:41 +01:00
Francisco Casas
7e75ac63a1 vkd3d-shader/d3dbc: Emit fixme for HLSL_RESOURCE_SAMPLE_LOD. 
Currently, HLSL_RESOURCE_SAMPLE_LOD is not implemented for d3dbc,
but we are incorrectly writting a texld instruction to handle it.
This causes SM1 tests with the vulkan backend (in following patches)
to fail if VKD3D_SHADER_CONFIG="force_validation" is enabled.

For now a fixme is emited in these cases.
 2024-01-24 22:37:38 +01:00
Henri Verbeet
bf628f0c74 vkd3d-shader/ir: Store block names in struct vsir_program. 2024-01-23 20:27:35 +01:00
Henri Verbeet
f3c7d2d05c vkd3d-shader/ir: Store the block count in struct vsir_program. 2024-01-23 20:27:34 +01:00
Henri Verbeet
98c6e85b33 vkd3d-shader/ir: Store control point counts in struct vsir_program. 2024-01-23 20:27:32 +01:00
Conor McCarthy
e4660fe0e6 vkd3d-shader/spirv: Emit DISCARD as a function call. 2024-01-23 20:26:59 +01:00
Conor McCarthy
367a06d748 vkd3d-shader/dxil: Use strcmp() to find the handle type. 
We use strcmp() on the same type name elsewhere, and case-insensitive
matching does not seem necessary.
 2024-01-23 20:26:53 +01:00
Conor McCarthy
1cca18a228 vkd3d-shader/dxil: Use strcmp() to find function names. 
Function names are case-sensitive.
 2024-01-23 20:26:52 +01:00
Conor McCarthy
4dec25cbde vkd3d-shader/dxil: Use strcmp() to check the entry point name. 
Function names are case-sensitive.
 2024-01-23 20:26:50 +01:00
Zebediah Figura
a8b0c03912 vkd3d-shader/hlsl: Always cast to bool in if() statements. 
We emit sm4 if_nz for these, but that does a bitwise comparison to zero, which is wrong for floats.
 2024-01-23 20:26:46 +01:00
Zebediah Figura
183172eff4 vkd3d-shader/hlsl: Validate that condition expressions are numeric. 2024-01-23 20:26:45 +01:00
Zebediah Figura
09220edd21 vkd3d-shader/hlsl: Validate the condition data type for loops as well. 2024-01-23 20:26:44 +01:00
Zebediah Figura
c18a349a3f vkd3d-shader/hlsl: Copy some missing fields in hlsl_type_clone(). 2024-01-23 20:26:42 +01:00
Giovanni Mascellani
de9725b6ba vkd3d-shader/ir: Remove DCL_TEMPS instructions. 
We have to do work to keep it updated across passes and we never read it.
 2024-01-23 20:26:38 +01:00
Giovanni Mascellani
4b869f73bb vkd3d-shader/ir: Run tracing and validation for DXIL code too. 2024-01-23 20:26:36 +01:00
Conor McCarthy
6df725718a vkd3d-shader/ir: Refactor return code checking in vkd3d_shader_normalise(). 
We started with only one or two of these but it has become excessive.

Patch originally written by Conor McCarthy and updated by Giovanni Mascellani.
 2024-01-23 20:26:34 +01:00
Conor McCarthy
b3903636f7 vkd3d-shader/dxil: Implement DX intrinsic Binary. 2024-01-23 20:26:29 +01:00
Conor McCarthy
6c71cd5a72 vkd3d-shader/dxil: Add an operand type code for the return type. 2024-01-23 20:26:28 +01:00
Nikolay Sivov
0117e4fb7e vkd3d-shader/fx: Add initial support for writing passes for fx_2_0. 
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
 2024-01-23 20:26:22 +01:00
Nikolay Sivov
b478f0a300 vkd3d-shader/fx: Add initial support for writing fx_2_0 binaries. 
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
 2024-01-23 20:26:21 +01:00
Nikolay Sivov
56100d36b1 vkd3d-shader/fx: Check technique type in global scope as well. 
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
 2024-01-23 20:26:20 +01:00
Nikolay Sivov
2c1905b780 vkd3d-shader/hlsl: Allow annotations on techniques. 
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
 2024-01-23 20:26:19 +01:00
Nikolay Sivov
76a689d43f vkd3d-shader/hlsl: Allow annotations on passes. 
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
 2024-01-23 20:26:18 +01:00
Nikolay Sivov
e72f8f9a30 vkd3d-shader/hlsl: Add passes variables to the techniques. 
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
 2024-01-23 20:26:16 +01:00
Nikolay Sivov
fe8881747b vkd3d-shader/hlsl: Add initial support for parsing annotations. 
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
 2024-01-23 20:26:15 +01:00
Giovanni Mascellani
232b2ad360 vkd3d-shader/ir: Validate PHI instructions. 2024-01-23 20:26:08 +01:00
Giovanni Mascellani
56f9057985 vkd3d-shader/ir: Do not allow IMMCONST and IMMCONST64 as destination registers. 2024-01-23 20:26:06 +01:00
Giovanni Mascellani
21633fcc52 vkd3d-shader/ir: Refactor register-type-specific code in parameter validation. 
To better accommodate code for other register types.
 2024-01-23 20:26:05 +01:00
Giovanni Mascellani
fb6409bda1 vkd3d-shader/ir: Check that all instructions appear in a block. 2024-01-23 20:26:03 +01:00
Giovanni Mascellani
dc56320b31 vkd3d-shader/tpf: Support SV_ViewportArrayIndex in pixel and vertex shaders. 2024-01-22 22:19:14 +01:00
Giovanni Mascellani
3a90f3e29d vkd3d-shader/tpf: Support SV_InstanceID in vertex shaders. 2024-01-22 22:19:13 +01:00
Giovanni Mascellani
b500381b5c vkd3d-shader/tpf: Support SV_RenderTargetArrayIndex in pixel and vertex shaders. 2024-01-22 22:19:12 +01:00
Giovanni Mascellani
45495f54f2 vkd3d-shader/spirv: Use capability ShaderViewportIndexLayerEXT for decoration ViewportIndex. 2024-01-22 22:19:11 +01:00
Giovanni Mascellani
6ac525d6c3 vkd3d-shader/spirv: Use capability ShaderViewportIndexLayerEXT for decoration Layer. 
Capability Geometry allows to use the Layer builtin in geometry and pixel
shaders. For vertex and domain shaders ShaderLayer should be used, but it's only
available starting from SPIR-V 1.5. ShaderViewportIndexLayerEXT can be used
instead with extension SPV_EXT_shader_viewport_index_layer.
 2024-01-22 22:19:09 +01:00
Henri Verbeet
adc02eada8 vkd3d-shader/ir: Store the temporary register count in struct vsir_program. 2024-01-22 22:18:53 +01:00
Henri Verbeet
94ca46916a vkd3d-shader/ir: Store the SSA register count in struct vsir_program. 2024-01-22 22:18:52 +01:00
Henri Verbeet
7b85cd6a31 vkd3d-shader/ir: Store the "use_vocp" field in struct vsir_program. 2024-01-22 22:18:51 +01:00
Henri Verbeet
23dcd4f22b vkd3d-shader/ir: Store the shader version in struct vsir_program. 2024-01-22 22:18:50 +01:00
Henri Verbeet
fc9043be3c vkd3d-shader/ir: Introduce struct vsir_program. 2024-01-22 22:18:48 +01:00
Conor McCarthy
55c7cd5c22 vkd3d-shader/dxil: Handle semantic kind ISFRONTFACE. 2024-01-22 22:18:33 +01:00
Conor McCarthy
9f409b67d7 vkd3d-shader/dxil: Handle semantic kind VERTEXID. 2024-01-22 22:18:32 +01:00
Conor McCarthy
ca7487a56d vkd3d-shader/spirv: Handle UINT32_MAX result from FIRSTBIT_HI and FIRSTBIT_SHI instructions. 2024-01-22 22:18:27 +01:00
Conor McCarthy
bfdc8b31a3 vkd3d-shader/dxil: Implement DX intrinsic BufferLoad for typed buffers. 2024-01-22 22:18:21 +01:00
Conor McCarthy
85052ba93e vkd3d-shader/dxil: Load typed UAV descriptors. 2024-01-22 22:18:19 +01:00
Conor McCarthy
89d1ef83f4 vkd3d-shader/dxil: Load typed SRV descriptors. 2024-01-22 22:18:18 +01:00
Conor McCarthy
5ebe0cc717 vkd3d-shader/spirv: Do not assert VKD3D_DATA_UINT in spirv_compiler_emit_ld_raw_structured_srv_uav(). 2024-01-22 22:18:17 +01:00
Conor McCarthy
80d7ea2924 vkd3d-shader/dxil: Pass the code block and instruction in a struct to intrinsic handlers. 
Simplifies handling of intrinsics which need to emit more than one
instruction.
 2024-01-22 22:18:16 +01:00
Henri Verbeet
f69c8b1cc4 vkd3d-shader/d3dbc: Store the "offset" field as an unsigned int in hlsl_sm1_register_from_semantic(). 2024-01-18 23:16:06 +01:00
Giovanni Mascellani
67902d4304 vkd3d-shader/ir: Validate RET instructions. 2024-01-18 23:15:58 +01:00
Giovanni Mascellani
af96730276 vkd3d-shader/ir: Validate SWITCH_MONOLITHIC instructions. 2024-01-18 23:15:57 +01:00
Giovanni Mascellani
46ebb404d7 vkd3d-shader/ir: Validate BRANCH instructions. 2024-01-18 23:15:56 +01:00