Commit Graph

411 Commits

Author SHA1 Message Date
Giovanni Mascellani
1c93d706d7 vkd3d-shader/ir: Merge removing I/O declarations in the general instruction lowering pass. 2024-12-03 14:36:13 +01:00
Giovanni Mascellani
4717775abb vkd3d-shader/ir: Remove I/O declarations before flattening hull shader phases. 2024-12-03 14:19:50 +01:00
Giovanni Mascellani
4ef946287c vkd3d-shader/ir: Remove I/O declarations before normalising hull shader control point I/O. 2024-12-03 14:19:50 +01:00
Giovanni Mascellani
66382f0d68 vkd3d-shader/ir: Remove I/O declarations before I/O normalisation. 2024-12-03 14:19:50 +01:00
Giovanni Mascellani
18e422dfe4 vkd3d-shader/ir: Encode I/O declarations in vsir_program.
Most I/O registers are already described by the shader signatures.
The registers that are not do not have any property other then
being used by the program or not, so they can be collectively
described with a bitmap.
2024-12-03 14:19:24 +01:00
Elizabeth Figura
d56601c8d0 vkd3d-shader/ir: Implement exponential fog. 2024-12-02 17:12:20 +01:00
Elizabeth Figura
1fbbc82f3a vkd3d-shader/ir: Allow controlling the fog source through a parameter. 2024-12-02 17:12:16 +01:00
Elizabeth Figura
fc98cb482f vkd3d-shader/ir: Add a couple of traces for signature remapping. 2024-12-02 17:12:13 +01:00
Elizabeth Figura
f86d1e72a4 vkd3d-shader/ir: Allow controlling fog through parameters.
Fog requires several parameters to even implement the most basic of
functionality correctly, so this commit is relatively large.
2024-12-02 17:12:06 +01:00
Giovanni Mascellani
9e0c02a0ea vkd3d-shader/ir: Evaluate OUTCONTROLPOINT usage in the patch constant phase directly.
Instead of using DCL_INPUT.

The main goal here is to eventually get rid of the I/O
declaration instructions. A positive side effect is that we don't
add a useless barrier to shaders which have a DCL_INPUT instruction
in the patch constant phase but don't actually read OUTCONTROLPOINT
registers.
2024-11-27 13:59:39 +01:00
Giovanni Mascellani
1cfe23569c vkd3d-shader/ir: Synthesize the default control point phase in the HS control point I/O normaliser.
This makes it available to all backends, without requiring an
ad-hoc solution for each of them. It also gets rid of an
undocumented flag we're currently passing to
DCL_CONTROL_POINT_PHASE.
2024-11-27 13:57:09 +01:00
Giovanni Mascellani
2c3a7b0dd9 vkd3d-shader/ir: Validate the register type for DCL_OUTPUT_SIV instructions. 2024-11-25 20:51:29 +01:00
Giovanni Mascellani
3832e38ce0 vkd3d-shader/ir: Validate the register type for DCL_OUTPUT instructions. 2024-11-25 20:51:25 +01:00
Giovanni Mascellani
e7770eaaf6 vkd3d-shader/ir: Validate the register type for DCL_INPUT_PS_SGV instructions. 2024-11-25 20:48:39 +01:00
Giovanni Mascellani
1d9862261f vkd3d-shader/ir: Validate the register type for DCL_INPUT_PS_SIV instructions. 2024-11-25 20:48:39 +01:00
Giovanni Mascellani
09ede1e7f2 vkd3d-shader/ir: Validate the register type for DCL_INPUT_PS instructions. 2024-11-25 20:48:39 +01:00
Giovanni Mascellani
31f6b18c84 vkd3d-shader/ir: Validate the register type for DCL_INPUT_SGV instructions. 2024-11-25 20:48:39 +01:00
Giovanni Mascellani
fadaa69b92 vkd3d-shader/ir: Validate the register type for DCL_INPUT_SIV instructions. 2024-11-25 20:48:39 +01:00
Giovanni Mascellani
b007b1dd79 vkd3d-shader/ir: Validate the register type for DCL_INPUT instructions. 2024-11-25 20:48:39 +01:00
Giovanni Mascellani
c22812e20b vkd3d-shader/ir: Validate index count for OUTSTENCILREF registers. 2024-11-25 20:45:44 +01:00
Giovanni Mascellani
e367dc0783 vkd3d-shader/ir: Validate index count for WAVELANEINDEX registers. 2024-11-25 20:45:44 +01:00
Giovanni Mascellani
5b04a7973b vkd3d-shader/ir: Validate index count for WAVELANECOUNT registers. 2024-11-25 20:45:44 +01:00
Giovanni Mascellani
820a545950 vkd3d-shader/ir: Validate index count for GSINSTID registers. 2024-11-25 20:45:44 +01:00
Giovanni Mascellani
07b31761fb vkd3d-shader/ir: Validate index count for SAMPLEMASK registers. 2024-11-25 20:45:44 +01:00
Giovanni Mascellani
9f3bbad6bc vkd3d-shader/ir: Validate index count for COVERAGE registers. 2024-11-25 20:45:44 +01:00