wine/vkd3d
0
0
Fork 0
mirror of https://gitlab.winehq.org/wine/vkd3d.git synced 2025-01-28 13:05:02 -08:00
Code Issues Packages Projects Releases Wiki Activity

vkd3d-shader/ir: Validate the register type for DCL_INPUT instructions.

Browse Source
This commit is contained in:
Giovanni Mascellani 2024-11-21 23:17:39 +01:00 committed by Henri Verbeet
parent a8c5f9e667
commit b007b1dd79
Notes: Henri Verbeet 2024-11-25 21:02:53 +01:00 
Approved-by: Henri Verbeet (@hverbeet)
Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/1279
1 changed files with 34 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

34
libs/vkd3d-shader/ir.c
View File

@ -7980,6 +7980,39 @@ static void vsir_validate_dcl_hs_max_tessfactor(struct validation_context *ctx,
instruction->declaration.max_tessellation_factor);
}
static void vsir_validate_dcl_input(struct validation_context *ctx,
const struct vkd3d_shader_instruction *instruction)
{
switch (instruction->declaration.dst.reg.type)
{
/* Signature input registers. */
case VKD3DSPR_INPUT:
case VKD3DSPR_INCONTROLPOINT:
case VKD3DSPR_OUTCONTROLPOINT:
case VKD3DSPR_PATCHCONST:
/* Non-signature input registers. */
case VKD3DSPR_PRIMID:
case VKD3DSPR_FORKINSTID:
case VKD3DSPR_JOININSTID:
case VKD3DSPR_THREADID:
case VKD3DSPR_THREADGROUPID:
case VKD3DSPR_LOCALTHREADID:
case VKD3DSPR_LOCALTHREADINDEX:
case VKD3DSPR_COVERAGE:
case VKD3DSPR_TESSCOORD:
case VKD3DSPR_OUTPOINTID:
case VKD3DSPR_GSINSTID:
case VKD3DSPR_WAVELANECOUNT:
case VKD3DSPR_WAVELANEINDEX:
break;
default:
validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_INVALID_REGISTER_TYPE,
"Invalid register type %#x in instruction DCL_INPUT.",
instruction->declaration.dst.reg.type);
}
}
static void vsir_validate_dcl_input_primitive(struct validation_context *ctx,
const struct vkd3d_shader_instruction *instruction)
{
@ -8294,6 +8327,7 @@ static const struct vsir_validator_instruction_desc vsir_validator_instructions[
[VKD3DSIH_HS_JOIN_PHASE] = {0, 0, vsir_validate_hull_shader_phase},
[VKD3DSIH_DCL_GS_INSTANCES] = {0, 0, vsir_validate_dcl_gs_instances},
[VKD3DSIH_DCL_HS_MAX_TESSFACTOR] = {0, 0, vsir_validate_dcl_hs_max_tessfactor},
[VKD3DSIH_DCL_INPUT] = {0, 0, vsir_validate_dcl_input},
[VKD3DSIH_DCL_INPUT_PRIMITIVE] = {0, 0, vsir_validate_dcl_input_primitive},
[VKD3DSIH_DCL_OUTPUT_CONTROL_POINT_COUNT] = {0, 0, vsir_validate_dcl_output_control_point_count},
[VKD3DSIH_DCL_OUTPUT_TOPOLOGY] = {0, 0, vsir_validate_dcl_output_topology},