Commit Graph

452 Commits

Author SHA1 Message Date
fe4143ad19 vkd3d-shader/dxil: Generate I/O signatures with 16-bit component types for native 16-bit shaders.
Which incidentally matches the I/O signatures from the DXBC container.
2025-02-24 15:10:08 +01:00
4b84fb486b vkd3d-shader/ir: Handle index ranges that do not touch a signature element for each register.
A good part of the I/O normaliser job is to merge together signature
elements that are spanned by DCL_INDEX_RANGE instructions. The
current algorithm assumes that each index range touches exactly
one signature element for each index spanned by the range. The
assumption is used in shader_signature_merge() in the form of
expecting that, if the index range is N registers long, then,
once you find the first signature element of an index range, the
other elements that will have to be merged with it are exactly the
following N-1 according to the order given by
signature_element_register_compare() or
signature_element_mask_compare(), depending on the signature type.

This doesn't necessarily happen. For example, The Falconeer has a
few hull shaders in which this happens:

    hs_fork_phase
    dcl_hs_fork_phase_instance_count 13
    dcl_input vForkInstanceId
    dcl_output o4.z
    dcl_output o5.z
    dcl_output o6.z
    dcl_output o7.z
    dcl_output o12.z
    dcl_output o13.z
    dcl_output o14.z
    dcl_output o15.z
    dcl_output o16.z
    dcl_output o17.z
    dcl_output o18.z
    dcl_output o19.z
    dcl_output o20.z
    dcl_temps 1
    dcl_index_range o4.z 17
    iadd r0.x, vForkInstanceId.x, l(4)
    ult r0.y, vForkInstanceId.x, l(4)
    movc r0.x, r0.y, vForkInstanceId.x, r0.x
    mov o[r0.x + 4].z, l(0)
    ret

Here the index range "skips" o8.z through o11.z, because those
registers only use mask .xy. The current algorithm fails on such
a shader.

Even depending on the signature element order doesn't look ideal.
I don't have a full counterexample for that, but it looks fragile,
especially given that the register allocation algorithm in FXC is
notoriously full of unexpected corner cases.

We solve both problems by slightly changing the architecture of
the normaliser: first we move computing the masks for the merge
signature element from signature_element_range_expand_mask(),
which is executed while merging signature, to
io_normaliser_add_index_range(), which is executed before merging
signatures. Then, while we are merging signatures, we can decide
for each single signature element whether it has to be retained
or not, and how it should be patched. The algorithm becomes
independent of the order, because each signature element can be
processed individually.
2025-02-19 17:30:00 +01:00
b5350f9387 vkd3d-shader/ir: Use a structure to record range data in the I/O normaliser.
In order to make it able to have other fields.
2025-02-19 17:01:54 +01:00
ec7bac7ba7 vkd3d-shader/ir: Report errors in the I/O normaliser instead of asserting.
The assumptions the I/O normaliser makes on its input program are
rather intricated. In theory the VSIR validator checks should be
strong enough, but the validator isn't run by default anyway.
Whether the TPF parser validation is strong enough is not
completely clear to me, and considering that the I/O normaliser
could end up being used on different programs as well it's
probably better to revalidate locally just in case.
2025-02-19 17:01:54 +01:00
872a96e599 vkd3d-shader/ir: Remove vForkInstanceId and vJoinInstanceId declarations in vsir_program_flatten_hull_shader_phases().
Commit 4717775abb removed the code turning
the corresponding DCL_INPUT instructions into NOPs, presumably because
vsir_program_remove_io_decls() now already removes them. That function
only removes the instructions though, not the declarations as such; we
now need to remove these from the "io_dcls" bitmap instead.
2025-02-19 10:44:18 +01:00
7b23cd4d3c vkd3d-shader: Avoid passing NULL to qsort(). (ubsan)
Otherwise ubsan reports runtime errors such as:

    libs/vkd3d-shader/ir.c:4731:5: runtime error: null pointer passed as argument 1, which is declared to never be null
2025-01-10 19:51:55 +01:00
eaf4d0bfbf vkd3d-shader: Avoid passing NULL to memcpy(). (ubsan)
Otherwise when passing "-fsanitize=undefined" to the compiler, ubsan
reports such as:

   libs/vkd3d-shader/ir.c:3794:5: runtime error: null pointer passed as argument 1, which is declared to never be null
2025-01-10 19:51:43 +01:00
4f7eb890ef vkd3d-shader/ir: Validate OUTCONTROLPOINT source parameters. 2024-12-19 21:06:13 +01:00
495e10e93b vkd3d-shader/ir: Validate INCONTROLPOINT source parameters. 2024-12-19 21:06:13 +01:00
513609ef0e vkd3d-shader/ir: Validate INPUT source parameters. 2024-12-19 21:06:13 +01:00
23d4bd1dae vkd3d-shader/ir: Validate PATCHCONST source parameters using a uniform helper. 2024-12-19 21:06:13 +01:00
67420aa8b6 vkd3d-shader/ir: Validate OUTPUT source parameters using a uniform helper. 2024-12-19 21:06:13 +01:00
7de7025750 vkd3d-shader/ir: Disallow array signature elements for normalisation levels < SM6. 2024-12-19 21:06:13 +01:00
3c53293028 vkd3d-shader/ir: Separate VKD3DSPR_OUTPUT and VKD3DSPR_TEXCRDOUT.
This simplifies the IR.
2024-12-18 17:30:16 +01:00
8132239ed2 vkd3d-shader/ir: Separate VKD3DSPR_ADDR and VKD3DSPR_TEXTURE.
This simplifies the IR.
2024-12-18 17:30:16 +01:00
65f3f56f63 vkd3d-shader/d3dbc: Normalize to a single VKD3DSPR_CONST register set when reading.
We don't need VKD3DSPR_CONST2 et al in the IR, even for disassembly.
2024-12-18 17:30:16 +01:00
825784322d vkd3d-shader/ir: Properly lower texldp. 2024-12-18 17:30:15 +01:00
7cc802afd7 vkd3d-shader/ir: Properly lower texldb. 2024-12-18 17:27:43 +01:00
a68fd1b0de vkd3d-shader/ir: Simplify shader_register_normalise_arrayed_addressing().
The two branches do essentially the same thing, but in different
ways and each one omitting different details. In particular there
is no need to discriminate on whether the register is a relative
address, we can just copy the NULL pointer.
2024-12-17 16:44:00 +01:00
3db458697e vkd3d-shader/ir: Remove a redundant assignment.
The hull shader control point normalisation pass already ensures
that output registers in the control point phase have two
indices (the control point index and the register index).
2024-12-17 16:44:00 +01:00
00538c377e vkd3d-shader/ir: Validate OUTCONTROLPOINT destination parameters. 2024-12-17 16:39:32 +01:00
3dc7f322cc vkd3d-shader/ir: Validate INCONTROLPOINT destination parameters. 2024-12-17 16:39:32 +01:00
7d87b4e869 vkd3d-shader/ir: Validate OUTPUT destination parameters. 2024-12-17 16:39:32 +01:00
b194e5dc4e vkd3d-shader/ir: Validate PATCHCONST destination parameters using a uniform helper. 2024-12-17 16:39:32 +01:00
38a5c905db vkd3d-shader/ir: Validate INPUT destination parameters using a uniform helper. 2024-12-17 16:39:32 +01:00