mirror of
https://gitlab.winehq.org/wine/vkd3d.git
synced 2025-01-28 13:05:02 -08:00
vkd3d-shader/hlsl: Remove hlsl_ir_vsir_instruction_ref.
This commit is contained in:
parent
6bd0390498
commit
b72ef6038d
Notes:
Henri Verbeet
2024-09-14 16:54:03 +02:00
Approved-by: Elizabeth Figura (@zfigura) Approved-by: Henri Verbeet (@hverbeet) Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/1072
@ -2303,39 +2303,13 @@ static void d3dbc_write_semantic_dcls(struct d3dbc_compiler *d3dbc)
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}
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}
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static void d3dbc_write_block(struct d3dbc_compiler *d3dbc, const struct hlsl_block *block)
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static void d3dbc_write_program_instructions(struct d3dbc_compiler *d3dbc)
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{
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struct vkd3d_shader_instruction *vsir_instr;
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struct hlsl_ctx *ctx = d3dbc->ctx;
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const struct hlsl_ir_node *instr;
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unsigned int vsir_instr_idx;
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struct vsir_program *program = d3dbc->program;
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unsigned int i;
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LIST_FOR_EACH_ENTRY(instr, &block->instrs, struct hlsl_ir_node, entry)
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{
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if (instr->data_type)
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{
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if (instr->data_type->class != HLSL_CLASS_SCALAR && instr->data_type->class != HLSL_CLASS_VECTOR)
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{
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hlsl_fixme(ctx, &instr->loc, "Class %#x should have been lowered or removed.", instr->data_type->class);
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break;
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}
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}
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switch (instr->type)
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{
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case HLSL_IR_CALL:
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vkd3d_unreachable();
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case HLSL_IR_VSIR_INSTRUCTION_REF:
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vsir_instr_idx = hlsl_ir_vsir_instruction_ref(instr)->vsir_instr_idx;
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vsir_instr = &d3dbc->program->instructions.elements[vsir_instr_idx];
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d3dbc_write_vsir_instruction(d3dbc, vsir_instr);
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break;
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default:
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hlsl_fixme(ctx, &instr->loc, "Instruction type %s.", hlsl_node_type_to_string(instr->type));
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}
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}
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for (i = 0; i < program->instructions.count; ++i)
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d3dbc_write_vsir_instruction(d3dbc, &program->instructions.elements[i]);
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}
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/* OBJECTIVE: Stop relying on ctx and entry_func on this function, receiving
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@ -2376,7 +2350,7 @@ int d3dbc_compile(struct vsir_program *program, uint64_t config_flags,
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bytecode_put_bytes(buffer, ctab->code, ctab->size);
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d3dbc_write_semantic_dcls(&d3dbc);
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d3dbc_write_block(&d3dbc, &entry_func->body);
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d3dbc_write_program_instructions(&d3dbc);
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put_u32(buffer, VKD3D_SM1_OP_END);
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@ -1680,22 +1680,6 @@ struct hlsl_ir_node *hlsl_new_switch(struct hlsl_ctx *ctx, struct hlsl_ir_node *
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return &s->node;
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}
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struct hlsl_ir_node *hlsl_new_vsir_instruction_ref(struct hlsl_ctx *ctx, unsigned int vsir_instr_idx,
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struct hlsl_type *type, const struct hlsl_reg *reg, const struct vkd3d_shader_location *loc)
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{
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struct hlsl_ir_vsir_instruction_ref *vsir_instr;
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if (!(vsir_instr = hlsl_alloc(ctx, sizeof(*vsir_instr))))
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return NULL;
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init_node(&vsir_instr->node, HLSL_IR_VSIR_INSTRUCTION_REF, type, loc);
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vsir_instr->vsir_instr_idx = vsir_instr_idx;
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if (reg)
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vsir_instr->node.reg = *reg;
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return &vsir_instr->node;
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}
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struct hlsl_ir_load *hlsl_new_load_index(struct hlsl_ctx *ctx, const struct hlsl_deref *deref,
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struct hlsl_ir_node *idx, const struct vkd3d_shader_location *loc)
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{
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@ -2442,9 +2426,6 @@ static struct hlsl_ir_node *clone_instr(struct hlsl_ctx *ctx,
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case HLSL_IR_STATEBLOCK_CONSTANT:
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return clone_stateblock_constant(ctx, map, hlsl_ir_stateblock_constant(instr));
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case HLSL_IR_VSIR_INSTRUCTION_REF:
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vkd3d_unreachable();
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}
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vkd3d_unreachable();
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@ -2860,7 +2841,6 @@ const char *hlsl_node_type_to_string(enum hlsl_ir_node_type type)
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[HLSL_IR_COMPILE] = "HLSL_IR_COMPILE",
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[HLSL_IR_STATEBLOCK_CONSTANT] = "HLSL_IR_STATEBLOCK_CONSTANT",
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[HLSL_IR_VSIR_INSTRUCTION_REF] = "HLSL_IR_VSIR_INSTRUCTION_REF",
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};
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if (type >= ARRAY_SIZE(names))
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@ -3442,11 +3422,6 @@ static void dump_instr(struct hlsl_ctx *ctx, struct vkd3d_string_buffer *buffer,
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case HLSL_IR_STATEBLOCK_CONSTANT:
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dump_ir_stateblock_constant(buffer, hlsl_ir_stateblock_constant(instr));
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break;
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case HLSL_IR_VSIR_INSTRUCTION_REF:
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vkd3d_string_buffer_printf(buffer, "vsir_program instruction %u",
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hlsl_ir_vsir_instruction_ref(instr)->vsir_instr_idx);
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break;
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}
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}
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@ -3744,10 +3719,6 @@ void hlsl_free_instr(struct hlsl_ir_node *node)
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case HLSL_IR_STATEBLOCK_CONSTANT:
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free_ir_stateblock_constant(hlsl_ir_stateblock_constant(node));
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break;
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case HLSL_IR_VSIR_INSTRUCTION_REF:
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vkd3d_free(hlsl_ir_vsir_instruction_ref(node));
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break;
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}
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}
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@ -326,8 +326,6 @@ enum hlsl_ir_node_type
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HLSL_IR_COMPILE,
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HLSL_IR_STATEBLOCK_CONSTANT,
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HLSL_IR_VSIR_INSTRUCTION_REF,
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};
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/* Common data for every type of IR instruction node. */
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@ -904,16 +902,6 @@ struct hlsl_ir_stateblock_constant
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char *name;
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};
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/* A vkd3d_shader_instruction that can be inserted in a hlsl_block.
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* Only used for the HLSL IR to vsir translation, might be removed once this translation is complete. */
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struct hlsl_ir_vsir_instruction_ref
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{
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struct hlsl_ir_node node;
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/* Index to a vkd3d_shader_instruction within a vkd3d_shader_instruction_array in a vsir_program. */
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unsigned int vsir_instr_idx;
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};
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struct hlsl_scope
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{
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/* Item entry for hlsl_ctx.scopes. */
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@ -1220,12 +1208,6 @@ static inline struct hlsl_ir_stateblock_constant *hlsl_ir_stateblock_constant(co
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return CONTAINING_RECORD(node, struct hlsl_ir_stateblock_constant, node);
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}
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static inline struct hlsl_ir_vsir_instruction_ref *hlsl_ir_vsir_instruction_ref(const struct hlsl_ir_node *node)
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{
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VKD3D_ASSERT(node->type == HLSL_IR_VSIR_INSTRUCTION_REF);
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return CONTAINING_RECORD(node, struct hlsl_ir_vsir_instruction_ref, node);
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}
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static inline void hlsl_block_init(struct hlsl_block *block)
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{
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list_init(&block->instrs);
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@ -1540,9 +1522,6 @@ struct hlsl_ir_switch_case *hlsl_new_switch_case(struct hlsl_ctx *ctx, unsigned
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struct hlsl_ir_node *hlsl_new_switch(struct hlsl_ctx *ctx, struct hlsl_ir_node *selector,
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struct list *cases, const struct vkd3d_shader_location *loc);
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struct hlsl_ir_node *hlsl_new_vsir_instruction_ref(struct hlsl_ctx *ctx, unsigned int vsir_instr_idx,
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struct hlsl_type *type, const struct hlsl_reg *reg, const struct vkd3d_shader_location *loc);
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void hlsl_error(struct hlsl_ctx *ctx, const struct vkd3d_shader_location *loc,
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enum vkd3d_shader_error error, const char *fmt, ...) VKD3D_PRINTF_FUNC(4, 5);
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void hlsl_fixme(struct hlsl_ctx *ctx, const struct vkd3d_shader_location *loc,
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@ -632,8 +632,6 @@ static struct hlsl_default_value evaluate_static_expression(struct hlsl_ctx *ctx
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hlsl_error(ctx, &node->loc, VKD3D_SHADER_ERROR_HLSL_INVALID_SYNTAX,
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"Expected literal expression.");
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break;
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case HLSL_IR_VSIR_INSTRUCTION_REF:
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vkd3d_unreachable();
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}
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}
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@ -4089,9 +4089,6 @@ static bool dce(struct hlsl_ctx *ctx, struct hlsl_ir_node *instr, void *context)
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case HLSL_IR_STATEBLOCK_CONSTANT:
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/* Stateblock constants should not appear in the shader program. */
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vkd3d_unreachable();
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case HLSL_IR_VSIR_INSTRUCTION_REF:
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/* HLSL IR nodes are not translated to hlsl_ir_vsir_instruction_ref at this point. */
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vkd3d_unreachable();
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}
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return false;
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@ -4217,9 +4214,6 @@ static void compute_liveness_recurse(struct hlsl_block *block, unsigned int loop
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case HLSL_IR_STATEBLOCK_CONSTANT:
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/* Stateblock constants should not appear in the shader program. */
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vkd3d_unreachable();
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case HLSL_IR_VSIR_INSTRUCTION_REF:
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/* HLSL IR nodes are not translated to hlsl_ir_vsir_instruction_ref at this point. */
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vkd3d_unreachable();
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case HLSL_IR_STORE:
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{
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@ -6312,7 +6306,6 @@ static void sm1_generate_vsir_constant_defs(struct hlsl_ctx *ctx, struct vsir_pr
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struct vkd3d_shader_dst_param *dst_param;
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struct vkd3d_shader_src_param *src_param;
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struct vkd3d_shader_instruction *ins;
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struct hlsl_ir_node *vsir_instr;
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unsigned int i, x;
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for (i = 0; i < ctx->constant_defs.count; ++i)
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@ -6349,14 +6342,6 @@ static void sm1_generate_vsir_constant_defs(struct hlsl_ctx *ctx, struct vsir_pr
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for (x = 0; x < 4; ++x)
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src_param->reg.u.immconst_f32[x] = constant_reg->value.f[x];
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src_param->swizzle = VKD3D_SHADER_NO_SWIZZLE;
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if (!(vsir_instr = hlsl_new_vsir_instruction_ref(ctx, instructions->count - 1, NULL, NULL,
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&constant_reg->loc)))
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{
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ctx->result = VKD3D_ERROR_OUT_OF_MEMORY;
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return;
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}
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hlsl_block_add_instr(block, vsir_instr);
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}
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}
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@ -6370,7 +6355,6 @@ static void sm1_generate_vsir_sampler_dcls(struct hlsl_ctx *ctx,
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struct vkd3d_shader_semantic *semantic;
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struct vkd3d_shader_instruction *ins;
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enum hlsl_sampler_dim sampler_dim;
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struct hlsl_ir_node *vsir_instr;
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struct hlsl_ir_var *var;
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unsigned int i, count;
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@ -6435,14 +6419,6 @@ static void sm1_generate_vsir_sampler_dcls(struct hlsl_ctx *ctx,
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range = &semantic->resource.range;
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range->space = 0;
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range->first = range->last = dst_param->reg.idx[0].offset;
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if (!(vsir_instr = hlsl_new_vsir_instruction_ref(ctx, instructions->count - 1, NULL,
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NULL, &var->loc)))
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{
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ctx->result = VKD3D_ERROR_OUT_OF_MEMORY;
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return;
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}
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hlsl_block_add_instr(block, vsir_instr);
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}
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}
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}
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@ -6474,12 +6450,10 @@ static struct vkd3d_shader_instruction *generate_vsir_add_program_instruction(
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static void sm1_generate_vsir_instr_constant(struct hlsl_ctx *ctx,
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struct vsir_program *program, struct hlsl_ir_constant *constant)
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{
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struct vkd3d_shader_instruction_array *instructions = &program->instructions;
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struct hlsl_ir_node *instr = &constant->node;
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struct vkd3d_shader_dst_param *dst_param;
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struct vkd3d_shader_src_param *src_param;
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struct vkd3d_shader_instruction *ins;
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struct hlsl_ir_node *vsir_instr;
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VKD3D_ASSERT(instr->reg.allocated);
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VKD3D_ASSERT(constant->reg.allocated);
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@ -6496,16 +6470,6 @@ static void sm1_generate_vsir_instr_constant(struct hlsl_ctx *ctx,
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vsir_register_init(&dst_param->reg, VKD3DSPR_TEMP, VKD3D_DATA_FLOAT, 1);
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dst_param->reg.idx[0].offset = instr->reg.id;
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dst_param->write_mask = instr->reg.writemask;
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if (!(vsir_instr = hlsl_new_vsir_instruction_ref(ctx, instructions->count - 1,
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instr->data_type, &instr->reg, &instr->loc)))
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{
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ctx->result = VKD3D_ERROR_OUT_OF_MEMORY;
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return;
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}
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list_add_before(&instr->entry, &vsir_instr->entry);
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hlsl_replace_node(instr, vsir_instr);
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}
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/* Translate ops that can be mapped to a single vsir instruction with only one dst register. */
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@ -6513,12 +6477,10 @@ static void sm1_generate_vsir_instr_expr_single_instr_op(struct hlsl_ctx *ctx, s
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struct hlsl_ir_expr *expr, enum vkd3d_shader_opcode opcode, uint32_t src_mod, uint32_t dst_mod,
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bool map_src_swizzles)
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{
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struct vkd3d_shader_instruction_array *instructions = &program->instructions;
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struct hlsl_ir_node *instr = &expr->node;
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struct vkd3d_shader_dst_param *dst_param;
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struct vkd3d_shader_src_param *src_param;
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struct vkd3d_shader_instruction *ins;
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struct hlsl_ir_node *vsir_instr;
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unsigned int i, src_count = 0;
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VKD3D_ASSERT(instr->reg.allocated);
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@ -6550,16 +6512,6 @@ static void sm1_generate_vsir_instr_expr_single_instr_op(struct hlsl_ctx *ctx, s
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map_src_swizzles ? dst_param->write_mask : VKD3DSP_WRITEMASK_ALL);
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src_param->modifiers = src_mod;
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}
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if (!(vsir_instr = hlsl_new_vsir_instruction_ref(ctx, instructions->count - 1, instr->data_type,
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&instr->reg, &instr->loc)))
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{
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ctx->result = VKD3D_ERROR_OUT_OF_MEMORY;
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return;
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}
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list_add_before(&instr->entry, &vsir_instr->entry);
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hlsl_replace_node(instr, vsir_instr);
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}
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/* Translate ops that have 1 src and need one instruction for each component in
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@ -6567,12 +6519,10 @@ static void sm1_generate_vsir_instr_expr_single_instr_op(struct hlsl_ctx *ctx, s
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static void sm1_generate_vsir_instr_expr_per_component_instr_op(struct hlsl_ctx *ctx,
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struct vsir_program *program, struct hlsl_ir_expr *expr, enum vkd3d_shader_opcode opcode)
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{
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struct vkd3d_shader_instruction_array *instructions = &program->instructions;
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struct hlsl_ir_node *operand = expr->operands[0].node;
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struct hlsl_ir_node *instr = &expr->node;
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struct vkd3d_shader_dst_param *dst_param;
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struct vkd3d_shader_src_param *src_param;
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struct hlsl_ir_node *vsir_instr = NULL;
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struct vkd3d_shader_instruction *ins;
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uint32_t src_swizzle;
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unsigned int i, c;
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@ -6598,52 +6548,18 @@ static void sm1_generate_vsir_instr_expr_per_component_instr_op(struct hlsl_ctx
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src_param->reg.idx[0].offset = operand->reg.id;
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c = vsir_swizzle_get_component(src_swizzle, i);
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src_param->swizzle = vsir_swizzle_from_writemask(1u << c);
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if (!(vsir_instr = hlsl_new_vsir_instruction_ref(ctx, instructions->count - 1,
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hlsl_get_scalar_type(ctx, instr->data_type->e.numeric.type),
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&instr->reg, &instr->loc)))
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{
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ctx->result = VKD3D_ERROR_OUT_OF_MEMORY;
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return;
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}
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list_add_before(&instr->entry, &vsir_instr->entry);
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}
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}
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/* Replace expr with a no-op move. For the other instructions that reference it. */
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if (!(ins = generate_vsir_add_program_instruction(ctx, program, &instr->loc, VKD3DSIH_MOV, 1, 1)))
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return;
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dst_param = &ins->dst[0];
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vsir_register_init(&dst_param->reg, VKD3DSPR_TEMP, VKD3D_DATA_FLOAT, 1);
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dst_param->reg.idx[0].offset = instr->reg.id;
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dst_param->write_mask = instr->reg.writemask;
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src_param = &ins->src[0];
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vsir_register_init(&src_param->reg, VKD3DSPR_TEMP, VKD3D_DATA_FLOAT, 1);
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src_param->reg.idx[0].offset = instr->reg.id;
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src_param->swizzle = sm1_generate_vsir_get_src_swizzle(instr->reg.writemask, dst_param->write_mask);
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if (!(vsir_instr = hlsl_new_vsir_instruction_ref(ctx, instructions->count - 1, instr->data_type,
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&instr->reg, &instr->loc)))
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{
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ctx->result = VKD3D_ERROR_OUT_OF_MEMORY;
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return;
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}
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list_add_before(&instr->entry, &vsir_instr->entry);
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hlsl_replace_node(instr, vsir_instr);
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}
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static void sm1_generate_vsir_instr_expr_sincos(struct hlsl_ctx *ctx, struct vsir_program *program,
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struct hlsl_ir_expr *expr)
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{
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struct vkd3d_shader_instruction_array *instructions = &program->instructions;
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struct hlsl_ir_node *operand = expr->operands[0].node;
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struct hlsl_ir_node *instr = &expr->node;
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struct vkd3d_shader_dst_param *dst_param;
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struct vkd3d_shader_src_param *src_param;
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||||
struct vkd3d_shader_instruction *ins;
|
||||
struct hlsl_ir_node *vsir_instr;
|
||||
unsigned int src_count = 0;
|
||||
|
||||
VKD3D_ASSERT(instr->reg.allocated);
|
||||
@ -6674,16 +6590,6 @@ static void sm1_generate_vsir_instr_expr_sincos(struct hlsl_ctx *ctx, struct vsi
|
||||
src_param->reg.idx[0].offset = ctx->d3dsincosconst2.id;
|
||||
src_param->swizzle = VKD3D_SHADER_NO_SWIZZLE;
|
||||
}
|
||||
|
||||
if (!(vsir_instr = hlsl_new_vsir_instruction_ref(ctx, instructions->count - 1, instr->data_type,
|
||||
&instr->reg, &instr->loc)))
|
||||
{
|
||||
ctx->result = VKD3D_ERROR_OUT_OF_MEMORY;
|
||||
return;
|
||||
}
|
||||
|
||||
list_add_before(&instr->entry, &vsir_instr->entry);
|
||||
hlsl_replace_node(instr, vsir_instr);
|
||||
}
|
||||
|
||||
static bool sm1_generate_vsir_instr_expr_cast(struct hlsl_ctx *ctx,
|
||||
@ -6898,6 +6804,7 @@ static bool sm1_generate_vsir_instr_expr(struct hlsl_ctx *ctx, struct vsir_progr
|
||||
break;
|
||||
|
||||
default:
|
||||
hlsl_fixme(ctx, &instr->loc, "SM1 \"%s\" expression.", debug_hlsl_expr_op(expr->op));
|
||||
return false;
|
||||
}
|
||||
|
||||
@ -7018,11 +6925,9 @@ static void sm1_generate_vsir_init_src_param_from_deref(struct hlsl_ctx *ctx,
|
||||
static void sm1_generate_vsir_instr_load(struct hlsl_ctx *ctx, struct vsir_program *program,
|
||||
struct hlsl_ir_load *load)
|
||||
{
|
||||
struct vkd3d_shader_instruction_array *instructions = &program->instructions;
|
||||
struct hlsl_ir_node *instr = &load->node;
|
||||
struct vkd3d_shader_dst_param *dst_param;
|
||||
struct vkd3d_shader_instruction *ins;
|
||||
struct hlsl_ir_node *vsir_instr;
|
||||
|
||||
VKD3D_ASSERT(instr->reg.allocated);
|
||||
|
||||
@ -7036,22 +6941,11 @@ static void sm1_generate_vsir_instr_load(struct hlsl_ctx *ctx, struct vsir_progr
|
||||
|
||||
sm1_generate_vsir_init_src_param_from_deref(ctx, &ins->src[0], &load->src, dst_param->write_mask,
|
||||
&ins->location);
|
||||
|
||||
if (!(vsir_instr = hlsl_new_vsir_instruction_ref(ctx, instructions->count - 1, instr->data_type,
|
||||
&instr->reg, &instr->loc)))
|
||||
{
|
||||
ctx->result = VKD3D_ERROR_OUT_OF_MEMORY;
|
||||
return;
|
||||
}
|
||||
|
||||
list_add_before(&instr->entry, &vsir_instr->entry);
|
||||
hlsl_replace_node(instr, vsir_instr);
|
||||
}
|
||||
|
||||
static void sm1_generate_vsir_instr_resource_load(struct hlsl_ctx *ctx,
|
||||
struct vsir_program *program, struct hlsl_ir_resource_load *load)
|
||||
{
|
||||
struct vkd3d_shader_instruction_array *instructions = &program->instructions;
|
||||
struct hlsl_ir_node *coords = load->coords.node;
|
||||
struct hlsl_ir_node *ddx = load->ddx.node;
|
||||
struct hlsl_ir_node *ddy = load->ddy.node;
|
||||
@ -7059,7 +6953,6 @@ static void sm1_generate_vsir_instr_resource_load(struct hlsl_ctx *ctx,
|
||||
struct vkd3d_shader_dst_param *dst_param;
|
||||
struct vkd3d_shader_src_param *src_param;
|
||||
struct vkd3d_shader_instruction *ins;
|
||||
struct hlsl_ir_node *vsir_instr;
|
||||
enum vkd3d_shader_opcode opcode;
|
||||
unsigned int src_count = 2;
|
||||
uint32_t flags = 0;
|
||||
@ -7121,27 +7014,15 @@ static void sm1_generate_vsir_instr_resource_load(struct hlsl_ctx *ctx,
|
||||
src_param->reg.idx[0].offset = ddy->reg.id;
|
||||
src_param->swizzle = sm1_generate_vsir_get_src_swizzle(ddy->reg.writemask, VKD3DSP_WRITEMASK_ALL);
|
||||
}
|
||||
|
||||
if (!(vsir_instr = hlsl_new_vsir_instruction_ref(ctx, instructions->count - 1, instr->data_type,
|
||||
&instr->reg, &instr->loc)))
|
||||
{
|
||||
ctx->result = VKD3D_ERROR_OUT_OF_MEMORY;
|
||||
return;
|
||||
}
|
||||
|
||||
list_add_before(&instr->entry, &vsir_instr->entry);
|
||||
hlsl_replace_node(instr, vsir_instr);
|
||||
}
|
||||
|
||||
static void sm1_generate_vsir_instr_swizzle(struct hlsl_ctx *ctx, struct vsir_program *program,
|
||||
struct hlsl_ir_swizzle *swizzle_instr)
|
||||
{
|
||||
struct vkd3d_shader_instruction_array *instructions = &program->instructions;
|
||||
struct hlsl_ir_node *instr = &swizzle_instr->node, *val = swizzle_instr->val.node;
|
||||
struct vkd3d_shader_dst_param *dst_param;
|
||||
struct vkd3d_shader_src_param *src_param;
|
||||
struct vkd3d_shader_instruction *ins;
|
||||
struct hlsl_ir_node *vsir_instr;
|
||||
uint32_t swizzle;
|
||||
|
||||
VKD3D_ASSERT(instr->reg.allocated);
|
||||
@ -7163,27 +7044,15 @@ static void sm1_generate_vsir_instr_swizzle(struct hlsl_ctx *ctx, struct vsir_pr
|
||||
vsir_register_init(&src_param->reg, VKD3DSPR_TEMP, VKD3D_DATA_FLOAT, 1);
|
||||
src_param->reg.idx[0].offset = val->reg.id;
|
||||
src_param->swizzle = swizzle;
|
||||
|
||||
if (!(vsir_instr = hlsl_new_vsir_instruction_ref(ctx, instructions->count - 1, instr->data_type,
|
||||
&instr->reg, &instr->loc)))
|
||||
{
|
||||
ctx->result = VKD3D_ERROR_OUT_OF_MEMORY;
|
||||
return;
|
||||
}
|
||||
|
||||
list_add_before(&instr->entry, &vsir_instr->entry);
|
||||
hlsl_replace_node(instr, vsir_instr);
|
||||
}
|
||||
|
||||
static void sm1_generate_vsir_instr_store(struct hlsl_ctx *ctx, struct vsir_program *program,
|
||||
struct hlsl_ir_store *store)
|
||||
{
|
||||
struct vkd3d_shader_instruction_array *instructions = &program->instructions;
|
||||
struct hlsl_ir_node *rhs = store->rhs.node;
|
||||
struct hlsl_ir_node *instr = &store->node;
|
||||
struct vkd3d_shader_instruction *ins;
|
||||
struct vkd3d_shader_src_param *src_param;
|
||||
struct hlsl_ir_node *vsir_instr;
|
||||
|
||||
if (!(ins = generate_vsir_add_program_instruction(ctx, program, &instr->loc, VKD3DSIH_MOV, 1, 1)))
|
||||
return;
|
||||
@ -7194,26 +7063,15 @@ static void sm1_generate_vsir_instr_store(struct hlsl_ctx *ctx, struct vsir_prog
|
||||
vsir_register_init(&src_param->reg, VKD3DSPR_TEMP, VKD3D_DATA_FLOAT, 1);
|
||||
src_param->reg.idx[0].offset = rhs->reg.id;
|
||||
src_param->swizzle = sm1_generate_vsir_get_src_swizzle(rhs->reg.writemask, ins->dst[0].write_mask);
|
||||
|
||||
if (!(vsir_instr = hlsl_new_vsir_instruction_ref(ctx, instructions->count - 1, NULL, NULL, &instr->loc)))
|
||||
{
|
||||
ctx->result = VKD3D_ERROR_OUT_OF_MEMORY;
|
||||
return;
|
||||
}
|
||||
|
||||
list_add_before(&instr->entry, &vsir_instr->entry);
|
||||
hlsl_replace_node(instr, vsir_instr);
|
||||
}
|
||||
|
||||
static void sm1_generate_vsir_instr_jump(struct hlsl_ctx *ctx,
|
||||
struct vsir_program *program, struct hlsl_ir_jump *jump)
|
||||
{
|
||||
struct vkd3d_shader_instruction_array *instructions = &program->instructions;
|
||||
struct hlsl_ir_node *condition = jump->condition.node;
|
||||
struct hlsl_ir_node *instr = &jump->node;
|
||||
struct vkd3d_shader_dst_param *dst_param;
|
||||
struct vkd3d_shader_instruction *ins;
|
||||
struct hlsl_ir_node *vsir_instr;
|
||||
|
||||
if (jump->type == HLSL_IR_JUMP_DISCARD_NEG)
|
||||
{
|
||||
@ -7224,16 +7082,6 @@ static void sm1_generate_vsir_instr_jump(struct hlsl_ctx *ctx,
|
||||
vsir_register_init(&dst_param->reg, VKD3DSPR_TEMP, VKD3D_DATA_FLOAT, 1);
|
||||
dst_param->reg.idx[0].offset = condition->reg.id;
|
||||
dst_param->write_mask = condition->reg.writemask;
|
||||
|
||||
if (!(vsir_instr = hlsl_new_vsir_instruction_ref(ctx,
|
||||
instructions->count - 1, instr->data_type, NULL, &instr->loc)))
|
||||
{
|
||||
ctx->result = VKD3D_ERROR_OUT_OF_MEMORY;
|
||||
return;
|
||||
}
|
||||
|
||||
list_add_before(&instr->entry, &vsir_instr->entry);
|
||||
hlsl_replace_node(instr, vsir_instr);
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -7249,8 +7097,6 @@ static void sm1_generate_vsir_instr_if(struct hlsl_ctx *ctx, struct vsir_program
|
||||
struct vkd3d_shader_src_param *src_param;
|
||||
struct hlsl_ir_node *instr = &iff->node;
|
||||
struct vkd3d_shader_instruction *ins;
|
||||
struct hlsl_ir_node *vsir_instr;
|
||||
struct hlsl_block block;
|
||||
uint32_t swizzle;
|
||||
|
||||
if (hlsl_version_lt(ctx, 2, 1))
|
||||
@ -7260,8 +7106,6 @@ static void sm1_generate_vsir_instr_if(struct hlsl_ctx *ctx, struct vsir_program
|
||||
}
|
||||
VKD3D_ASSERT(condition->data_type->dimx == 1 && condition->data_type->dimy == 1);
|
||||
|
||||
hlsl_block_init(&block);
|
||||
|
||||
if (!(ins = generate_vsir_add_program_instruction(ctx, program, &instr->loc, VKD3DSIH_IFC, 0, 2)))
|
||||
return;
|
||||
ins->flags = VKD3D_SHADER_REL_OP_NE;
|
||||
@ -7281,41 +7125,15 @@ static void sm1_generate_vsir_instr_if(struct hlsl_ctx *ctx, struct vsir_program
|
||||
src_param->swizzle = swizzle;
|
||||
src_param->modifiers = VKD3DSPSM_NEG;
|
||||
|
||||
if (!(vsir_instr = hlsl_new_vsir_instruction_ref(ctx, program->instructions.count - 1, NULL, NULL, &instr->loc)))
|
||||
{
|
||||
ctx->result = VKD3D_ERROR_OUT_OF_MEMORY;
|
||||
return;
|
||||
}
|
||||
hlsl_block_add_instr(&block, vsir_instr);
|
||||
|
||||
sm1_generate_vsir_block(ctx, &iff->then_block, program);
|
||||
hlsl_block_add_block(&block, &iff->then_block);
|
||||
|
||||
if (!(ins = generate_vsir_add_program_instruction(ctx, program, &instr->loc, VKD3DSIH_ELSE, 0, 0)))
|
||||
return;
|
||||
if (!(vsir_instr = hlsl_new_vsir_instruction_ref(ctx, program->instructions.count - 1, NULL, NULL, &instr->loc)))
|
||||
{
|
||||
ctx->result = VKD3D_ERROR_OUT_OF_MEMORY;
|
||||
return;
|
||||
}
|
||||
hlsl_block_add_instr(&block, vsir_instr);
|
||||
|
||||
sm1_generate_vsir_block(ctx, &iff->else_block, program);
|
||||
hlsl_block_add_block(&block, &iff->else_block);
|
||||
|
||||
if (!(ins = generate_vsir_add_program_instruction(ctx, program, &instr->loc, VKD3DSIH_ENDIF, 0, 0)))
|
||||
return;
|
||||
if (!(vsir_instr = hlsl_new_vsir_instruction_ref(ctx, program->instructions.count - 1, NULL, NULL, &instr->loc)))
|
||||
{
|
||||
ctx->result = VKD3D_ERROR_OUT_OF_MEMORY;
|
||||
return;
|
||||
}
|
||||
hlsl_block_add_instr(&block, vsir_instr);
|
||||
|
||||
list_move_after(&instr->entry, &block.instrs);
|
||||
hlsl_block_cleanup(&block);
|
||||
list_remove(&instr->entry);
|
||||
hlsl_free_instr(instr);
|
||||
}
|
||||
|
||||
static void sm1_generate_vsir_block(struct hlsl_ctx *ctx, struct hlsl_block *block, struct vsir_program *program)
|
||||
@ -7324,8 +7142,20 @@ static void sm1_generate_vsir_block(struct hlsl_ctx *ctx, struct hlsl_block *blo
|
||||
|
||||
LIST_FOR_EACH_ENTRY_SAFE(instr, next, &block->instrs, struct hlsl_ir_node, entry)
|
||||
{
|
||||
if (instr->data_type)
|
||||
{
|
||||
if (instr->data_type->class != HLSL_CLASS_SCALAR && instr->data_type->class != HLSL_CLASS_VECTOR)
|
||||
{
|
||||
hlsl_fixme(ctx, &instr->loc, "Class %#x should have been lowered or removed.", instr->data_type->class);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
switch (instr->type)
|
||||
{
|
||||
case HLSL_IR_CALL:
|
||||
vkd3d_unreachable();
|
||||
|
||||
case HLSL_IR_CONSTANT:
|
||||
sm1_generate_vsir_instr_constant(ctx, program, hlsl_ir_constant(instr));
|
||||
break;
|
||||
@ -7359,6 +7189,7 @@ static void sm1_generate_vsir_block(struct hlsl_ctx *ctx, struct hlsl_block *blo
|
||||
break;
|
||||
|
||||
default:
|
||||
hlsl_fixme(ctx, &instr->loc, "Instruction type %s.", hlsl_node_type_to_string(instr->type));
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
Loading…
x
Reference in New Issue
Block a user