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vkd3d-shader/sm4: Parse register precision modifiers.
Signed-off-by: Conor McCarthy <cmccarthy@codeweavers.com> Signed-off-by: Henri Verbeet <hverbeet@codeweavers.com> Signed-off-by: Alexandre Julliard <julliard@winehq.org>
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cddd978be6
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a422e37953
@ -925,6 +925,16 @@ static const enum vkd3d_shader_register_type register_type_table[] =
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/* VKD3D_SM5_RT_DEPTHOUT_LESS_EQUAL */ VKD3DSPR_DEPTHOUTLE,
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};
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static const enum vkd3d_shader_register_precision register_precision_table[] =
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{
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/* VKD3D_SM4_REGISTER_PRECISION_DEFAULT */ VKD3D_SHADER_REGISTER_PRECISION_DEFAULT,
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/* VKD3D_SM4_REGISTER_PRECISION_MIN_FLOAT_16 */ VKD3D_SHADER_REGISTER_PRECISION_MIN_FLOAT_16,
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/* VKD3D_SM4_REGISTER_PRECISION_MIN_FLOAT_10 */ VKD3D_SHADER_REGISTER_PRECISION_MIN_FLOAT_10,
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/* UNKNOWN */ VKD3D_SHADER_REGISTER_PRECISION_INVALID,
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/* VKD3D_SM4_REGISTER_PRECISION_MIN_INT_16 */ VKD3D_SHADER_REGISTER_PRECISION_MIN_INT_16,
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/* VKD3D_SM4_REGISTER_PRECISION_MIN_UINT_16 */ VKD3D_SHADER_REGISTER_PRECISION_MIN_UINT_16,
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};
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static const struct vkd3d_sm4_opcode_info *get_opcode_info(enum vkd3d_sm4_opcode opcode)
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{
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unsigned int i;
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@ -1165,6 +1175,7 @@ static bool shader_sm4_read_param(struct vkd3d_sm4_data *priv, const DWORD **ptr
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enum vkd3d_data_type data_type, struct vkd3d_shader_register *param,
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enum vkd3d_shader_src_modifier *modifier)
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{
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enum vkd3d_sm4_register_precision precision;
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enum vkd3d_sm4_register_type register_type;
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enum vkd3d_sm4_extended_operand_type type;
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enum vkd3d_sm4_register_modifier m;
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@ -1188,6 +1199,7 @@ static bool shader_sm4_read_param(struct vkd3d_sm4_data *priv, const DWORD **ptr
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{
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param->type = register_type_table[register_type];
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}
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param->precision = VKD3D_SHADER_REGISTER_PRECISION_DEFAULT;
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param->data_type = data_type;
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*modifier = VKD3DSPSM_NONE;
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@ -1225,7 +1237,20 @@ static bool shader_sm4_read_param(struct vkd3d_sm4_data *priv, const DWORD **ptr
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break;
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}
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extended &= ~(VKD3D_SM4_EXTENDED_OPERAND_TYPE_MASK | VKD3D_SM4_REGISTER_MODIFIER_MASK);
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precision = (extended & VKD3D_SM4_REGISTER_PRECISION_MASK) >> VKD3D_SM4_REGISTER_PRECISION_SHIFT;
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if (precision >= ARRAY_SIZE(register_precision_table)
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|| register_precision_table[precision] == VKD3D_SHADER_REGISTER_PRECISION_INVALID)
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{
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FIXME("Unhandled register precision %#x.\n", precision);
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param->precision = VKD3D_SHADER_REGISTER_PRECISION_INVALID;
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}
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else
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{
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param->precision = register_precision_table[precision];
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}
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extended &= ~(VKD3D_SM4_EXTENDED_OPERAND_TYPE_MASK | VKD3D_SM4_REGISTER_MODIFIER_MASK
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| VKD3D_SM4_REGISTER_PRECISION_MASK);
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if (extended)
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FIXME("Skipping unhandled extended operand bits 0x%08x.\n", extended);
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}
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@ -101,6 +101,9 @@
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#define VKD3D_SM4_REGISTER_MODIFIER_SHIFT 6
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#define VKD3D_SM4_REGISTER_MODIFIER_MASK (0xffu << VKD3D_SM4_REGISTER_MODIFIER_SHIFT)
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#define VKD3D_SM4_REGISTER_PRECISION_SHIFT 14
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#define VKD3D_SM4_REGISTER_PRECISION_MASK (0x7u << VKD3D_SM4_REGISTER_PRECISION_SHIFT)
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#define VKD3D_SM4_ADDRESSING_SHIFT2 28
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#define VKD3D_SM4_ADDRESSING_MASK2 (0x3u << VKD3D_SM4_ADDRESSING_SHIFT2)
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@ -407,6 +410,15 @@ enum vkd3d_sm4_register_modifier
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VKD3D_SM4_REGISTER_MODIFIER_ABS_NEGATE = 0x03,
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};
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enum vkd3d_sm4_register_precision
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{
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VKD3D_SM4_REGISTER_PRECISION_DEFAULT = 0x0,
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VKD3D_SM4_REGISTER_PRECISION_MIN_FLOAT_16 = 0x1,
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VKD3D_SM4_REGISTER_PRECISION_MIN_FLOAT_10 = 0x2,
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VKD3D_SM4_REGISTER_PRECISION_MIN_INT_16 = 0x4,
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VKD3D_SM4_REGISTER_PRECISION_MIN_UINT_16 = 0x5,
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};
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enum vkd3d_sm4_output_primitive_type
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{
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VKD3D_SM4_OUTPUT_PT_POINTLIST = 0x1,
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@ -323,7 +323,9 @@ shader_input_sysval_semantic_names[] =
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struct vkd3d_d3d_asm_colours
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{
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const char *reset;
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const char *error;
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const char *literal;
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const char *modifier;
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const char *opcode;
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const char *reg;
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const char *swizzle;
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@ -1166,6 +1168,40 @@ static void shader_dump_register(struct vkd3d_d3d_asm_compiler *compiler, const
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}
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}
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static void shader_print_precision(struct vkd3d_d3d_asm_compiler *compiler, const struct vkd3d_shader_register *reg)
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{
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struct vkd3d_string_buffer *buffer = &compiler->buffer;
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const char *precision;
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if (reg->precision == VKD3D_SHADER_REGISTER_PRECISION_DEFAULT)
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return;
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switch (reg->precision)
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{
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case VKD3D_SHADER_REGISTER_PRECISION_MIN_FLOAT_16:
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precision = "min16f";
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break;
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case VKD3D_SHADER_REGISTER_PRECISION_MIN_FLOAT_10:
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precision = "min2_8f";
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break;
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case VKD3D_SHADER_REGISTER_PRECISION_MIN_INT_16:
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precision = "min16i";
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break;
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case VKD3D_SHADER_REGISTER_PRECISION_MIN_UINT_16:
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precision = "min16u";
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break;
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default:
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vkd3d_string_buffer_printf(buffer, " {%s<unhandled precision %#x>%s}",
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compiler->colours.error, reg->precision, compiler->colours.reset);
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return;
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}
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vkd3d_string_buffer_printf(buffer, " {%s%s%s}", compiler->colours.modifier, precision, compiler->colours.reset);
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}
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static void shader_dump_dst_param(struct vkd3d_d3d_asm_compiler *compiler,
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const struct vkd3d_shader_dst_param *param, bool is_declaration)
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{
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@ -1192,6 +1228,8 @@ static void shader_dump_dst_param(struct vkd3d_d3d_asm_compiler *compiler,
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shader_addline(buffer, "%c", write_mask_chars[3]);
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shader_addline(buffer, "%s", compiler->colours.reset);
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}
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shader_print_precision(compiler, ¶m->reg);
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}
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static void shader_dump_src_param(struct vkd3d_d3d_asm_compiler *compiler,
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@ -1262,6 +1300,8 @@ static void shader_dump_src_param(struct vkd3d_d3d_asm_compiler *compiler,
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}
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if (src_modifier == VKD3DSPSM_ABS || src_modifier == VKD3DSPSM_ABSNEG)
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shader_addline(buffer, "|");
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shader_print_precision(compiler, ¶m->reg);
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}
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static void shader_dump_ins_modifiers(struct vkd3d_d3d_asm_compiler *compiler,
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@ -1786,7 +1826,9 @@ enum vkd3d_result vkd3d_dxbc_binary_to_text(struct vkd3d_shader_parser *parser,
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static const struct vkd3d_d3d_asm_colours no_colours =
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{
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.reset = "",
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.error = "",
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.literal = "",
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.modifier = "",
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.opcode = "",
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.reg = "",
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.swizzle = "",
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@ -1796,7 +1838,9 @@ enum vkd3d_result vkd3d_dxbc_binary_to_text(struct vkd3d_shader_parser *parser,
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static const struct vkd3d_d3d_asm_colours colours =
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{
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.reset = "\x1b[m",
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.error = "\x1b[97;41m",
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.literal = "\x1b[95m",
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.modifier = "\x1b[36m",
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.opcode = "\x1b[96;1m",
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.reg = "\x1b[96m",
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.swizzle = "\x1b[93m",
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@ -441,6 +441,17 @@ enum vkd3d_shader_register_type
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VKD3DSPR_INVALID = ~0u,
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};
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enum vkd3d_shader_register_precision
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{
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VKD3D_SHADER_REGISTER_PRECISION_DEFAULT,
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VKD3D_SHADER_REGISTER_PRECISION_MIN_FLOAT_16,
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VKD3D_SHADER_REGISTER_PRECISION_MIN_FLOAT_10,
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VKD3D_SHADER_REGISTER_PRECISION_MIN_INT_16,
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VKD3D_SHADER_REGISTER_PRECISION_MIN_UINT_16,
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VKD3D_SHADER_REGISTER_PRECISION_INVALID = ~0u,
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};
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enum vkd3d_data_type
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{
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VKD3D_DATA_FLOAT,
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@ -621,6 +632,7 @@ struct vkd3d_shader_register_index
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struct vkd3d_shader_register
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{
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enum vkd3d_shader_register_type type;
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enum vkd3d_shader_register_precision precision;
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enum vkd3d_data_type data_type;
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struct vkd3d_shader_register_index idx[3];
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enum vkd3d_immconst_type immconst_type;
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