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https://github.com/RfidResearchGroup/ChameleonMini.git
synced 2026-05-12 11:20:37 -07:00
more indentation changes
This commit is contained in:
Georg
@@ -66,56 +66,56 @@
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"ror %0" "\n\t" \
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"lsr %2" "\n\t" \
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"ror %1" \
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: "+r" (__even), \
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"+r" (__odd), \
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: "+r" (__even), \
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"+r" (__odd), \
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"+r" (__byte) \
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: \
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: \
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: "r0" )
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/* Shift half LFSR state stored in three registers */
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/* Input is bit 0 of __in */
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#define SHIFT24(__b0, __b1, __b2, __in) \
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__asm__ __volatile__ ( \
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"lsr %3" "\n\t" \
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"ror %2" "\n\t" \
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"ror %1" "\n\t" \
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"ror %0" \
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: "+r" (__b0), \
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"+r" (__b1), \
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"+r" (__b2), \
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"+r" (__in) \
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: \
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: )
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__asm__ __volatile__ ( \
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"lsr %3" "\n\t" \
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"ror %2" "\n\t" \
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"ror %1" "\n\t" \
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"ror %0" \
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: "+r" (__b0), \
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"+r" (__b1), \
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"+r" (__b2), \
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"+r" (__in) \
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: \
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: )
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/* Shift half LFSR state stored in three registers */
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/* Input is bit 0 of __in */
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/* decrypt with __stream if bit 0 of __decrypt is set */
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#define SHIFT24_COND_DECRYPT(__b0, __b1, __b2, __in, __stream, __decrypt) \
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__asm__ __volatile__ ( \
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"sbrc %5, 0" "\n\t" \
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"eor %3, %4" "\n\t" \
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"lsr %3" "\n\t" \
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"ror %2" "\n\t" \
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"ror %1" "\n\t" \
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"ror %0" \
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: "+r" (__b0), \
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"+r" (__b1), \
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"+r" (__b2), \
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"+r" (__in) \
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: "r" (__stream), \
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"r" (__decrypt) \
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"sbrc %5, 0" "\n\t" \
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"eor %3, %4" "\n\t" \
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"lsr %3" "\n\t" \
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"ror %2" "\n\t" \
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"ror %1" "\n\t" \
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"ror %0" \
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: "+r" (__b0), \
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"+r" (__b1), \
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"+r" (__b2), \
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"+r" (__in) \
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: "r" (__stream), \
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"r" (__decrypt) \
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: "r0" )
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/* Shift a byte with input from an other byte */
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/* Input is bit 0 of __in */
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#define SHIFT8(__byte, __in) \
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__asm__ __volatile__ ( \
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"lsr %1" "\n\t" \
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"ror %0" \
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: "+r" (__byte), \
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"+r" (__in) \
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: \
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: "r0" )
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__asm__ __volatile__ ( \
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"lsr %1" "\n\t" \
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"ror %0" \
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: "+r" (__byte), \
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"+r" (__in) \
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: \
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: "r0" )
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/* End AVR specific */
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#else
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@@ -12,45 +12,45 @@
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#include "../LEDHook.h"
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#define ATQA_VALUE 0x0044
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#define SAK_CL1_VALUE ISO14443A_SAK_INCOMPLETE
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#define SAK_CL2_VALUE ISO14443A_SAK_COMPLETE_NOT_COMPLIANT
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#define ATQA_VALUE 0x0044
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#define SAK_CL1_VALUE ISO14443A_SAK_INCOMPLETE
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#define SAK_CL2_VALUE ISO14443A_SAK_COMPLETE_NOT_COMPLIANT
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#define ACK_VALUE 0x0A
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#define ACK_FRAME_SIZE 4 /* Bits */
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#define NAK_INVALID_ARG 0x00
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#define NAK_CRC_ERROR 0x01
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#define NAK_EEPROM_ERROR 0x05
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#define NAK_OTHER_ERROR 0x06
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#define NAK_FRAME_SIZE 4
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#define ACK_VALUE 0x0A
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#define ACK_FRAME_SIZE 4 /* Bits */
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#define NAK_INVALID_ARG 0x00
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#define NAK_CRC_ERROR 0x01
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#define NAK_EEPROM_ERROR 0x05
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#define NAK_OTHER_ERROR 0x06
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#define NAK_FRAME_SIZE 4
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#define CMD_READ 0x30
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#define CMD_READ_FRAME_SIZE 2 /* without CRC bytes */
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#define CMD_WRITE 0xA2
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#define CMD_READ_FRAME_SIZE 2 /* without CRC bytes */
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#define CMD_WRITE 0xA2
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#define CMD_WRITE_FRAME_SIZE 6 /* without CRC bytes */
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#define CMD_COMPAT_WRITE 0xA0
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#define CMD_COMPAT_WRITE_FRAME_SIZE 2
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#define CMD_HALT 0x50
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#define UID_CL1_ADDRESS 0x00 /* In Card Memory */
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#define UID_CL1_SIZE 3 /* In Bytes */
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#define UID_BCC1_ADDRESS 0x03
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#define UID_CL1_ADDRESS 0x00 /* In Card Memory */
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#define UID_CL1_SIZE 3 /* In Bytes */
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#define UID_BCC1_ADDRESS 0x03
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#define UID_CL2_ADDRESS 0x04
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#define UID_CL2_SIZE 4
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#define UID_BCC2_ADDRESS 0x08
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#define UID_CL2_SIZE 4
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#define UID_BCC2_ADDRESS 0x08
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#define BYTES_PER_PAGE 4
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#define PAGE_ADDRESS_MASK 0x0F
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#define BYTES_PER_PAGE 4
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#define PAGE_ADDRESS_MASK 0x0F
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#define BYTES_PER_READ 16
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#define PAGE_READ_MIN 0x00
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#define PAGE_READ_MAX 0x0F
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#define BYTES_PER_READ 16
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#define PAGE_READ_MIN 0x00
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#define PAGE_READ_MAX 0x0F
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#define BYTES_PER_WRITE 4
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#define PAGE_WRITE_MIN 0x02
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#define PAGE_WRITE_MAX 0x0F
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#define BYTES_PER_WRITE 4
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#define PAGE_WRITE_MIN 0x02
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#define PAGE_WRITE_MAX 0x0F
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#define BYTES_PER_COMPAT_WRITE 16
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#define BYTES_PER_COMPAT_WRITE 16
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static enum {
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STATE_HALT,
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@@ -105,19 +105,19 @@ static const PROGMEM ConfigurationType ConfigurationTable[] = {
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#endif
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#ifdef CONFIG_MF_CLASSIC_1K_7B_SUPPORT
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[CONFIG_MF_CLASSIC_1K_7B] = {
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.CodecInitFunc = ISO14443ACodecInit,
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.CodecDeInitFunc = ISO14443ACodecDeInit,
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.CodecTaskFunc = ISO14443ACodecTask,
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.ApplicationInitFunc = MifareClassicAppInit1K7B,
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.ApplicationResetFunc = MifareClassicAppReset,
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.ApplicationTaskFunc = MifareClassicAppTask,
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.ApplicationTickFunc = ApplicationTickDummy,
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.ApplicationProcessFunc = MifareClassicAppProcess,
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.ApplicationGetUidFunc = MifareClassicGetUid,
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.ApplicationSetUidFunc = MifareClassicSetUid,
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.UidSize = ISO14443A_UID_SIZE_DOUBLE,
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.MemorySize = MIFARE_CLASSIC_1K_MEM_SIZE,
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.ReadOnly = false
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.CodecInitFunc = ISO14443ACodecInit,
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.CodecDeInitFunc = ISO14443ACodecDeInit,
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.CodecTaskFunc = ISO14443ACodecTask,
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.ApplicationInitFunc = MifareClassicAppInit1K7B,
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.ApplicationResetFunc = MifareClassicAppReset,
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.ApplicationTaskFunc = MifareClassicAppTask,
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.ApplicationTickFunc = ApplicationTickDummy,
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.ApplicationProcessFunc = MifareClassicAppProcess,
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.ApplicationGetUidFunc = MifareClassicGetUid,
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.ApplicationSetUidFunc = MifareClassicSetUid,
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.UidSize = ISO14443A_UID_SIZE_DOUBLE,
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.MemorySize = MIFARE_CLASSIC_1K_MEM_SIZE,
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.ReadOnly = false
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},
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#endif
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#ifdef CONFIG_MF_CLASSIC_4K_SUPPORT
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@@ -55,9 +55,9 @@
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FlashReadWord:
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in r19, RAMPZ ; Save RAMPZ.
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out RAMPZ, r24 ; Load RAMPZ with the MSB of the address.
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movw ZL, r22 ; Move the low bytes to the Z pointer
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elpm r24, Z+ ; Extended load byte from address pointed to by Z.
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elpm r25, Z ; Extended load byte from address pointed to by Z.
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movw ZL, r22 ; Move the low bytes to the Z pointer
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elpm r24, Z+ ; Extended load byte from address pointed to by Z.
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elpm r25, Z ; Extended load byte from address pointed to by Z.
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out RAMPZ, r19 ; Restore RAMPZ register.
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ret
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@@ -74,9 +74,9 @@ FlashReadWord:
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FlashEraseApplicationPage:
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in r19, RAMPZ ; Save RAMPZ, which is restored in FlashCommonSPM.
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out RAMPZ, r24 ; Load RAMPZ with the MSB of the address.
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movw r24, r22 ; Move low bytes for ZH:ZL to R25:R24
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movw r24, r22 ; Move low bytes for ZH:ZL to R25:R24
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ldi r20, NVM_CMD_ERASE_APP_PAGE_gc ; Prepare NVM command in R20.
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jmp FlashCommonSPM ; Jump to common SPM code.
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jmp FlashCommonSPM ; Jump to common SPM code.
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; This routine writes the word from R23:R22 into the Flash page buffer at
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; address R25:R24.
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@@ -91,9 +91,9 @@ FlashEraseApplicationPage:
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.global FlashLoadFlashWord
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FlashLoadFlashWord:
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in r19, RAMPZ ; Save RAMPZ, which is restored in FlashCommonSPM.
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movw r0, r22 ; Prepare flash word in R1:R0.
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movw r0, r22 ; Prepare flash word in R1:R0.
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ldi r20, NVM_CMD_LOAD_FLASH_BUFFER_gc ; Prepare NVM command in R20.
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jmp FlashCommonSPM ; Jump to common SPM code.
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jmp FlashCommonSPM ; Jump to common SPM code.
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; This routine erases first and then writes the page buffer to the
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@@ -110,9 +110,9 @@ FlashLoadFlashWord:
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FlashEraseWriteApplicationPage:
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in r19, RAMPZ ; Save RAMPZ, which is restored in FlashCommonSPM.
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out RAMPZ, r24 ; Load RAMPZ with the MSB of the address.
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movw r24, r22 ; Move low bytes of address to ZH:ZL from R23:R22
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movw r24, r22 ; Move low bytes of address to ZH:ZL from R23:R22
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ldi r20, NVM_CMD_ERASE_WRITE_APP_PAGE_gc ; Prepare NVM command in R20.
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jmp FlashCommonSPM ; Jump to common SPM code.
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jmp FlashCommonSPM ; Jump to common SPM code.
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; This routine flushes the Flash page buffer.
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;
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@@ -126,7 +126,7 @@ FlashEraseWriteApplicationPage:
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FlashEraseFlashBuffer:
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in r19, RAMPZ ; Save RAMPZ, which is restored in FlashCommonSPM.
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ldi r20, NVM_CMD_ERASE_FLASH_BUFFER_gc ; Prepare NVM command in R20.
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;jmp FlashCommonSPM ; Jump to common SPM code.
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;jmp FlashCommonSPM ; Jump to common SPM code.
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jmp FlashCommonCMD
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; This routine wait for the SPM to finish and clears the command register.
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@@ -190,7 +190,7 @@ FlashCommonCMD:
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; R24 - Result from LPM operation.
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.section .text
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FlashCommonLPM:
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movw ZL, r24 ; Load index into Z.
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movw ZL, r24 ; Load index into Z.
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sts NVM_CMD, r20 ; Load prepared command into NVM Command register.
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lpm r24,Z
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ret
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@@ -210,11 +210,11 @@ FlashCommonLPM:
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; Nothing.
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.section .spmhelper
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FlashCommonSPM:
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movw ZL, r24 ; Load R25:R24 into Z.
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movw ZL, r24 ; Load R25:R24 into Z.
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sts NVM_CMD, r20 ; Load prepared command into NVM Command register.
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ldi r18, CCP_SPM_gc ; Prepare Protect SPM signature in R18
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sts CCP, r18 ; Enable SPM operation (this disables interrupts for 4 cycles).
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spm ; Self-program.
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spm ; Self-program.
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clr r1 ; Clear R1 for GCC _zero_reg_ to function properly.
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out RAMPZ, r19 ; Restore RAMPZ register.
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ret
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