diff --git a/Firmware/Chameleon-Mini/Application/Crypto1.c b/Firmware/Chameleon-Mini/Application/Crypto1.c index 6be6780..feb6aa5 100644 --- a/Firmware/Chameleon-Mini/Application/Crypto1.c +++ b/Firmware/Chameleon-Mini/Application/Crypto1.c @@ -66,56 +66,56 @@ "ror %0" "\n\t" \ "lsr %2" "\n\t" \ "ror %1" \ - : "+r" (__even), \ - "+r" (__odd), \ + : "+r" (__even), \ + "+r" (__odd), \ "+r" (__byte) \ - : \ + : \ : "r0" ) /* Shift half LFSR state stored in three registers */ /* Input is bit 0 of __in */ #define SHIFT24(__b0, __b1, __b2, __in) \ - __asm__ __volatile__ ( \ - "lsr %3" "\n\t" \ - "ror %2" "\n\t" \ - "ror %1" "\n\t" \ - "ror %0" \ - : "+r" (__b0), \ - "+r" (__b1), \ - "+r" (__b2), \ - "+r" (__in) \ - : \ - : ) + __asm__ __volatile__ ( \ + "lsr %3" "\n\t" \ + "ror %2" "\n\t" \ + "ror %1" "\n\t" \ + "ror %0" \ + : "+r" (__b0), \ + "+r" (__b1), \ + "+r" (__b2), \ + "+r" (__in) \ + : \ + : ) /* Shift half LFSR state stored in three registers */ /* Input is bit 0 of __in */ /* decrypt with __stream if bit 0 of __decrypt is set */ #define SHIFT24_COND_DECRYPT(__b0, __b1, __b2, __in, __stream, __decrypt) \ __asm__ __volatile__ ( \ - "sbrc %5, 0" "\n\t" \ - "eor %3, %4" "\n\t" \ - "lsr %3" "\n\t" \ - "ror %2" "\n\t" \ - "ror %1" "\n\t" \ - "ror %0" \ - : "+r" (__b0), \ - "+r" (__b1), \ - "+r" (__b2), \ - "+r" (__in) \ - : "r" (__stream), \ - "r" (__decrypt) \ + "sbrc %5, 0" "\n\t" \ + "eor %3, %4" "\n\t" \ + "lsr %3" "\n\t" \ + "ror %2" "\n\t" \ + "ror %1" "\n\t" \ + "ror %0" \ + : "+r" (__b0), \ + "+r" (__b1), \ + "+r" (__b2), \ + "+r" (__in) \ + : "r" (__stream), \ + "r" (__decrypt) \ : "r0" ) /* Shift a byte with input from an other byte */ /* Input is bit 0 of __in */ #define SHIFT8(__byte, __in) \ - __asm__ __volatile__ ( \ - "lsr %1" "\n\t" \ - "ror %0" \ - : "+r" (__byte), \ - "+r" (__in) \ - : \ - : "r0" ) + __asm__ __volatile__ ( \ + "lsr %1" "\n\t" \ + "ror %0" \ + : "+r" (__byte), \ + "+r" (__in) \ + : \ + : "r0" ) /* End AVR specific */ #else diff --git a/Firmware/Chameleon-Mini/Application/MifareUltralight.c b/Firmware/Chameleon-Mini/Application/MifareUltralight.c index f55c126..98c5181 100644 --- a/Firmware/Chameleon-Mini/Application/MifareUltralight.c +++ b/Firmware/Chameleon-Mini/Application/MifareUltralight.c @@ -12,45 +12,45 @@ #include "../LEDHook.h" -#define ATQA_VALUE 0x0044 -#define SAK_CL1_VALUE ISO14443A_SAK_INCOMPLETE -#define SAK_CL2_VALUE ISO14443A_SAK_COMPLETE_NOT_COMPLIANT +#define ATQA_VALUE 0x0044 +#define SAK_CL1_VALUE ISO14443A_SAK_INCOMPLETE +#define SAK_CL2_VALUE ISO14443A_SAK_COMPLETE_NOT_COMPLIANT -#define ACK_VALUE 0x0A -#define ACK_FRAME_SIZE 4 /* Bits */ -#define NAK_INVALID_ARG 0x00 -#define NAK_CRC_ERROR 0x01 -#define NAK_EEPROM_ERROR 0x05 -#define NAK_OTHER_ERROR 0x06 -#define NAK_FRAME_SIZE 4 +#define ACK_VALUE 0x0A +#define ACK_FRAME_SIZE 4 /* Bits */ +#define NAK_INVALID_ARG 0x00 +#define NAK_CRC_ERROR 0x01 +#define NAK_EEPROM_ERROR 0x05 +#define NAK_OTHER_ERROR 0x06 +#define NAK_FRAME_SIZE 4 #define CMD_READ 0x30 -#define CMD_READ_FRAME_SIZE 2 /* without CRC bytes */ -#define CMD_WRITE 0xA2 +#define CMD_READ_FRAME_SIZE 2 /* without CRC bytes */ +#define CMD_WRITE 0xA2 #define CMD_WRITE_FRAME_SIZE 6 /* without CRC bytes */ #define CMD_COMPAT_WRITE 0xA0 #define CMD_COMPAT_WRITE_FRAME_SIZE 2 #define CMD_HALT 0x50 -#define UID_CL1_ADDRESS 0x00 /* In Card Memory */ -#define UID_CL1_SIZE 3 /* In Bytes */ -#define UID_BCC1_ADDRESS 0x03 +#define UID_CL1_ADDRESS 0x00 /* In Card Memory */ +#define UID_CL1_SIZE 3 /* In Bytes */ +#define UID_BCC1_ADDRESS 0x03 #define UID_CL2_ADDRESS 0x04 -#define UID_CL2_SIZE 4 -#define UID_BCC2_ADDRESS 0x08 +#define UID_CL2_SIZE 4 +#define UID_BCC2_ADDRESS 0x08 -#define BYTES_PER_PAGE 4 -#define PAGE_ADDRESS_MASK 0x0F +#define BYTES_PER_PAGE 4 +#define PAGE_ADDRESS_MASK 0x0F -#define BYTES_PER_READ 16 -#define PAGE_READ_MIN 0x00 -#define PAGE_READ_MAX 0x0F +#define BYTES_PER_READ 16 +#define PAGE_READ_MIN 0x00 +#define PAGE_READ_MAX 0x0F -#define BYTES_PER_WRITE 4 -#define PAGE_WRITE_MIN 0x02 -#define PAGE_WRITE_MAX 0x0F +#define BYTES_PER_WRITE 4 +#define PAGE_WRITE_MIN 0x02 +#define PAGE_WRITE_MAX 0x0F -#define BYTES_PER_COMPAT_WRITE 16 +#define BYTES_PER_COMPAT_WRITE 16 static enum { STATE_HALT, diff --git a/Firmware/Chameleon-Mini/Configuration.c b/Firmware/Chameleon-Mini/Configuration.c index ebbea50..df0707c 100644 --- a/Firmware/Chameleon-Mini/Configuration.c +++ b/Firmware/Chameleon-Mini/Configuration.c @@ -105,19 +105,19 @@ static const PROGMEM ConfigurationType ConfigurationTable[] = { #endif #ifdef CONFIG_MF_CLASSIC_1K_7B_SUPPORT [CONFIG_MF_CLASSIC_1K_7B] = { - .CodecInitFunc = ISO14443ACodecInit, - .CodecDeInitFunc = ISO14443ACodecDeInit, - .CodecTaskFunc = ISO14443ACodecTask, - .ApplicationInitFunc = MifareClassicAppInit1K7B, - .ApplicationResetFunc = MifareClassicAppReset, - .ApplicationTaskFunc = MifareClassicAppTask, - .ApplicationTickFunc = ApplicationTickDummy, - .ApplicationProcessFunc = MifareClassicAppProcess, - .ApplicationGetUidFunc = MifareClassicGetUid, - .ApplicationSetUidFunc = MifareClassicSetUid, - .UidSize = ISO14443A_UID_SIZE_DOUBLE, - .MemorySize = MIFARE_CLASSIC_1K_MEM_SIZE, - .ReadOnly = false + .CodecInitFunc = ISO14443ACodecInit, + .CodecDeInitFunc = ISO14443ACodecDeInit, + .CodecTaskFunc = ISO14443ACodecTask, + .ApplicationInitFunc = MifareClassicAppInit1K7B, + .ApplicationResetFunc = MifareClassicAppReset, + .ApplicationTaskFunc = MifareClassicAppTask, + .ApplicationTickFunc = ApplicationTickDummy, + .ApplicationProcessFunc = MifareClassicAppProcess, + .ApplicationGetUidFunc = MifareClassicGetUid, + .ApplicationSetUidFunc = MifareClassicSetUid, + .UidSize = ISO14443A_UID_SIZE_DOUBLE, + .MemorySize = MIFARE_CLASSIC_1K_MEM_SIZE, + .ReadOnly = false }, #endif #ifdef CONFIG_MF_CLASSIC_4K_SUPPORT diff --git a/Firmware/Chameleon-Mini/MemoryAsm.S b/Firmware/Chameleon-Mini/MemoryAsm.S index be91df9..1821302 100644 --- a/Firmware/Chameleon-Mini/MemoryAsm.S +++ b/Firmware/Chameleon-Mini/MemoryAsm.S @@ -55,9 +55,9 @@ FlashReadWord: in r19, RAMPZ ; Save RAMPZ. out RAMPZ, r24 ; Load RAMPZ with the MSB of the address. - movw ZL, r22 ; Move the low bytes to the Z pointer - elpm r24, Z+ ; Extended load byte from address pointed to by Z. - elpm r25, Z ; Extended load byte from address pointed to by Z. + movw ZL, r22 ; Move the low bytes to the Z pointer + elpm r24, Z+ ; Extended load byte from address pointed to by Z. + elpm r25, Z ; Extended load byte from address pointed to by Z. out RAMPZ, r19 ; Restore RAMPZ register. ret @@ -74,9 +74,9 @@ FlashReadWord: FlashEraseApplicationPage: in r19, RAMPZ ; Save RAMPZ, which is restored in FlashCommonSPM. out RAMPZ, r24 ; Load RAMPZ with the MSB of the address. - movw r24, r22 ; Move low bytes for ZH:ZL to R25:R24 + movw r24, r22 ; Move low bytes for ZH:ZL to R25:R24 ldi r20, NVM_CMD_ERASE_APP_PAGE_gc ; Prepare NVM command in R20. - jmp FlashCommonSPM ; Jump to common SPM code. + jmp FlashCommonSPM ; Jump to common SPM code. ; This routine writes the word from R23:R22 into the Flash page buffer at ; address R25:R24. @@ -91,9 +91,9 @@ FlashEraseApplicationPage: .global FlashLoadFlashWord FlashLoadFlashWord: in r19, RAMPZ ; Save RAMPZ, which is restored in FlashCommonSPM. - movw r0, r22 ; Prepare flash word in R1:R0. + movw r0, r22 ; Prepare flash word in R1:R0. ldi r20, NVM_CMD_LOAD_FLASH_BUFFER_gc ; Prepare NVM command in R20. - jmp FlashCommonSPM ; Jump to common SPM code. + jmp FlashCommonSPM ; Jump to common SPM code. ; This routine erases first and then writes the page buffer to the @@ -110,9 +110,9 @@ FlashLoadFlashWord: FlashEraseWriteApplicationPage: in r19, RAMPZ ; Save RAMPZ, which is restored in FlashCommonSPM. out RAMPZ, r24 ; Load RAMPZ with the MSB of the address. - movw r24, r22 ; Move low bytes of address to ZH:ZL from R23:R22 + movw r24, r22 ; Move low bytes of address to ZH:ZL from R23:R22 ldi r20, NVM_CMD_ERASE_WRITE_APP_PAGE_gc ; Prepare NVM command in R20. - jmp FlashCommonSPM ; Jump to common SPM code. + jmp FlashCommonSPM ; Jump to common SPM code. ; This routine flushes the Flash page buffer. ; @@ -126,7 +126,7 @@ FlashEraseWriteApplicationPage: FlashEraseFlashBuffer: in r19, RAMPZ ; Save RAMPZ, which is restored in FlashCommonSPM. ldi r20, NVM_CMD_ERASE_FLASH_BUFFER_gc ; Prepare NVM command in R20. - ;jmp FlashCommonSPM ; Jump to common SPM code. + ;jmp FlashCommonSPM ; Jump to common SPM code. jmp FlashCommonCMD ; This routine wait for the SPM to finish and clears the command register. @@ -190,7 +190,7 @@ FlashCommonCMD: ; R24 - Result from LPM operation. .section .text FlashCommonLPM: - movw ZL, r24 ; Load index into Z. + movw ZL, r24 ; Load index into Z. sts NVM_CMD, r20 ; Load prepared command into NVM Command register. lpm r24,Z ret @@ -210,11 +210,11 @@ FlashCommonLPM: ; Nothing. .section .spmhelper FlashCommonSPM: - movw ZL, r24 ; Load R25:R24 into Z. + movw ZL, r24 ; Load R25:R24 into Z. sts NVM_CMD, r20 ; Load prepared command into NVM Command register. ldi r18, CCP_SPM_gc ; Prepare Protect SPM signature in R18 sts CCP, r18 ; Enable SPM operation (this disables interrupts for 4 cycles). - spm ; Self-program. + spm ; Self-program. clr r1 ; Clear R1 for GCC _zero_reg_ to function properly. out RAMPZ, r19 ; Restore RAMPZ register. ret