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Fix issue #22: Add cmpxchg16b, fix pextrw definition

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This commit is contained in:
Vivek Thampi
2013-05-05 19:49:11 +05:30
parent 9761f13594
commit 7cd6b864e9
4 changed files with 21 additions and 2 deletions
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docs/x86/optable.xml
+16 -2
View File
@@ -842,7 +842,21 @@
<mnemonic>cmpxchg8b</mnemonic>
<def>
<pfx>aso rexr rexx rexb</pfx>
<opc>0f c7 /reg=1</opc>
<opc>0f c7 /reg=1 /o=16</opc>
<opr>M</opr>
</def>
<def>
<pfx>aso rexr rexx rexb</pfx>
<opc>0f c7 /reg=1 /o=32</opc>
<opr>M</opr>
</def>
</instruction>
<instruction>
<mnemonic>cmpxchg16b</mnemonic>
<def>
<pfx>aso rexr rexx rexb</pfx>
<opc>0f c7 /reg=1 /o=64</opc>
<opr>M</opr>
</def>
</instruction>
@@ -5627,7 +5641,7 @@
<def>
<pfx>aso rexx rexr rexb</pfx>
<opc>/sse=66 0f 3a 15</opc>
<opr>MwRv V Ib</opr>
<opr>MwRd V Ib</opr>
</def>
</instruction>
libudis86/decode.h
+1
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@@ -122,6 +122,7 @@ enum ud_operand_size {
*/
SZ_BD = (SZ_B << 8) | SZ_D,
SZ_BV = (SZ_B << 8) | SZ_V,
SZ_WD = (SZ_W << 8) | SZ_D,
SZ_WV = (SZ_W << 8) | SZ_V,
SZ_WY = (SZ_W << 8) | SZ_Y,
SZ_DY = (SZ_D << 8) | SZ_Y,
scripts/ud_itab.py
+1
View File
@@ -61,6 +61,7 @@ class UdItabGenerator( ud_opcode.UdOpcodeTables ):
"MbRd" : [ "OP_MR" , "SZ_BD" ],
"MbRv" : [ "OP_MR" , "SZ_BV" ],
"MwRv" : [ "OP_MR" , "SZ_WV" ],
"MwRd" : [ "OP_MR" , "SZ_WD" ],
"MwRy" : [ "OP_MR" , "SZ_WY" ],
"MdRy" : [ "OP_MR" , "SZ_DY" ],
"I1" : [ "OP_I1" , "SZ_NA" ],
tests/oprgen.py
+3
View File
@@ -435,6 +435,9 @@ class UdTestGenerator( ud_opcode.UdOpcodeTables ):
def Insn_MwRv(self):
return [self.Opr_MwRv(cast=True)]
def Insn_MwRd_V_Ib(self):
return [self.Opr_MwRd(cast=False), self.Opr_V(), self.Opr_Ib()]
def Insn_S_MwRv(self):
if self.mode == 64:
return [self.Opr_S(), self.Opr_MwRd(cast=False)]