[add] m5stack core135 support!

2026-05-20 11:24:38 -07:00 · 2024-04-16 15:33:49 +08:00
parent 6ff87e9049
commit a7ed590ac4
37 changed files with 8033 additions and 15 deletions
@@ -81,21 +81,28 @@ configurations:
   how Device Tree files generated by CubeMX can be integrated in a
   Buildroot configuration.

-| Feature | st_stm32mp157*_dk1 | st_stm32mp157*_dk2 | st_stm32mp157*_dk1_demo | st_stm32mp157*_dk2_demo | st_stm32mp135f_dk | st_stm32mp135f_dk_demo |
-| ------- | ------------------ | ------------------ | ----------------------- | ----------------------- | ----------------------- | ----------------------- |
-| TF-A    | v2.8-stm32mp-r1.1 | v2.8-stm32mp-r1.1 | v2.8-stm32mp-r1.1 | v2.8-stm32mp-r1.1 | v2.8-stm32mp-r1.1 | v2.8-stm32mp-r1.1 |
-| U-Boot  | v2022.10-stm32mp-r1.1 | v2022.10-stm32mp-r1.1 | v2022.10-stm32mp-r1.1 | v2022.10-stm32mp-r1.1 | v2022.10-stm32mp-r1.1 | v2022.10-stm32mp-r1.1 |
-| Linux   | v6.1-stm32mp-r1.1 | v6.1-stm32mp-r1.1 | v6.1-stm32mp-r1.1 | v6.1-stm32mp-r1.1 | v6.1-stm32mp-r1.1 | v6.1-stm32mp-r1.1 |
-| OP-TEE  | 3.19.0-stm32mp-r1.1 | 3.19.0-stm32mp-r1.1 | 3.19.0-stm32mp-r1.1 | 3.19.0-stm32mp-r1.1 | 3.19.0-stm32mp-r1.1 | 3.19.0-stm32mp-r1.1 |
-| Qt5     | No | No | Yes | Yes | No | Yes |
-| OpenGL  | No | No | Yes | Yes | No | Yes |
-| WiFi    | N/A | No | N/A | Yes | No | Yes |
-| Bluetooth | N/A | No | N/A | Yes | No | Yes |
-| Audio    | No | No | Yes | Yes | N/A | N/A |
-| Video    | N/A | N/A | N/A | N/A | No | Yes |
-| CubeMX Device Tree | No | No | Yes | Yes | No | Yes |
-| Cortex M4 Firmware examples | No | No | Yes | Yes | N/A | N/A |
-| RAUC OTA | No | No | Yes | Yes | No | Yes |
+11. `m5stack_core135_defconfig`, which is a more feature-ful
+   configuration to support the [STM32MP135F Discovery Kit](https://wiki.st.com/stm32mpu/wiki/STM32MP13_microprocessor)
+   board. It has support for OpenGL and Qt5 for graphics, for OP-TEE
+   as a Trusted Execution Environment, for RAUC for OTA. It also shows
+   how Device Tree files generated by CubeMX can be integrated in a
+   Buildroot configuration.
+
+| Feature | st_stm32mp157*_dk1 | st_stm32mp157*_dk2 | st_stm32mp157*_dk1_demo | st_stm32mp157*_dk2_demo | st_stm32mp135f_dk | st_stm32mp135f_dk_demo | m5stack_core135 |
+| ------- | ------------------ | ------------------ | ----------------------- | ----------------------- | ----------------------- | ----------------------- | ----------------------- |
+| TF-A    | v2.8-stm32mp-r1.1 | v2.8-stm32mp-r1.1 | v2.8-stm32mp-r1.1 | v2.8-stm32mp-r1.1 | v2.8-stm32mp-r1.1 | v2.8-stm32mp-r1.1 | v2.8-stm32mp-r1.1 |
+| U-Boot  | v2022.10-stm32mp-r1.1 | v2022.10-stm32mp-r1.1 | v2022.10-stm32mp-r1.1 | v2022.10-stm32mp-r1.1 | v2022.10-stm32mp-r1.1 | v2022.10-stm32mp-r1.1 | v2022.10-stm32mp-r1.1 |
+| Linux   | v6.1-stm32mp-r1.1 | v6.1-stm32mp-r1.1 | v6.1-stm32mp-r1.1 | v6.1-stm32mp-r1.1 | v6.1-stm32mp-r1.1 | v6.1-stm32mp-r1.1 | v6.1-stm32mp-r1.1 |
+| OP-TEE  | 3.19.0-stm32mp-r1.1 | 3.19.0-stm32mp-r1.1 | 3.19.0-stm32mp-r1.1 | 3.19.0-stm32mp-r1.1 | 3.19.0-stm32mp-r1.1 | 3.19.0-stm32mp-r1.1 | 3.19.0-stm32mp-r1.1 |
+| Qt5     | No | No | Yes | Yes | No | Yes | Yes |
+| OpenGL  | No | No | Yes | Yes | No | Yes | Yes |
+| WiFi    | N/A | No | N/A | Yes | No | Yes | NO |
+| Bluetooth | N/A | No | N/A | Yes | No | Yes | NO |
+| Audio    | No | No | Yes | Yes | N/A | N/A | N/A |
+| Video    | N/A | N/A | N/A | N/A | No | Yes | Yes |
+| CubeMX Device Tree | No | No | Yes | Yes | No | Yes | Yes |
+| Cortex M4 Firmware examples | No | No | Yes | Yes | N/A | N/A | N/A |
+| RAUC OTA | No | No | Yes | Yes | No | Yes | No |

 Note that upstream Buildroot also contains pre-defined configurations
 for STM32MP1 platforms, but they use the upstream versions of TF-A,
@@ -0,0 +1,4 @@
+#opt	Id	Name		Type		Device	Offset		Binary
+-	0x01	fsbl_boot	Binary		none	0x0		%ATFBIN%
+-	0x03	fip_boot	Binary		none	0x0		fip.bin
+P	0x10	sdcard		RawImage	mmc0	0x0		sdcard.img
@@ -0,0 +1,26 @@
+image sdcard.img {
+	hdimage {
+		partition-table-type = "gpt"
+	}
+
+	partition fsbl1 {
+		image = "%ATFBIN%"
+	}
+
+	partition fsbl2 {
+		image = "%ATFBIN%"
+	}
+
+	partition fip {
+		image = "fip.bin"
+	}
+
+	partition u-boot-env {
+		size = 2M
+	}
+
+	partition rootfs {
+		image = "rootfs.ext4"
+		bootable = "yes"
+	}
+}
@@ -0,0 +1 @@
+# CONFIG_DRM_ETNAVIV is not set
@@ -0,0 +1 @@
+CONFIG_DRM_FBDEV_EMULATION=y
@@ -0,0 +1,22 @@
+CONFIG_SPI_STM32=y
+CONFIG_FB_SYS_FILLRECT=y
+CONFIG_FB_SYS_COPYAREA=y
+CONFIG_FB_SYS_IMAGEBLIT=y
+CONFIG_FB_SYS_FOPS=y
+CONFIG_FB_DEFERRED_IO=y
+CONFIG_FB_BACKLIGHT=y
+CONFIG_STAGING=y
+CONFIG_FB_TFT=y
+CONFIG_FB_TFT_ILI9341_M5=m
+CONFIG_RTC_DRV_PCF8563=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_TOUCHSCREEN_FT6236=y
+
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
+CONFIG_LOGO=y
+CONFIG_LOGO_LINUX_MONO=y
+CONFIG_LOGO_LINUX_VGA16=y
+CONFIG_LOGO_LINUX_CLUT224=y
+CONFIG_FONT_SUPPORT=y
+CONFIG_FONT_8x8=y
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) STMicroelectronics 2022 - All Rights Reserved
+ * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
+ */
+
+&cpu0_opp_table {
+		opp-990000000 {
+			opp-hz = /bits/ 64 <990000000>;
+			opp-microvolt = <1250000>;
+			opp-supported-hw = <0x2>;
+			// st,opp-default;
+		};
+
+		opp-650000000 {
+			opp-hz = /bits/ 64 <650000000>;
+			opp-microvolt = <1250000>;
+			opp-supported-hw = <0x2>;
+			st,opp-default;
+		};
+
+};
@@ -0,0 +1,89 @@
+From de1ccf088ca0b5ccbfe2afab79a295253fe7d7e3 Mon Sep 17 00:00:00 2001
+From: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
+Date: Thu, 13 Jul 2023 12:13:28 +0200
+Subject: [PATCH] ASoC: cs42l51: fix driver to properly autoload with automatic
+ module loading
+
+In commit 2cb1e0259f50 ("ASoC: cs42l51: re-hook of_match_table
+pointer"), 9 years ago, some random guy fixed the cs42l51 after it was
+split into a core part and an I2C part to properly match based on a
+Device Tree compatible string.
+
+However, the fix in this commit is wrong: the MODULE_DEVICE_TABLE(of,
+....) is in the core part of the driver, not the I2C part. Therefore,
+automatic module loading based on module.alias, based on matching with
+the DT compatible string, loads the core part of the driver, but not
+the I2C part. And threfore, the i2c_driver is not registered, and the
+codec is not known to the system, nor matched with a DT node with the
+corresponding compatible string.
+
+In order to fix that, we move the MODULE_DEVICE_TABLE(of, ...) into
+the I2C part of the driver. The cs42l51_of_match[] array is also moved
+as well, as it is not possible to have this definition in one file,
+and the MODULE_DEVICE_TABLE(of, ...) invocation in another file, due
+to how MODULE_DEVICE_TABLE works.
+
+Thanks to this commit, the I2C part of the driver now properly
+autoloads, and thanks to its dependency on the core part, the core
+part gets autoloaded as well, resulting in a functional sound card
+without having to manually load kernel modules.
+
+Fixes: 2cb1e0259f50 ("ASoC: cs42l51: re-hook of_match_table pointer")
+Cc: stable@vger.kernel.org
+Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
+---
+ sound/soc/codecs/cs42l51-i2c.c | 6 ++++++
+ sound/soc/codecs/cs42l51.c     | 7 -------
+ sound/soc/codecs/cs42l51.h     | 1 -
+ 3 files changed, 6 insertions(+), 8 deletions(-)
+
+diff --git a/sound/soc/codecs/cs42l51-i2c.c b/sound/soc/codecs/cs42l51-i2c.c
+index b2106ff6a7cb..e7db7bcd0296 100644
+--- a/sound/soc/codecs/cs42l51-i2c.c
+++ b/sound/soc/codecs/cs42l51-i2c.c
+@@ -19,6 +19,12 @@ static struct i2c_device_id cs42l51_i2c_id[] = {
+ };
+ MODULE_DEVICE_TABLE(i2c, cs42l51_i2c_id);
+ 
+const struct of_device_id cs42l51_of_match[] = {
+	{ .compatible = "cirrus,cs42l51", },
+	{ }
+};
+MODULE_DEVICE_TABLE(of, cs42l51_of_match);
+
+ static int cs42l51_i2c_probe(struct i2c_client *i2c)
+ {
+ 	struct regmap_config config;
+diff --git a/sound/soc/codecs/cs42l51.c b/sound/soc/codecs/cs42l51.c
+index a67cd3ee84e0..a7079ae0ca09 100644
+--- a/sound/soc/codecs/cs42l51.c
+++ b/sound/soc/codecs/cs42l51.c
+@@ -823,13 +823,6 @@ int __maybe_unused cs42l51_resume(struct device *dev)
+ }
+ EXPORT_SYMBOL_GPL(cs42l51_resume);
+ 
+-const struct of_device_id cs42l51_of_match[] = {
+-	{ .compatible = "cirrus,cs42l51", },
+-	{ }
+-};
+-MODULE_DEVICE_TABLE(of, cs42l51_of_match);
+-EXPORT_SYMBOL_GPL(cs42l51_of_match);
+-
+ MODULE_AUTHOR("Arnaud Patard <arnaud.patard@rtp-net.org>");
+ MODULE_DESCRIPTION("Cirrus Logic CS42L51 ALSA SoC Codec Driver");
+ MODULE_LICENSE("GPL");
+diff --git a/sound/soc/codecs/cs42l51.h b/sound/soc/codecs/cs42l51.h
+index a79343e8a54e..125703ede113 100644
+--- a/sound/soc/codecs/cs42l51.h
+++ b/sound/soc/codecs/cs42l51.h
+@@ -16,7 +16,6 @@ int cs42l51_probe(struct device *dev, struct regmap *regmap);
+ void cs42l51_remove(struct device *dev);
+ int __maybe_unused cs42l51_suspend(struct device *dev);
+ int __maybe_unused cs42l51_resume(struct device *dev);
+-extern const struct of_device_id cs42l51_of_match[];
+ 
+ #define CS42L51_CHIP_ID			0x1B
+ #define CS42L51_CHIP_REV_A		0x00
+-- 
+2.41.0
+
@@ -0,0 +1,105 @@
+--- a/sound/soc/codecs/out_to_pins.c	2024-03-27 18:41:29.759999974 +0800
+++ b/sound/soc/codecs/out_to_pins.c	2024-04-11 09:59:33.273128140 +0800
+@@ -0,0 +1,102 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Based on generic Bluetooth SCO link
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+
+#include <sound/soc.h>
+
+static const struct snd_soc_dapm_widget OutToPins_widgets[] = {
+	SND_SOC_DAPM_INPUT("RX"),
+	SND_SOC_DAPM_OUTPUT("TX"),
+};
+
+static const struct snd_soc_dapm_route OutToPins_routes[] = {
+	{ "Capture", NULL, "RX" },
+	{ "TX", NULL, "Playback" },
+};
+
+static struct snd_soc_dai_driver OutToPins_dai[] = {
+	{
+		.name = "OutToPins-pcm",
+		.playback = {
+			.stream_name = "Playback",
+			.channels_min = 1,
+			.channels_max = 4,
+ 			.rates = SNDRV_PCM_RATE_CONTINUOUS,
+ 			/* DMA does not support 24 bits transfers */
+ 			.formats =
+ 				SNDRV_PCM_FMTBIT_S16_LE |
+ 				SNDRV_PCM_FMTBIT_S32_LE,
+		},
+		.capture = {
+			 .stream_name = "Capture",
+			.channels_min = 1,
+			.channels_max = 4,
+ 			.rates = SNDRV_PCM_RATE_CONTINUOUS,
+ 			/* DMA does not support 24 bits transfers */
+ 			.formats =
+ 				SNDRV_PCM_FMTBIT_S16_LE |
+ 				SNDRV_PCM_FMTBIT_S32_LE,
+		},
+	},
+
+};
+
+static int OutToPins_of_xlate_dai_id(struct snd_soc_component *component,
+				   struct device_node *endpoint)
+{
+	/* return dai id 0, whatever the endpoint index */
+	return 0;
+}
+
+static const struct snd_soc_component_driver soc_component_dev_OutToPins = {
+	.dapm_widgets		= OutToPins_widgets,
+	.num_dapm_widgets	= ARRAY_SIZE(OutToPins_widgets),
+	.dapm_routes		= OutToPins_routes,
+	.num_dapm_routes	= ARRAY_SIZE(OutToPins_routes),
+	.of_xlate_dai_id	= OutToPins_of_xlate_dai_id,
+	.idle_bias_on		= 1,
+	.use_pmdown_time	= 1,
+	.endianness		= 1,
+	.legacy_dai_naming	= 1,
+};
+
+static int OutToPins_probe(struct platform_device *pdev)
+{
+	return devm_snd_soc_register_component(&pdev->dev,
+				      &soc_component_dev_OutToPins,
+				      OutToPins_dai, ARRAY_SIZE(OutToPins_dai));
+}
+
+static int OutToPins_remove(struct platform_device *pdev)
+{
+	return 0;
+}
+
+
+// #if defined(CONFIG_OF)
+static const struct of_device_id OutToPins_codec_of_match[] = {
+	{ .compatible = "OutToPins_codec", },
+	{},
+};
+MODULE_DEVICE_TABLE(of, OutToPins_codec_of_match);
+// #endif
+
+static struct platform_driver OutToPins_driver = {
+	.driver = {
+		.name = "OutToPins_codec",
+		.of_match_table = of_match_ptr(OutToPins_codec_of_match),
+	},
+	.probe = OutToPins_probe,
+	.remove = OutToPins_remove,
+};
+
+module_platform_driver(OutToPins_driver);
+
+MODULE_AUTHOR("martin.lesniak@st.com");
+MODULE_DESCRIPTION("ASoC generic output driver");
+MODULE_LICENSE("GPL");
@@ -0,0 +1,12 @@
+--- a/sound/soc/codecs/Kconfig	2024-04-11 10:10:19.544748160 +0800
+++ b/sound/soc/codecs/Kconfig	2024-04-11 10:10:07.872537410 +0800
+@@ -2162,4 +2162,9 @@ config SND_SOC_LPASS_TX_MACRO
+ 	select SND_SOC_LPASS_MACRO_COMMON
+ 	tristate "Qualcomm TX Macro in LPASS(Low Power Audio SubSystem)"
+ 
+config OUT_TO_PINS_CODEC
+	tristate "out_to_pins Speaker Amplifier"
+	default m
+	help
+	  out_to_pins Speaker Amplifier.
+ endmenu
@@ -0,0 +1,8 @@
+--- a/sound/soc/codecs/Makefile	2024-04-11 10:11:29.925865817 +0800
+++ b/sound/soc/codecs/Makefile	2024-04-11 10:11:20.233717760 +0800
+@@ -719,3 +719,5 @@ obj-$(CONFIG_SND_SOC_LPASS_TX_MACRO)	+=
+ 
+ # Mux
+ obj-$(CONFIG_SND_SOC_SIMPLE_MUX)	+= snd-soc-simple-mux.o
+
+obj-$(CONFIG_OUT_TO_PINS_CODEC)	+= out_to_pins.o
@@ -0,0 +1,307 @@
+--- a/drivers/staging/fbtft/fb_ili9341_m5.c	2024-03-27 18:41:29.759999974 +0800
+++ b/drivers/staging/fbtft/fb_ili9341_m5.c	2024-04-11 10:15:12.533376430 +0800
+@@ -0,0 +1,304 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * FB driver for the ILI9341 LCD display controller
+ *
+ * This display uses 9-bit SPI: Data/Command bit + 8 data bits
+ * For platforms that doesn't support 9-bit, the driver is capable
+ * of emulating this using 8-bit transfer.
+ * This is done by transferring eight 9-bit words in 9 bytes.
+ *
+ * Copyright (C) 2013 Christian Vogelgsang
+ * Based on adafruit22fb.c by Noralf Tronnes
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <video/mipi_display.h>
+
+#include "fbtft.h"
+
+#define DRVNAME		"fb_ili9341"
+#define WIDTH		240
+#define HEIGHT		320
+#define TXBUFLEN	(4 * PAGE_SIZE)
+#define DEFAULT_GAMMA	"1F 1A 18 0A 0F 06 45 87 32 0A 07 02 07 05 00\n" \
+			"00 25 27 05 10 09 3A 78 4D 05 18 0D 38 3A 1F"
+
+static int init_display(struct fbtft_par *par)
+{
+	par->fbtftops.reset(par);
+
+	/* startup sequence for MI0283QT-9A */
+	write_reg(par, MIPI_DCS_SOFT_RESET);
+	mdelay(5);
+	write_reg(par, MIPI_DCS_SET_DISPLAY_OFF);
+	/* --------------------------------------------------------- */
+	write_reg(par, 0xCF, 0x00, 0x83, 0x30);
+	write_reg(par, 0xED, 0x64, 0x03, 0x12, 0x81);
+	write_reg(par, 0xE8, 0x85, 0x01, 0x79);
+	write_reg(par, 0xCB, 0x39, 0X2C, 0x00, 0x34, 0x02);
+	write_reg(par, 0xF7, 0x20);
+	write_reg(par, 0xEA, 0x00, 0x00);
+	/* ------------power control-------------------------------- */
+	write_reg(par, 0xC0, 0x26);
+	write_reg(par, 0xC1, 0x11);
+	/* ------------VCOM --------- */
+	write_reg(par, 0xC5, 0x35, 0x3E);
+	write_reg(par, 0xC7, 0xBE);
+	/* ------------memory access control------------------------ */
+	write_reg(par, MIPI_DCS_SET_PIXEL_FORMAT, 0x55); /* 16bit pixel */
+	/* ------------frame rate----------------------------------- */
+	write_reg(par, 0xB1, 0x00, 0x1B);
+	/* ------------Gamma---------------------------------------- */
+	/* write_reg(par, 0xF2, 0x08); */ /* Gamma Function Disable */
+	write_reg(par, MIPI_DCS_SET_GAMMA_CURVE, 0x01);
+	/* ------------display-------------------------------------- */
+	write_reg(par, 0xB7, 0x07); /* entry mode set */
+	write_reg(par, 0xB6, 0x0A, 0x82, 0x27, 0x00);
+	write_reg(par, 0x21); /* inv color */
+	write_reg(par, MIPI_DCS_EXIT_SLEEP_MODE);
+	mdelay(100);
+	write_reg(par, MIPI_DCS_SET_DISPLAY_ON);
+	mdelay(20);
+
+	return 0;
+}
+
+static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
+{
+	write_reg(par, MIPI_DCS_SET_COLUMN_ADDRESS,
+		  (xs >> 8) & 0xFF, xs & 0xFF, (xe >> 8) & 0xFF, xe & 0xFF);
+
+	write_reg(par, MIPI_DCS_SET_PAGE_ADDRESS,
+		  (ys >> 8) & 0xFF, ys & 0xFF, (ye >> 8) & 0xFF, ye & 0xFF);
+
+	write_reg(par, MIPI_DCS_WRITE_MEMORY_START);
+}
+
+#define MEM_Y   BIT(7) /* MY row address order */
+#define MEM_X   BIT(6) /* MX column address order */
+#define MEM_V   BIT(5) /* MV row / column exchange */
+#define MEM_L   BIT(4) /* ML vertical refresh order */
+#define MEM_H   BIT(2) /* MH horizontal refresh order */
+#define MEM_BGR (3) /* RGB-BGR Order */
+static int set_var(struct fbtft_par *par)
+{
+	switch (par->info->var.rotate) {
+	case 0:
+		write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
+			  MEM_Y | MEM_X | (par->bgr << MEM_BGR));
+		break;
+	case 270:
+		write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
+			  MEM_V | MEM_L | (par->bgr << MEM_BGR));
+		break;
+	case 180:
+		write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
+						 (par->bgr << MEM_BGR));
+		break;
+	case 90:
+		write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
+			  MEM_Y | MEM_X | MEM_V | (par->bgr << MEM_BGR));
+		break;
+	}
+
+	return 0;
+}
+
+/*
+ * Gamma string format:
+ *  Positive: Par1 Par2 [...] Par15
+ *  Negative: Par1 Par2 [...] Par15
+ */
+#define CURVE(num, idx)  curves[(num) * par->gamma.num_values + (idx)]
+static int set_gamma(struct fbtft_par *par, u32 *curves)
+{
+	int i;
+
+	for (i = 0; i < par->gamma.num_curves; i++)
+		write_reg(par, 0xE0 + i,
+			  CURVE(i, 0), CURVE(i, 1), CURVE(i, 2),
+			  CURVE(i, 3), CURVE(i, 4), CURVE(i, 5),
+			  CURVE(i, 6), CURVE(i, 7), CURVE(i, 8),
+			  CURVE(i, 9), CURVE(i, 10), CURVE(i, 11),
+			  CURVE(i, 12), CURVE(i, 13), CURVE(i, 14));
+
+	return 0;
+}
+
+#undef CURVE
+
+
+
+#ifdef CONFIG_FB_BACKLIGHT
+
+
+#include<linux/i2c.h>
+// * Write to I2C device */
+static int sx1_i2c_write_byte(u8 devaddr, u8 regoffset, u8 value)
+{
+ struct i2c_adapter *adap;
+ int err;
+ struct i2c_msg msg[1];
+ unsigned char data[2];
+
+ adap = i2c_get_adapter(0);
+ if (!adap)
+  return -ENODEV;
+ msg->addr = devaddr; /* I2C address of chip */
+ msg->flags = 0;
+ msg->len = 2;
+ msg->buf = data;
+ data[0] = regoffset; /* register num */
+ data[1] = value;  /* register data */
+ err = i2c_transfer(adap, msg, 1);
+ i2c_put_adapter(adap);
+ if (err >= 0)
+  return 0;
+ return err;
+}
+
+/* Read from I2C device */
+static int sx1_i2c_read_byte(u8 devaddr, u8 regoffset, u8 *value)
+{
+ struct i2c_adapter *adap;
+ int err;
+ struct i2c_msg msg[1];
+ unsigned char data[2];
+
+ adap = i2c_get_adapter(0);
+ if (!adap)
+  return -ENODEV;
+
+ msg->addr = devaddr; /* I2C address of chip */
+ msg->flags = 0;
+ msg->len = 1;
+ msg->buf = data;
+ data[0] = regoffset; /* register num */
+ err = i2c_transfer(adap, msg, 1);
+
+ msg->addr = devaddr; /* I2C address */
+ msg->flags = I2C_M_RD;
+ msg->len = 1;
+ msg->buf = data;
+ err = i2c_transfer(adap, msg, 1);
+ *value = data[0];
+ i2c_put_adapter(adap);
+
+ if (err >= 0)
+  return 0;
+ return err;
+}
+
+#include <linux/backlight.h>
+
+static int backlight_chip_update_status(struct backlight_device *bd)
+{
+	struct fbtft_par *par = bl_get_data(bd);
+	int brightness = bd->props.brightness;
+	u8 _reg_val;
+	u8 bright_val;
+	int ret;
+
+	fbtft_par_dbg(DEBUG_BACKLIGHT, par,
+		      "%s: brightness=%d, power=%d, fb_blank=%d\n", __func__,
+		      bd->props.brightness, bd->props.power,
+		      bd->props.fb_blank);
+
+	if (bd->props.power != FB_BLANK_UNBLANK)
+		brightness = 0;
+
+	if (bd->props.fb_blank != FB_BLANK_UNBLANK)
+		brightness = 0;
+
+	ret = sx1_i2c_read_byte(0x34, 0x90, &_reg_val);
+	if (0 == ret)
+	{
+		if (0 == brightness)
+		{
+			_reg_val = _reg_val & 0x7f;
+			sx1_i2c_write_byte(0x34, 0x90, _reg_val);
+		}
+		else
+		{
+			if(_reg_val & 0x80)
+			{
+				bright_val = brightness / 3;
+				if(bright_val > 28) bright_val = 28;
+				sx1_i2c_write_byte(0x34, 0x99, bright_val);
+			}
+			else
+			{
+				bright_val = brightness / 3;
+				if(bright_val > 28) bright_val = 28;
+				sx1_i2c_write_byte(0x34, 0x99, bright_val);
+
+				_reg_val = _reg_val | 0x80;
+				sx1_i2c_write_byte(0x34, 0x90, _reg_val);
+			}
+		}
+	}
+	return 0;
+}
+
+static const struct backlight_ops bl_ops = {
+	.update_status = backlight_chip_update_status,
+};
+
+static void register_chip_backlight(struct fbtft_par *par)
+{
+	struct backlight_device *bd;
+	struct backlight_properties bl_props = { 0, };
+
+	bl_props.type = BACKLIGHT_PLATFORM;
+	bl_props.power = FB_BLANK_POWERDOWN;
+	bl_props.max_brightness = 100;
+	bl_props.brightness = 100;
+
+	bd = backlight_device_register(dev_driver_string(par->info->device),
+				       par->info->device, par, &bl_ops,
+				       &bl_props);
+	if (IS_ERR(bd)) {
+		dev_err(par->info->device,
+			"cannot register backlight device (%ld)\n",
+			PTR_ERR(bd));
+		return;
+	}
+	par->info->bl_dev = bd;
+
+	if (!par->fbtftops.unregister_backlight)
+		par->fbtftops.unregister_backlight = fbtft_unregister_backlight;
+}
+#else
+#define register_chip_backlight NULL
+#endif
+
+static struct fbtft_display display = {
+	.regwidth = 8,
+	.width = WIDTH,
+	.height = HEIGHT,
+	.txbuflen = TXBUFLEN,
+	.gamma_num = 2,
+	.gamma_len = 15,
+	.gamma = DEFAULT_GAMMA,
+	.fbtftops = {
+		.init_display = init_display,
+		.set_addr_win = set_addr_win,
+		.set_var = set_var,
+		.set_gamma = set_gamma,
+		.register_backlight = register_chip_backlight,
+	},
+};
+
+FBTFT_REGISTER_DRIVER(DRVNAME, "ilitek,ili9341_m5", &display);
+
+MODULE_ALIAS("spi:" DRVNAME);
+MODULE_ALIAS("platform:" DRVNAME);
+MODULE_ALIAS("spi:ili9341");
+MODULE_ALIAS("platform:ili9341");
+
+MODULE_DESCRIPTION("FB driver for the ILI9341 LCD display controller");
+MODULE_AUTHOR("Christian Vogelgsang");
+MODULE_LICENSE("GPL");
@@ -0,0 +1,7 @@
+--- a/drivers/staging/fbtft/Makefile	2023-06-16 18:05:22.000000000 +0800
+++ b/drivers/staging/fbtft/Makefile	2024-04-11 10:17:25.671555921 +0800
+@@ -36,3 +36,4 @@ obj-$(CONFIG_FB_TFT_TLS8204)     += fb_t
+ obj-$(CONFIG_FB_TFT_UC1611)      += fb_uc1611.o
+ obj-$(CONFIG_FB_TFT_UC1701)      += fb_uc1701.o
+ obj-$(CONFIG_FB_TFT_UPD161704)   += fb_upd161704.o
+obj-$(CONFIG_FB_TFT_ILI9341_M5)   += fb_ili9341_m5.o
@@ -0,0 +1,12 @@
+--- a/drivers/staging/fbtft/Kconfig	2023-06-16 18:05:22.000000000 +0800
+++ b/drivers/staging/fbtft/Kconfig	2024-04-11 10:17:15.907394473 +0800
+@@ -200,3 +200,9 @@ config FB_TFT_UPD161704
+ 	depends on FB_TFT
+ 	help
+ 	  Generic Framebuffer support for uPD161704
+
+config FB_TFT_ILI9341_M5
+	tristate "FB driver for the ILI9341 LCD Controller for m5"
+	depends on FB_TFT
+	help
+	  Generic Framebuffer support for ILI9341_M5
@@ -0,0 +1,20 @@
+--- a/drivers/staging/fbtft/fbtft-core.c	2024-04-15 11:41:30.787548227 +0800
+++ b/drivers/staging/fbtft/fbtft-core.c	2024-04-15 11:38:53.528583466 +0800
+@@ -318,7 +318,7 @@
+ 	spin_unlock(&par->dirty_lock);
+ 
+ 	/* Schedule deferred_io to update display (no-op if already on queue)*/
+-	schedule_delayed_work(&info->deferred_work, fbdefio->delay);
+	schedule_delayed_work(&info->deferred_work, 0);
+ }
+ 
+ static void fbtft_deferred_io(struct fb_info *info, struct list_head *pagereflist)
+@@ -573,6 +573,8 @@
+ 	/* override driver values? */
+ 	if (pdata->fps)
+ 		fps = pdata->fps;
+   if (pdata->display.bpp)
+       bpp = pdata->display.bpp;
+ 	if (pdata->txbuflen)
+ 		txbuflen = pdata->txbuflen;
+ 	if (pdata->display.init_sequence)
@@ -0,0 +1,149 @@
+--- a/configs/core135_defconfig	2024-04-15 12:16:26.409859959 +0800
+++ b/configs/core135_defconfig	2024-04-15 12:16:19.373730487 +0800
+@@ -0,0 +1,146 @@
+CONFIG_ARM=y
+CONFIG_ARCH_STM32MP=y
+CONFIG_TFABOOT=y
+CONFIG_SYS_MALLOC_F_LEN=0x180000
+CONFIG_ENV_OFFSET=0x900000
+CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_DEFAULT_DEVICE_TREE="stm32mp135f-dk"
+CONFIG_SYS_PROMPT="STM32MP> "
+CONFIG_STM32MP13X=y
+CONFIG_DDR_CACHEABLE_SIZE=0x8000000
+CONFIG_CMD_STM32KEY=y
+CONFIG_TARGET_ST_STM32MP13X=y
+CONFIG_ENV_OFFSET_REDUND=0x940000
+CONFIG_CMD_STM32PROG=y
+# CONFIG_ARMV7_NONSEC is not set
+CONFIG_SYS_LOAD_ADDR=0xc2000000
+CONFIG_SYS_MEMTEST_START=0xc0000000
+CONFIG_SYS_MEMTEST_END=0xc4000000
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0400000
+CONFIG_FIT=y
+CONFIG_BOOTDELAY=1
+CONFIG_BOOTCOMMAND="show_logo;run bootcmd_stm32mp"
+CONFIG_FDT_SIMPLEFB=y
+CONFIG_USB_HUB_DEBOUNCE_TIMEOUT=2000
+CONFIG_SYS_BOOTM_LEN=0x2000000
+CONFIG_CMD_ADTIMG=y
+CONFIG_CMD_ERASEENV=y
+CONFIG_CMD_NVEDIT_EFI=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_UNZIP=y
+CONFIG_CMD_ADC=y
+CONFIG_CMD_CLK=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_FUSE=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_LSBLK=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_SYS_DISABLE_AUTOLOAD=y
+CONFIG_CMD_BMP=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EFIDEBUG=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_RNG=y
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_LOG=y
+CONFIG_CMD_UBI=y
+CONFIG_OF_LIVE=y
+CONFIG_ENV_IS_NOWHERE=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_ENV_IS_IN_UBI=y
+CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
+CONFIG_ENV_UBI_PART="UBI"
+CONFIG_ENV_UBI_VOLUME="uboot_config"
+CONFIG_ENV_UBI_VOLUME_REDUND="uboot_config_r"
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SYS_MMC_ENV_DEV=-1
+CONFIG_ENV_MMC_USE_DT=y
+CONFIG_TFTP_TSIZE=y
+CONFIG_STM32_ADC=y
+CONFIG_CLK_SCMI=y
+CONFIG_SET_DFU_ALT_INFO=y
+CONFIG_GPIO_HOG=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_STM32F7=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_STM32_FMC2_EBI=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_STM32_SDMMC2=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_NAND_STM32_FMC2=y
+CONFIG_SYS_NAND_ONFI_DETECTION=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_SPI_FLASH_MTD=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DWC_ETH_QOS=y
+CONFIG_PHY=y
+CONFIG_PHY_STM32_USBPHYC=y
+CONFIG_PINCONF=y
+CONFIG_PINCTRL_MCP23017=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_REGULATOR_SCMI=y
+CONFIG_RESET_SCMI=y
+CONFIG_DM_RNG=y
+CONFIG_DM_RTC=y
+CONFIG_RTC_STM32=y
+CONFIG_SERIAL_RX_BUFFER=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_STM32_QSPI=y
+CONFIG_STM32_SPI=y
+CONFIG_SYSRESET_PSCI=y
+CONFIG_TEE=y
+CONFIG_OPTEE=y
+# CONFIG_OPTEE_TA_AVB is not set
+CONFIG_USB=y
+CONFIG_DM_USB_GADGET=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1
+CONFIG_TYPEC=y
+CONFIG_TYPEC_UCSI=y
+CONFIG_UCSI_STM32G0=y
+CONFIG_USB_ONBOARD_HUB=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="STMicroelectronics"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0483
+CONFIG_USB_GADGET_PRODUCT_NUM=0x5720
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_DM_VIDEO=y
+CONFIG_BACKLIGHT_GPIO=y
+CONFIG_VIDEO_STM32=y
+CONFIG_VIDEO_STM32_MAX_XRES=480
+CONFIG_VIDEO_STM32_MAX_YRES=272
+CONFIG_BMP_16BPP=y
+CONFIG_BMP_24BPP=y
+CONFIG_BMP_32BPP=y
+CONFIG_WDT=y
+CONFIG_WDT_ARM_SMC=y
+CONFIG_WDT_STM32MP=y
+CONFIG_ERRNO_STR=y
+# CONFIG_LMB_USE_MAX_REGIONS is not set
+CONFIG_LMB_MEMORY_REGIONS=2
+CONFIG_LMB_RESERVED_REGIONS=16
@@ -0,0 +1,8 @@
+--- a/cmd/Makefile	2023-06-16 18:05:22.000000000 +0800
+++ b/cmd/Makefile	2024-04-15 12:16:57.490432030 +0800
+@@ -260,3 +260,5 @@ $(obj)/license_data_size.h: $(srctree)/L
+ 	$(call filechk,data_size)
+ 
+ CFLAGS_ethsw.o := -Wno-enum-conversion
+
+obj-y += cmd_show_logo.o
--- a/Show More
+++ b/Show More