Commit Graph

10520 Commits

Author SHA1 Message Date
Tomas Vanek
ad87fbd1cf tcl/interface: support for Raspberry Pi 5
Make sure raspberrypi-native.cfg cannot be used on RPi5.

Add raspberrypi5-gpiod.cfg which uses linuxgpiod adapter driver.
Issue a warning if PCIe is in power save mode.

While on it, re-format warnings issued from Tcl to look similar
to LOG_WARNING() output.

Change-Id: If19b0350bd5fff83d9a0c65999e33b161fb6957a
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/8333
Tested-by: jenkins
Reviewed-by: Jonathan Bell <jonathan@raspberrypi.com>
2024-06-25 07:23:18 +00:00
Antonio Borneo
67be8188bb Remove other '_s' suffix from structs
Most of the work is already done by [1].
Remove few more '_s' suffix and also fix some comment referring to
the old name of the struct.

Link: https://review.openocd.org/c/openocd/+/8340
Change-Id: Ifddc401c3b05e62ece3aa7926af1e78f0c4a671e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8341
Reviewed-by: zapb <dev@zapb.de>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2024-06-23 09:33:47 +00:00
Marc Schink
6b984a54c9 Remove '_s' suffix from structs
Change-Id: I956acce316e60252b317daa41274403d87f704b8
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8340
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-06-23 09:33:33 +00:00
Marc Schink
92e8823ebd server/gdb: Use LOG_TARGET_xxx() to show target name
The output "gdb port disabled" is confusing without reference to the
target. Use LOG_TARGET_INFO() to output the target name.

While at it, use LOG_TARGET_xxx() for all log statements where the
target name is already used.

Change-Id: I70b134145837db623e008a4a6c0be0008d9a0d87
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8313
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2024-06-23 09:33:13 +00:00
Timur Golubovich
23ba602ca5 remote_bitbang: fix assertion failure for the cases when connection is abruptly terminated
Changes affect the function remote_bitbang_fill_buf.
When read_socket returns 0, socket reached EOF and there is
no data to read. But if request was blocking, the caller
expected some data. Such situations should be treated as ERROR.

Change-Id: I02ed484e61fb776c1625f6e36ab14c85891939b2
Signed-off-by: Timur Golubovich <timur.golubovich@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8325
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-06-23 09:32:08 +00:00
Antonio Borneo
dde096e03f itm: fix default initialization
Commit f9509c92db ("itm: rework itm commands before 'init'")
ignores the default enable of ITM channel 0, that is applied when
no 'itm port[s]' is issued.

Call armv7m_trace_itm_config() unconditionally to handle it.

Change-Id: I3e85d0b063ed38c1552f6af9ea9eea2e76aa9025
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reported-by: Paul Fertser <fercerpav@gmail.com>
Fixes: f9509c92db ("itm: rework itm commands before 'init'")
Reviewed-on: https://review.openocd.org/c/openocd/+/7900
Reviewed-by: <post@frankplowman.com>
Tested-by: jenkins
2024-06-23 09:30:43 +00:00
Antonio Borneo
198fecf5e4 target: aarch64: access reg SPSR_EL1 only in EL1, EL2 and EL3
The register SPSR_EL1 is accessible and it's content is relevant
only when the target is in EL1 or EL2 or EL3.
Plus, the register is 64 bits wide.

Without this patch, an error:
	Error: Opcode 0xd5384000, DSCR.ERR=1, DSCR.EL=1
is triggered by GDB register window or through GDB command
        x/p $SPSR_EL1
or through OpenOCD command
        reg SPSR_EL1

Detect the EL and return error if the register cannot be accessed.
Handle the register as 64 bits.

Change-Id: Ia0f984d52920cc32b8ee31157d62c13dea616a3a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8276
Tested-by: jenkins
2024-06-23 09:29:43 +00:00
Antonio Borneo
b5dfef7577 target: aarch64: access reg ESR_EL1 only in EL1, EL2 and EL3
The register ESR_EL1 is accessible and it's content is relevant
only when the target is in EL1 or EL2 or EL3.
Plus, the register is 64 bits wide.

Without this patch, an error:
	Error: Opcode 0xd5385200, DSCR.ERR=1, DSCR.EL=1
is triggered by GDB register window or through GDB command
        x/p $ESR_EL1
or through OpenOCD command
        reg ESR_EL1

Detect the EL and return error if the register cannot be accessed.
Handle the register as 64 bits.

Change-Id: Icd65470c279e5cfd03091db6435cdaa1c447644c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8275
Tested-by: jenkins
2024-06-23 09:29:37 +00:00
Antonio Borneo
f39f136e01 target: aarch64: access reg ELR_EL1 only in EL1, EL2 and EL3
The register ELR_EL1 is accessible and it's content is relevant
only when the target is in EL1 or EL2 or EL3.

Without this patch, an error:
	Error: Opcode 0xd5384020, DSCR.ERR=1, DSCR.EL=1
is triggered by GDB register window or through GDB command
	x/p $ELR_EL1
or through OpenOCD command
	reg ELR_EL1

Detect the EL and return error if the register cannot be accessed.

Change-Id: I402dda4cd9dae502b05572fc6c1a8f0edf349bb1
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8274
Tested-by: jenkins
2024-06-23 09:29:29 +00:00
Antonio Borneo
2a63fabd09 target: aarch64: access reg SPSR_EL2 only in EL2 and EL3
The register SPSR_EL2 is accessible and it's content is relevant
only when the target is in EL2 or EL3.
Virtualization SW in EL1 can also access it, but this either
triggers a trap to EL2 or returns SPSR_EL1. Debugger should not
mix the real SPSR_EL2 with the virtual register.
Plus, the register is 64 bits wide.

Without this patch, an error:
	Error: Opcode 0xd53c4000, DSCR.ERR=1, DSCR.EL=1
is triggered by GDB register window or through GDB command
        x/p $SPSR_EL2
or through OpenOCD command
        reg SPSR_EL2

Detect the EL and return error if the register cannot be accessed.
Handle the register as 64 bits.

Change-Id: If3792296b36282c08d597dd46cfe044d6b8288ea
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8273
Tested-by: jenkins
2024-06-23 09:29:22 +00:00
Antonio Borneo
766a84b798 target: aarch64: access reg ESR_EL2 only in EL2 and EL3
The register ESR_EL2 is accessible and it's content is relevant
only when the target is in EL2 or EL3.
Virtualization SW in EL1 can also access it, but this either
triggers a trap to EL2 or returns ESR_EL1. Debugger should not mix
the real ESR_EL2 with the virtual register.
Plus, the register is 64 bits wide.

Without this patch, an error:
	Error: Opcode 0xd53c5200, DSCR.ERR=1, DSCR.EL=1
is triggered by GDB register window or through GDB command
        x/p $ESR_EL2
or through OpenOCD command
        reg ESR_EL2

Detect the EL and return error if the register cannot be accessed.
Handle the register as 64 bits.

Change-Id: Icb32b44886d50907f29b068ce61e4be8bed10208
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8272
Tested-by: jenkins
2024-06-23 09:29:16 +00:00
Antonio Borneo
190176a6bc target: aarch64: access reg ELR_EL2 only in EL2 and EL3
The register ELR_EL2 is accessible and it's content is relevant
only when the target is in EL2 or EL3.
Virtualization SW in EL1 can also access it, but this either
triggers a trap to EL2 or returns ELR_EL1. Debugger should not mix
the real ELR_EL2 with the virtual register.

Without this patch, an error:
	Error: Opcode 0xd53c4020, DSCR.ERR=1, DSCR.EL=1
is triggered by GDB register window or through GDB command
	x/p $ELR_EL2
or through OpenOCD command
	reg ELR_EL2

Detect the EL and return error if the register cannot be accessed.

Change-Id: Idf02b42a7339df83260c1e44ceabbb05fbf392b9
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8271
Tested-by: jenkins
2024-06-23 09:29:04 +00:00
Antonio Borneo
405e78771b target: aarch64: access reg SPSR_EL3 only in EL3
The register SPSR_EL3 is accessible and it's content is relevant
only when the target is in EL3.
Plus, the register is 64 bits wide.

Without this patch, an error:
	Error: Opcode 0xd53e4000, DSCR.ERR=1, DSCR.EL=1
is triggered by GDB register window or through GDB command
        x/p $SPSR_EL3
or through OpenOCD command
        reg SPSR_EL3

Detect the EL and return error if the register cannot be accessed.
Handle the register as 64 bits.

Change-Id: I00849d99feeb96589c426fcafda98127dbd19a67
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8270
Tested-by: jenkins
2024-06-23 09:28:48 +00:00
Antonio Borneo
2306809160 target: aarch64: access reg ESR_EL3 only in EL3
The register ESR_EL3 is accessible and it's content is relevant
only when the target is in EL3.
Plus, the register is 64 bits wide.

Without this patch, an error:
	Error: Opcode 0xd53e5200, DSCR.ERR=1, DSCR.EL=1
is triggered by GDB register window or through GDB command
        x/p $ESR_EL3
or through OpenOCD command
        reg ESR_EL3

Detect the EL and return error if the register cannot be accessed.
Handle the register as 64 bits.
Drop the FIXME comment on Aarch32 case, as the register exists in
Aarch64 only.

Change-Id: Ie8c69dc7b50ae81a52506cf151c8e64e15752d0d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8269
Tested-by: jenkins
2024-06-23 09:28:40 +00:00
Antonio Borneo
8c75e47603 target: aarch64: access reg ELR_EL3 only in EL3
The register ELR_EL3 is accessible and it's content is relevant
only when the target is in EL3.

Without this patch, an error:
	Error: Opcode 0xd53e4020, DSCR.ERR=1, DSCR.EL=1
is triggered by GDB register window or through GDB command
	x/p $ELR_EL3
or through OpenOCD command
	reg ELR_EL3

Detect the EL and return error if the register cannot be accessed.

Change-Id: I545abb196e5c34e462c7e5d5d3ec952e588642da
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8268
Tested-by: jenkins
2024-06-23 09:28:32 +00:00
Antonio Borneo
bcd6a10223 target: armv8_dpm: silence error on register R/W
The command 'gdb_report_register_access_error' is used to silence
errors while reading registers and not reporting them to GDB.
Nevertheless, the error is printed by a LOG_ERROR() in armv8_dpm.

Change the message to LOG_DEBUG().
It will still cause the error to be propagated and eventually
printed by the caller (e.g. by the command 'reg').

Change-Id: Ic0db74fa28235d686ddd21a5960c52ae003e0931
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8267
Tested-by: jenkins
2024-06-23 09:28:21 +00:00
Antonio Borneo
91043cecee target: aarch64: align armv8_read_reg() and armv8_read_reg32()
These functions are today always called with non-NULL parameter
regval, so the actual check is not needed.
Anyway, for any future code change, check the parameter at the
entry of the functions and return error if it is not valid.
Simplify the check to assign the result value and align the code
of the two functions.

Change-Id: Ie4d98063006d70d9e2bcfc00bc930133caf33515
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8266
Tested-by: jenkins
2024-06-23 09:28:08 +00:00
Marc Schink
c5358c84ad target: Do not use LOG_USER() for error messages
Use LOG_TARGET_ERROR() to print the error messages and additionally add
a reference to the related target.

Change-Id: I06722f3911ef4034fdd05dc9b0e2571b01b657a4
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8314
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2024-06-17 14:05:25 +00:00
Tomas Vanek
4892e32294 target/cortex_m: allow poll quickly get out of TARGET_RESET state
cortex_m_poll_one() detects reset testing S_RESET_ST sticky bit.
If the signal comes unexpectedly, poll must return TARGET_RESET state.

On the contrary in case of polling inside of an OpenOCD reset command,
TARGET_RESET has been has already been set and we need to get out of
it as quickly as possible.

The original code needs 2 polls: the first clears S_RESET_ST
and keeps TARGET_RESET state, the current TARGET_RUNNING or TARGET_HALTED
is reflected as late as the second poll is done.

Change the logic to keep in TARGET_RESET only when necessary.

See also [1]

Link: [1] 8284: tcl/target: ti_cc3220sf: Use halt for CC3320SF targets | https://review.openocd.org/c/openocd/+/8284
Fixes: https://sourceforge.net/p/openocd/tickets/360/
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Change-Id: I759461e5f89ca48a6e16e4b4101570260421dba1
Reviewed-on: https://review.openocd.org/c/openocd/+/8285
Tested-by: jenkins
Reviewed-by: Dhruva Gole <d-gole@ti.com>
2024-06-17 14:04:49 +00:00
Daniel Anselmi
bf4be566a7 pld: small documentation fixes.
Change-Id: I969f51c38fc0c34c6bdba98b0e618d7f28ea4052
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/8084
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2024-06-15 14:25:17 +00:00
Daniel Anselmi
9bc7a381b2 pld/intel: remove idcodes from intel.c
Remove list of id codes for all families.
Maintain a list with id, bscan-length and check position
in the tcl config files for each family.

The Intel FPGA Driver option 'family' is not otional anymore.

Change-Id: I9a40a041069e84f6b4728f2cd715756a36759c89
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/8083
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2024-06-15 14:25:05 +00:00
Daniel Anselmi
7e4c9609ca pld/intel: remove duplicated code
Change-Id: I043d16c77ce97d3e888774747ed6bfc4c7e63c04
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/8082
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-06-15 14:24:32 +00:00
George Voicu
b1600bb342 tcl/board: Support for Digilent Nexys 2 board
Support Digilent Nexys 2 board JTAG chain

Signed-off-by: George Voicu <razvanvg@hotmail.com>
Change-Id: I350f80b49303c4b0402d93ebc120a591ef727551
Reviewed-on: https://review.openocd.org/c/openocd/+/7336
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-06-15 14:14:11 +00:00
George Voicu
a420f00d10 tcl/fpga: Support for Xilinx Spartan3 series devices
Tap definition for Xilinx Spartan 3/3E/3A/3AN/3A-DSP devices.

Signed-off-by: George Voicu <razvanvg@hotmail.com>
Change-Id: Ieda2b61fc270840f9192976697fcac259c45e3b8
Reviewed-on: https://review.openocd.org/c/openocd/+/7335
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2024-06-15 14:13:58 +00:00
George Voicu
ed30c9a572 tcl/fpga/xilinx-dna: Support for reading Spartan3 DNA code
Add Xilinx Spartan3 ISC_DNA instruction

Signed-off-by: George Voicu <razvanvg@hotmail.com>
Change-Id: Iaddb079c9fdd1b91c65def36878fe81783098696
Reviewed-on: https://review.openocd.org/c/openocd/+/7331
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-06-15 14:13:28 +00:00