Commit b9526f1401 ("semihosting: permit redirection of
semihosting I/O to TCP") introduces a new comparison with NULL.
Remove it.
Change-Id: Ice4333c50d16f7592f0ff86b1640217fa42e34f6
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: b9526f1401 ("semihosting: permit redirection of semihosting I/O to TCP")
Reviewed-on: https://review.openocd.org/c/openocd/+/7031
Tested-by: jenkins
We already have a helper to release the gpio.
Extend it to also release its corresponding gpio chip.
As side effect, remove comparison with NULL.
Change-Id: I47cd446edfaead662d63c3330f25a791b747e882
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7033
Tested-by: jenkins
Reviewed-by: Steve Marple <stevemarple@googlemail.com>
Commit 6c0151623c ("aarch64: add support for "reset halt"")
introduces the register setting to halt at reset vector, but:
- does not consider the case 'srst_pulls_trst' that makes useless
setting the registers as they will be erased by the pulled trst;
- does not clean sticky errors in case of 'srst_gates_jtag'.
Avoid any register initialization on 'srst_pulls_trst' and move
the cleaning of sticky errors in the common block.
Change-Id: I6f839f06f7b091e234ede31ec18096e51f017bcd
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: 6c0151623c ("aarch64: add support for "reset halt"")
Reviewed-on: https://review.openocd.org/c/openocd/+/7034
Tested-by: jenkins
Reviewed-by: Christian Hoff <christian.hoff@advantest.com>
In order to facilitate debugging multiple cores, specify the coreid and
the hwthread rtos in the imx8m target configuration.
Change-Id: Ibd871517a160ceca15002fb10e27cb793f14d086
Signed-off-by: Alvin Šipraga <alsi@bang-olufsen.dk>
Reviewed-on: https://review.openocd.org/c/openocd/+/7019
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Custom user syscalls can be handled with target events in the TCL scripts.
This patch gives another opportunity to handle custom syscalls in the c files.
Besides that some utility functions are also exported for the custom handlers.
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: Ice13d527540a0de0b2a8abda912ae3dcff3834b7
Reviewed-on: https://review.openocd.org/c/openocd/+/6889
Tested-by: jenkins
Reviewed-by: Ian Thompson <ianst@cadence.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
ESP32-S3 is a dual core Xtensa SoC
Not full featured yet. Some of the missing functionality:
-Semihosting
-Flash breakpoints
-Flash loader
-Apptrace
-FreeRTOS
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I44e17088030c96a9be9809f6579a4f16dbfc5794
Reviewed-on: https://review.openocd.org/c/openocd/+/6990
Tested-by: jenkins
Reviewed-by: Ian Thompson <ianst@cadence.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
ESP32 is a dual core Xtensa SoC
Not full featured yet. Some of the missing functionality:
-Semihosting
-Flash breakpoints
-Flash loader
-Apptrace
-FreeRTOS
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I76fb184aa38ab9f4e30290c038b5ff8850060750
Reviewed-on: https://review.openocd.org/c/openocd/+/6989
Tested-by: jenkins
Reviewed-by: Ian Thompson <ianst@cadence.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Add Ampere Altra ("Quicksilver") and Ampere Altra Max ("Mystique")
target/board configuration files.
The target configuration file supports silicon and emulation.
The board configuration files support 1 and 2 socket platforms.
Tested on Ampere emulation and silicon
Change-Id: I036c798a50624e30ab51ccd2895b6f60c40be096
Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5591
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Arm "CoreSight System-on-Chip SoC-600" specification describes a
bridge "Access Port v1 adapter" aimed to "connect a legacy Access
Port (AP) ... into an CoreSight Architecture v3 system".
A ROM table can be located in the "legacy" part of the system,
on the legacy AP behind the APv1 adapter.
For the purpose of scanning the ROM tables, consider an ADIv6
SoC-600 APv1 adapter as an ADIv5 AP.
Change-Id: I97d42fb77013c1251fb68d0caa4274086bf38a70
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6827
Tested-by: jenkins
Configuration file can specify, as target's debug AP, an AP that
contains a ROM table that points, in turn, to other APs.
Current code in cortex_a and aarch64 is not able to handle a
return from dap_lookup_cs_component() that points to another AP.
While it could be interesting to specify 'root' as target's debug
AP, drop any found value if it's not in the starting AP.
Change-Id: Id206e4fa7a29e9402c8e2393026817b410bbb8bd
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6826
Tested-by: jenkins
ADIv6 adds AP that only contain a ROM table in the AP itself, that
can point to other AP containing either another AP level ROM table
or a MEM-AP to be parsed as usual.
Add support for parsing AP level ROM tables.
Change-Id: Ic25863b16463b8a6adc3b15e26db7fdca858d6df
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6467
Tested-by: jenkins
ADIv6 adds AP that only contain a ROM table in the AP itself, that
can point to other AP containing either another AP level ROM table
or a MEM-AP to be parsed as usual.
To handle recursive AP access, reorganize the code to:
- pass the depth==0 from the command 'dap info';
- print the AP number as first line, adding proper indentation on
depth>0;
- align the following print with proper indentation.
Change-Id: I5b811810c807fc51b307bd60f67817d9de2aa095
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6466
Tested-by: jenkins
On ADIv6 the system root ROM table is found by reading the DAP DP
registers BASEPTR0 and BASEPTR1.
Add option 'root' to the commands 'dap info' to let it retrieve
the system root ROM table's AP from DAP DP, then use such AP for
following dump.
Change-Id: I1789457a005faa3870c5d14f763378d2f6a5f095
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6462
Tested-by: jenkins
ADIv5 DAP can only have 256 AP, while ADIv6 can provide till
2**40 (1,099,511,627,776) AP per DAP.
Reuse the field ap_num in struct adiv5_ap, currently used on ADIv5
to hold the ADIv5 AP number (apsel), to contain the ADIv6 AP base
address.
Convert struct adiv5_ap->ap_num to 64 bit and initialize it to
DP_APSEL_INVALID for unused AP.
Restrict dap_find_get_ap() to ADIv5 only. To be enhanced.
On ADIv6, let dap_get_ap() return an already allocated AP, or
allocate and return an unused AP.
Add function is_ap_num_valid() and use it.
Change-Id: Ib2fe8c7ec0d08393cd91c29fdac5d632dfc1e438
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6461
Reviewed-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Tested-by: jenkins
During enter in SWD read DP_DPIDR without selecting the register
bank through DP_SELECT_DPBANK.
Handle the different format of DP_SELECT register.
Change-Id: Iea1b8eb6ec94177e16a430d5885595a38e833eeb
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6697
Tested-by: jenkins
ADIv5 reports:
Accessing AP registers or debug resources in connected
device through an AP can be subjected to other variable
response delays in the system. A debugger that can adapt
to these delays and avoid wasting WAIT scans operates more
efficiently and provides higher maximum data throughput.
The existing code in OpenOCD uses extra tck only for accessing
resources through an AP.
Extend the use of extra tck also for accessing an AP register.
Split from change https://review.openocd.org/6077/
Change-Id: I2082362e098d09f4ba0668e01f5196afc965c8f3
Signed-off-by: Kevin Burke <kevinb@os.amperecomputing.com>
Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6460
Tested-by: jenkins
By accessing invalid AP in JTAG mode, it's possible to trigger the
error:
JTAG-DP STICKY ERROR
After that the sticky error is never cleared and the whole DAP
gets not anymore accessible.
Clean-up the sticky error once detected.
Change-Id: I8b07263b30f9e46645f0c29084b8f1626e241f45
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6430
Tested-by: jenkins
ADIv5 MEM-AP registers are a subset of ADIv6 MEM-AP registers and
are located at different offset.
To prepare for introducing ADIv6, add 'struct adiv5_dap *' as
argument to ADIv5 registers macro.
Check the ADI version and use the proper address.
Both adapter drivers rshim and stlink are ADIv5 only, so let them
use the ADIv5 macros only.
Split from change https://review.openocd.org/6077/
Change-Id: Ib861ddcdab74637b2082cc9f2612dea0007d77b1
Signed-off-by: Kevin Burke <kevinb@os.amperecomputing.com>
Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6457
Tested-by: jenkins
