rename jtag_nsrst_delay as adapter_nsrst_delay

Globally rename "jtag_nsrst_delay" as "adapter_nsrst_delay", and move it
out of the "jtag" command group ...  it needs to be used with non-JTAG
transports

Includes a migration aid (in jtag/startup.tcl) so that old user scripts
won't break.  That aid should Sunset in about a year.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This commit is contained in:
David Brownell
2010-03-15 08:41:30 -07:00
parent 96f9790279
commit b559b273b5
56 changed files with 72 additions and 70 deletions

1
NEWS
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@@ -10,6 +10,7 @@ JTAG Layer:
convert your scripts to the new names, since those procedures
will not be around forever.
jtag_khz ... is now adapter_khz
jtag_nsrst_delay ... is now adapter_nsrst_delay
Boundary Scan:

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@@ -2603,7 +2603,7 @@ stops issuing the reset. For example, there may be chip or board
requirements that all reset pulses last for at least a
certain amount of time; and reset buttons commonly have
hardware debouncing.
Use the @command{jtag_nsrst_delay} and @command{jtag_ntrst_delay}
Use the @command{adapter_nsrst_delay} and @command{jtag_ntrst_delay}
commands to say when extra delays are needed.
@item @emph{Drive type} ... Reset lines often have a pullup
@@ -2649,7 +2649,7 @@ after asserting nSRST (active-low system reset) before
allowing it to be deasserted.
@end deffn
@deffn {Command} jtag_nsrst_delay milliseconds
@deffn {Command} adapter_nsrst_delay milliseconds
How long (in milliseconds) OpenOCD should wait after deasserting
nSRST (active-low system reset) before starting new JTAG operations.
When a board has a reset button connected to SRST line it will

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@@ -93,7 +93,7 @@ static bool jtag_verify_capture_ir = true;
static int jtag_verify = 1;
/* how long the OpenOCD should wait before attempting JTAG communication after reset lines deasserted (in ms) */
static int jtag_nsrst_delay = 0; /* default to no nSRST delay */
static int adapter_nsrst_delay = 0; /* default to no nSRST delay */
static int jtag_ntrst_delay = 0; /* default to no nTRST delay */
static int jtag_nsrst_assert_width = 0; /* width of assertion */
static int jtag_ntrst_assert_width = 0; /* width of assertion */
@@ -704,8 +704,8 @@ void jtag_add_reset(int req_tlr_or_trst, int req_srst)
}
else {
LOG_DEBUG("SRST line released");
if (jtag_nsrst_delay)
jtag_add_sleep(jtag_nsrst_delay * 1000);
if (adapter_nsrst_delay)
jtag_add_sleep(adapter_nsrst_delay * 1000);
}
}
@@ -1696,11 +1696,11 @@ int jtag_get_srst(void)
void jtag_set_nsrst_delay(unsigned delay)
{
jtag_nsrst_delay = delay;
adapter_nsrst_delay = delay;
}
unsigned jtag_get_nsrst_delay(void)
{
return jtag_nsrst_delay;
return adapter_nsrst_delay;
}
void jtag_set_ntrst_delay(unsigned delay)
{

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@@ -83,4 +83,5 @@ proc srst_asserted {} {
# FIXME phase these aids out after about April 2011
#
proc jtag_khz args { eval adapter_khz $args }
proc jtag_nsrst_delay args { eval adapter_nsrst_delay $args }
# END MIGRATION AIDS

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@@ -1291,7 +1291,7 @@ next:
return ERROR_OK;
}
COMMAND_HANDLER(handle_jtag_nsrst_delay_command)
COMMAND_HANDLER(handle_adapter_nsrst_delay_command)
{
if (CMD_ARGC > 1)
return ERROR_COMMAND_SYNTAX_ERROR;
@@ -1302,7 +1302,7 @@ COMMAND_HANDLER(handle_jtag_nsrst_delay_command)
jtag_set_nsrst_delay(delay);
}
command_print(CMD_CTX, "jtag_nsrst_delay: %u", jtag_get_nsrst_delay());
command_print(CMD_CTX, "adapter_nsrst_delay: %u", jtag_get_nsrst_delay());
return ERROR_OK;
}
@@ -1618,6 +1618,13 @@ static const struct command_registration interface_command_handlers[] = {
"With or without argument, display current setting.",
.usage = "[khz]",
},
{
.name = "adapter_nsrst_delay",
.handler = handle_adapter_nsrst_delay_command,
.mode = COMMAND_ANY,
.help = "delay after deasserting srst in ms",
.usage = "[milliseconds]",
},
{
.name = "interface",
.handler = handle_interface_command,
@@ -1666,13 +1673,6 @@ static const struct command_registration jtag_command_handlers[] = {
"[trst_push_pull|trst_open_drain] "
"[srst_push_pull|srst_open_drain]",
},
{
.name = "jtag_nsrst_delay",
.handler = handle_jtag_nsrst_delay_command,
.mode = COMMAND_ANY,
.help = "delay after deasserting srst in ms",
.usage = "[milliseconds]",
},
{
.name = "jtag_ntrst_delay",
.handler = handle_jtag_ntrst_delay_command,

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@@ -32,7 +32,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP
# affected by the board and type of JTAG adapter. A value of 200 ms seems
# to work reliably for the configuration listed in the file header above.
jtag_nsrst_delay 200
adapter_nsrst_delay 200
jtag_ntrst_delay 200
# Set fallback clock to 1/6 of worst-case clock speed (which would be the 32.768 kHz slow clock).

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@@ -4,7 +4,7 @@ set CHIPNAME imote2
source [find target/pxa270.cfg]
# longer-than-normal reset delay
jtag_nsrst_delay 800
adapter_nsrst_delay 800
reset_config trst_and_srst separate

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@@ -3,7 +3,7 @@ source [find target/imx35.cfg]
# Determined by trial and error
reset_config trst_and_srst combined
jtag_nsrst_delay 200
adapter_nsrst_delay 200
jtag_ntrst_delay 200
$_TARGETNAME configure -event gdb-attach { reset init }

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@@ -36,7 +36,7 @@ if { [info exists CPUTAPID ] } {
set _TARGETNAME $_CHIPNAME.cpu
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
jtag_nsrst_delay 200
adapter_nsrst_delay 200
jtag_ntrst_delay 0

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@@ -16,7 +16,7 @@ source [find target/lm3s1968.cfg]
# jtag speed
adapter_khz 3000
jtag_nsrst_delay 100
adapter_nsrst_delay 100
#LM3S1968 Evaluation Board has only srst
reset_config srst_only

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@@ -12,7 +12,7 @@ source [find target/lm3s811.cfg]
# jtag speed
adapter_khz 500
jtag_nsrst_delay 100
adapter_nsrst_delay 100
#LM3S811 Evaluation Board has only srst
reset_config srst_only

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@@ -11,7 +11,7 @@ source [find target/lm3s9b9x.cfg]
# jtag speed
adapter_khz 500
jtag_nsrst_delay 100
adapter_nsrst_delay 100
#LM3S9B9x Evaluation Board has only srst
reset_config srst_only

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@@ -20,7 +20,7 @@ flash bank $_FLASHNAME cfi 0x10000000 0x400000 2 2 $_TARGETNAME
# Micrel MIC2775-29YM5 Supervisor
# Reset output will remain active for 280ms (maximum)
#
jtag_nsrst_delay 300
adapter_nsrst_delay 300
jtag_ntrst_delay 300

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@@ -2,7 +2,7 @@
# http://www.hitex.com/
# Delays on reset lines
jtag_nsrst_delay 50
adapter_nsrst_delay 50
jtag_ntrst_delay 1
# Maximum of 1/8 of clock frequency (XTAL = 16 MHz).

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@@ -7,7 +7,7 @@ source [find interface/hitex_str9-comstick.cfg]
# set jtag speed
adapter_khz 3000
jtag_nsrst_delay 100
adapter_nsrst_delay 100
jtag_ntrst_delay 100
#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config trst_and_srst

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@@ -4,7 +4,7 @@
source [find target/pxa255.cfg]
jtag_nsrst_delay 250
adapter_nsrst_delay 250
jtag_ntrst_delay 250
# NOTE: until after pinmux and such are set up, only CS0 is

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@@ -112,7 +112,7 @@ target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME
$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 1
#reset configuration
jtag_nsrst_delay 100
adapter_nsrst_delay 100
jtag_ntrst_delay 100
reset_config trst_and_srst
@@ -141,7 +141,7 @@ reset_config trst_and_srst
nand device s3c2440 0
jtag_nsrst_delay 100
adapter_nsrst_delay 100
jtag_ntrst_delay 100
reset_config trst_and_srst
init

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@@ -1,6 +1,6 @@
source [find target/lpc3250.cfg]
jtag_nsrst_delay 200
adapter_nsrst_delay 200
jtag_ntrst_delay 1
adapter_khz 200
reset_config trst_and_srst separate

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@@ -93,7 +93,7 @@ $_TARGETNAME configure -event reset-init {pxa255_sst_init}
reset_config trst_and_srst
jtag_nsrst_delay 200
adapter_nsrst_delay 200
jtag_ntrst_delay 200
#xscale debug_handler 0 0xFFFF0800 # debug handler base address

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@@ -16,7 +16,7 @@ source [find target/c100helper.tcl]
jtag_nsrst_assert_width 100
jtag_ntrst_assert_width 100
# don't talk to JTAG after reset for: [ms]
jtag_nsrst_delay 100
adapter_nsrst_delay 100
jtag_ntrst_delay 100
reset_config trst_and_srst separate

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