rename jtag_khz as adapter_khz

Globally rename "jtag_khz" as "adapter_khz", and move it out of the "jtag" command group ... it needs to be used with non-JTAG transports Includes a migration aid (in jtag/startup.tcl) so that old user scripts won't break. That aid should Sunset in about a year. (We may want to update it to include a nag message too.) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2026-02-25 13:15:07 -08:00 · 2010-03-15 08:37:43 -07:00
parent 4b964a81ca
commit 96f9790279
49 changed files with 111 additions and 96 deletions
--- a/5
+++ b/5
@@ -5,6 +5,11 @@ and other issues not mentioned here.

 JTAG Layer:
 	New driver for "Bus Pirate"
+	Rename various commands so they're not JTAG-specific
+	   There are migration procedures for these, but you should
+	   convert your scripts to the new names, since those procedures
+	   will not be around forever.
+	   	jtag_khz	... is now adapter_khz

 Boundary Scan:

--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -1516,7 +1516,7 @@ solution just avoids using that instruction with JTAG debuggers.
 If both the chip and the board support adaptive clocking,
 use the @command{jtag_rclk}
 command, in case your board is used with JTAG adapter which
-also supports it.  Otherwise use @command{jtag_khz}.
+also supports it.  Otherwise use @command{adapter_khz}.
 Set the slow rate at the beginning of the reset sequence,
 and the faster rate as soon as the clocks are at full speed.

@@ -2342,7 +2342,7 @@ you may encounter a problem.
@deffn Command {parport_toggling_time} [nanoseconds]
 Displays how many nanoseconds the hardware needs to toggle TCK;
 the parport driver uses this value to obey the
-@command{jtag_khz} configuration.
+@command{adapter_khz} configuration.
 When the optional @var{nanoseconds} parameter is given,
 that setting is changed before displaying the current value.

@@ -2353,7 +2353,7 @@ To measure the toggling time with a logic analyzer or a digital storage
 oscilloscope, follow the procedure below:
@example
 > parport_toggling_time 1000
-> jtag_khz 500
+> adapter_khz 500
@end example
 This sets the maximum JTAG clock speed of the hardware, but
 the actual speed probably deviates from the requested 500 kHz.
@@ -2364,14 +2364,14 @@ Update the setting to match your measurement:
@example
 > parport_toggling_time <measured nanoseconds>
@end example
-Now the clock speed will be a better match for @command{jtag_khz rate}
+Now the clock speed will be a better match for @command{adapter_khz rate}
 commands given in OpenOCD scripts and event handlers.

 You can do something similar with many digital multimeters, but note
 that you'll probably need to run the clock continuously for several
 seconds before it decides what clock rate to show.  Adjust the
 toggling time up or down until the measured clock rate is a good
-match for the jtag_khz rate you specified; be conservative.
+match for the adapter_khz rate you specified; be conservative.
@end quotation
@end deffn

@@ -2470,10 +2470,10 @@ However, it introduces delays to synchronize clocks; so it
 may not be the fastest solution.

@b{NOTE:} Script writers should consider using @command{jtag_rclk}
-instead of @command{jtag_khz}, but only for (ARM) cores and boards
+instead of @command{adapter_khz}, but only for (ARM) cores and boards
 which support adaptive clocking.

-@deffn {Command} jtag_khz max_speed_kHz
+@deffn {Command} adapter_khz max_speed_kHz
 A non-zero speed is in KHZ. Hence: 3000 is 3mhz.
 JTAG interfaces usually support a limited number of
 speeds.  The speed actually used won't be faster
@@ -3881,7 +3881,7 @@ the target clocks are fully set up.)
 before @command{reset_init} is called.

 This is the most robust place to use @command{jtag_rclk}
-or @command{jtag_khz} to switch to a low JTAG clock rate,
+or @command{adapter_khz} to switch to a low JTAG clock rate,
 when reset disables PLLs needed to use a fast clock.
@ignore
@item @b{reset-wait-pos}
@@ -7290,7 +7290,7 @@ To set the JTAG frequency use the command:

@example
 # Example: 1.234MHz
-jtag_khz 1234
+adapter_khz 1234
@end example


--- a/src/jtag/core.c
+++ b/src/jtag/core.c
@@ -1556,7 +1556,7 @@ unsigned jtag_get_speed_khz(void)
 	return speed_khz;
 }

-static int jtag_khz_to_speed(unsigned khz, int* speed)
+static int adapter_khz_to_speed(unsigned khz, int* speed)
 {
 	LOG_DEBUG("convert khz to interface specific speed value");
 	speed_khz = khz;
@@ -1576,11 +1576,11 @@ static int jtag_khz_to_speed(unsigned khz, int* speed)

 static int jtag_rclk_to_speed(unsigned fallback_speed_khz, int* speed)
 {
-	int retval = jtag_khz_to_speed(0, speed);
+	int retval = adapter_khz_to_speed(0, speed);
 	if ((ERROR_OK != retval) && fallback_speed_khz)
 	{
 		LOG_DEBUG("trying fallback speed...");
-		retval = jtag_khz_to_speed(fallback_speed_khz, speed);
+		retval = adapter_khz_to_speed(fallback_speed_khz, speed);
 	}
 	return retval;
 }
@@ -1598,7 +1598,7 @@ int jtag_config_khz(unsigned khz)
 	LOG_DEBUG("handle jtag khz");
 	clock_mode = CLOCK_MODE_KHZ;
 	int speed = 0;
-	int retval = jtag_khz_to_speed(khz, &speed);
+	int retval = adapter_khz_to_speed(khz, &speed);
 	return (ERROR_OK != retval) ? retval : jtag_set_speed(speed);
 }

@@ -1621,7 +1621,7 @@ int jtag_get_speed(void)
 			speed = jtag_speed;
 			break;
 		case CLOCK_MODE_KHZ:
-			jtag_khz_to_speed(jtag_get_speed_khz(), &speed);
+			adapter_khz_to_speed(jtag_get_speed_khz(), &speed);
 			break;
 		case CLOCK_MODE_RCLK:
 			jtag_rclk_to_speed(rclk_fallback_speed_khz, &speed);
--- a/src/jtag/drivers/presto.c
+++ b/src/jtag/drivers/presto.c
@@ -680,7 +680,7 @@ static struct bitq_interface presto_bitq = {

 /* -------------------------------------------------------------------------- */

-static int presto_jtag_khz(int khz, int *jtag_speed)
+static int presto_adapter_khz(int khz, int *jtag_speed)
 {
 	if (khz < 0)
 	{
@@ -797,7 +797,7 @@ struct jtag_interface presto_interface = {

 	.execute_queue = bitq_execute_queue,
 	.speed = presto_jtag_speed,
-	.khz = presto_jtag_khz,
+	.khz = presto_adapter_khz,
 	.speed_div = presto_jtag_speed_div,
 	.init = presto_jtag_init,
 	.quit = presto_jtag_quit,
--- a/src/jtag/startup.tcl
+++ b/src/jtag/startup.tcl
@@ -75,3 +75,12 @@ add_help_text srst_deasserted "Overridable procedure run when srst deassert is d
 proc srst_asserted {} {
 	puts "Sensed nSRST asserted."
 }
+
+# BEGIN MIGRATION AIDS ...  these adapter operations originally had
+# JTAG-specific names despite the fact that the operations were not
+# specific to JTAG.
+#
+# FIXME phase these aids out after about April 2011
+#
+proc jtag_khz args { eval adapter_khz $args }
+# END MIGRATION AIDS
--- a/src/jtag/tcl.c
+++ b/src/jtag/tcl.c
@@ -1351,7 +1351,7 @@ COMMAND_HANDLER(handle_jtag_ntrst_assert_width_command)
 	return ERROR_OK;
 }

-COMMAND_HANDLER(handle_jtag_khz_command)
+COMMAND_HANDLER(handle_adapter_khz_command)
 {
 	if (CMD_ARGC > 1)
 		return ERROR_COMMAND_SYNTAX_ERROR;
@@ -1608,6 +1608,16 @@ COMMAND_HANDLER(handle_tms_sequence_command)
 }

 static const struct command_registration interface_command_handlers[] = {
+	{
+		.name = "adapter_khz",
+		.handler = handle_adapter_khz_command,
+		.mode = COMMAND_ANY,
+		.help = "With an argument, change to the specified maximum "
+			"jtag speed.  For JTAG, 0 KHz signifies adaptive "
+			" clocking. "
+			"With or without argument, display current setting.",
+		.usage = "[khz]",
+	},
 	{
 		.name = "interface",
 		.handler = handle_interface_command,
@@ -1636,15 +1646,6 @@ int interface_register_commands(struct command_context *ctx)
 }

 static const struct command_registration jtag_command_handlers[] = {
-	{
-		.name = "jtag_khz",
-		.handler = handle_jtag_khz_command,
-		.mode = COMMAND_ANY,
-		.help = "With an argument, change to the specified maximum "
-			"jtag speed.  Pass 0 to require adaptive clocking. "
-			"With or without argument, display current setting.",
-		.usage = "[khz]",
-	},
 	{
 		.name = "jtag_rclk",
 		.handler = handle_jtag_rclk_command,
--- a/src/svf/svf.c
+++ b/src/svf/svf.c
@@ -880,7 +880,7 @@ static int svf_run_command(struct command_context *cmd_ctx, char *cmd_str)
 			// TODO: set jtag speed to
 			if (svf_para.frequency > 0)
 			{
-				command_run_linef(cmd_ctx, "jtag_khz %d", (int)svf_para.frequency / 1000);
+				command_run_linef(cmd_ctx, "adapter_khz %d", (int)svf_para.frequency / 1000);
 				LOG_DEBUG("\tfrequency = %f", svf_para.frequency);
 			}
 		}
--- a/tcl/board/at91eb40a.cfg
+++ b/tcl/board/at91eb40a.cfg
@@ -65,4 +65,4 @@ $_TARGETNAME configure -event reset-init {
 }

 # This target is pretty snappy...
-jtag_khz 16000
+adapter_khz 16000
--- a/tcl/board/at91rm9200-dk.cfg
+++ b/tcl/board/at91rm9200-dk.cfg
@@ -15,7 +15,7 @@ flash_bank cfi 0x10000000 0x00200000 2 2 0
 proc at91rm9200_dk_init { } {
    # Try to run at 1khz... Yea, that slow!
    # Chip is really running @ 32khz
-    jtag_khz 8
+    adapter_khz 8

    mww 0xfffffc64 0xffffffff
    ##  disable all clocks but system clock
@@ -41,7 +41,7 @@ proc at91rm9200_dk_init { } {
    #========================================
    # CPU now runs at 180mhz
    # SYS runs at 60mhz.
-    jtag_khz 40000
+    adapter_khz 40000
    #========================================


--- a/tcl/board/at91sam9g20-ek.cfg
+++ b/tcl/board/at91sam9g20-ek.cfg
@@ -77,7 +77,7 @@ proc at91sam9g20_init { } {
 	# means the master clock (MCLK) must be at or below 133 MHz or timing errors will occur.  The processor
 	# core can operate up to 400 MHz and therefore PCLK must be at or below this to function properly.

-	jtag_khz 2			# Slow-speed oscillator enabled at reset, so run jtag speed slow.
+	adapter_khz 2			# Slow-speed oscillator enabled at reset, so run jtag speed slow.
 	halt				# Make sure processor is halted, or error will result in following steps.
 	mww 0xfffffd08 0xa5000501	# RSTC_MR : enable user reset.
 	mww 0xfffffd44 0x00008000	# WDT_MR : disable watchdog.
@@ -112,7 +112,7 @@ proc at91sam9g20_init { } {

 	# Switch over to adaptive clocking.

-	jtag_khz 0
+	adapter_khz 0

 	# Enable faster DCC downloads.

--- a/tcl/board/csb337.cfg
+++ b/tcl/board/csb337.cfg
@@ -19,7 +19,7 @@ if { [info exists ETM_DRIVER] } {

 proc csb337_clk_init { } {
 	# CPU is in Slow Clock Mode (32KiHz) ... needs slow JTAG clock
-	jtag_khz 8
+	adapter_khz 8

 	# CKGR_MOR:  start main oscillator (3.6864 MHz)
 	mww 0xfffffc20 0xff01
@@ -37,7 +37,7 @@ proc csb337_clk_init { } {
 	sleep 20

 	# CPU is in Normal Mode ... allows faster JTAG clock speed
-	jtag_khz 40000
+	adapter_khz 40000
 }

 proc csb337_nor_init { } {
--- a/tcl/board/dm365evm.cfg
+++ b/tcl/board/dm365evm.cfg
@@ -103,7 +103,7 @@ proc dm365evm_init {} {
 	echo "Initialize DM365 EVM board"

 	# CLKIN	= 24 MHz ... can't talk quickly to ARM yet
-	jtag_khz 1500
+	adapter_khz 1500

 	# FIXME -- PLL init

--- a/tcl/board/ek-lm3s1968.cfg
+++ b/tcl/board/ek-lm3s1968.cfg
@@ -4,7 +4,7 @@
 # http://www.luminarymicro.com/products/lm3s1968_evaluation_kits.html

 # NOTE:  to use J-Link instead of the on-board interface,
-# you may also need to reduce jtag_khz to be about 1200.
+# you may also need to reduce adapter_khz to be about 1200.
 # source [find interface/jlink.cfg]

 # include the FT2232 interface config for on-board JTAG interface
@@ -14,7 +14,7 @@ source [find interface/luminary.cfg]
 source [find target/lm3s1968.cfg]

 # jtag speed
-jtag_khz 3000
+adapter_khz 3000

 jtag_nsrst_delay 100

--- a/tcl/board/ek-lm3s811.cfg
+++ b/tcl/board/ek-lm3s811.cfg
@@ -10,7 +10,7 @@ source [find interface/luminary.cfg]
 source [find target/lm3s811.cfg]

 # jtag speed
-jtag_khz 500
+adapter_khz 500

 jtag_nsrst_delay 100

--- a/tcl/board/ek-lm3s9b9x.cfg
+++ b/tcl/board/ek-lm3s9b9x.cfg
@@ -9,7 +9,7 @@ source [find interface/luminary-icdi.cfg]
 source [find target/lm3s9b9x.cfg]

 # jtag speed
-jtag_khz 500
+adapter_khz 500

 jtag_nsrst_delay 100

--- a/tcl/board/ethernut3.cfg
+++ b/tcl/board/ethernut3.cfg
@@ -26,7 +26,7 @@ jtag_ntrst_delay 300

 arm7_9 fast_memory_access enable
 arm7_9 dcc_downloads enable
-jtag_khz 16000
+adapter_khz 16000


 # Target events
--- a/tcl/board/hitex_lpc2929.cfg
+++ b/tcl/board/hitex_lpc2929.cfg
@@ -7,7 +7,7 @@ jtag_ntrst_delay 1

 # Maximum of 1/8 of clock frequency (XTAL = 16 MHz).
 # Adaptive clocking through RTCK is not supported.
-jtag_khz 2000
+adapter_khz 2000

 # Target device: LPC29xx with ETB
 # The following variables are used by the LPC2900 script:
@@ -24,7 +24,7 @@ $_TARGETNAME configure -work-area-phys 0x58000000 -work-area-size 0x10000 -work-
 # Event handlers
 $_TARGETNAME configure -event reset-start {
  # Back to the slow JTAG clock
-  jtag_khz 2000
+  adapter_khz 2000
 }

 # External 16-bit flash at chip select CS7 (SST39VF3201-70, 4 MiB)
@@ -46,7 +46,7 @@ $_TARGETNAME configure -event reset-init {
  mww 0xFFFF8070 0x02000000     # SYS_CLK_CONF: PLL

  # Increase JTAG speed
-  jtag_khz 6000
+  adapter_khz 6000

  # Enable external memory bus (16-bit SRAM at CS6, 16-bit flash at CS7)
  mww 0xE0001138 0x0000001F     # P1.14 = D0
--- a/tcl/board/hitex_str9-comstick.cfg
+++ b/tcl/board/hitex_str9-comstick.cfg
@@ -5,7 +5,7 @@
 source [find interface/hitex_str9-comstick.cfg]

 # set jtag speed
-jtag_khz 3000
+adapter_khz 3000

 jtag_nsrst_delay 100
 jtag_ntrst_delay 100
--- a/tcl/board/imx27lnst.cfg
+++ b/tcl/board/imx27lnst.cfg
@@ -8,7 +8,7 @@ proc imx27lnst_init { } {
 	# This setup puts RAM at 0xA0000000

 	# reset the board correctly
-	jtag_khz 500
+	adapter_khz 500
 	reset run
 	reset halt

--- a/tcl/board/mini2440.cfg
+++ b/tcl/board/mini2440.cfg
@@ -121,7 +121,7 @@ reset_config trst_and_srst
 # IMPORTANT! See README at top of this file.
 #-------------------------------------------------------------------------

-    jtag_khz 12000
+    adapter_khz 12000
    jtag interface

 #-------------------------------------------------------------------------
--- a/Show More
+++ b/Show More